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Diffstat (limited to 'examples/mcxa/src/bin/dma_ping_pong_transfer.rs')
-rw-r--r--examples/mcxa/src/bin/dma_ping_pong_transfer.rs5
1 files changed, 2 insertions, 3 deletions
diff --git a/examples/mcxa/src/bin/dma_ping_pong_transfer.rs b/examples/mcxa/src/bin/dma_ping_pong_transfer.rs
index 728e4d408..58f643b80 100644
--- a/examples/mcxa/src/bin/dma_ping_pong_transfer.rs
+++ b/examples/mcxa/src/bin/dma_ping_pong_transfer.rs
@@ -23,15 +23,15 @@
23#![no_std] 23#![no_std]
24#![no_main] 24#![no_main]
25 25
26use core::fmt::Write as _;
26use core::sync::atomic::{AtomicBool, Ordering}; 27use core::sync::atomic::{AtomicBool, Ordering};
27 28
28use embassy_executor::Spawner; 29use embassy_executor::Spawner;
29use embassy_mcxa::clocks::config::Div8; 30use embassy_mcxa::clocks::config::Div8;
30use embassy_mcxa::dma::{self, DmaCh1InterruptHandler, DmaChannel, Tcd, TransferOptions}; 31use embassy_mcxa::dma::{self, DmaChannel, Tcd, TransferOptions};
31use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; 32use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx};
32use embassy_mcxa::{bind_interrupts, pac}; 33use embassy_mcxa::{bind_interrupts, pac};
33use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; 34use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
34use core::fmt::Write as _;
35 35
36// Source and destination buffers for Approach 1 (scatter/gather) 36// Source and destination buffers for Approach 1 (scatter/gather)
37static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; 37static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8];
@@ -85,7 +85,6 @@ impl embassy_mcxa::interrupt::typelevel::Handler<embassy_mcxa::interrupt::typele
85// CH1: Standard handler for wait_half() demo 85// CH1: Standard handler for wait_half() demo
86bind_interrupts!(struct Irqs { 86bind_interrupts!(struct Irqs {
87 DMA_CH0 => PingPongDmaHandler; 87 DMA_CH0 => PingPongDmaHandler;
88 DMA_CH1 => DmaCh1InterruptHandler;
89}); 88});
90 89
91/// Helper to print a buffer to UART 90/// Helper to print a buffer to UART