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Diffstat (limited to 'examples/mcxa/src/bin/dma_wrap_transfer.rs')
-rw-r--r--examples/mcxa/src/bin/dma_wrap_transfer.rs16
1 files changed, 3 insertions, 13 deletions
diff --git a/examples/mcxa/src/bin/dma_wrap_transfer.rs b/examples/mcxa/src/bin/dma_wrap_transfer.rs
index 7fea4bf76..acfd29f08 100644
--- a/examples/mcxa/src/bin/dma_wrap_transfer.rs
+++ b/examples/mcxa/src/bin/dma_wrap_transfer.rs
@@ -10,18 +10,13 @@
10#![no_std] 10#![no_std]
11#![no_main] 11#![no_main]
12 12
13use core::fmt::Write as _;
14
13use embassy_executor::Spawner; 15use embassy_executor::Spawner;
14use embassy_mcxa::clocks::config::Div8; 16use embassy_mcxa::clocks::config::Div8;
15use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaChannel}; 17use embassy_mcxa::dma::DmaChannel;
16use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; 18use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx};
17use embassy_mcxa::{bind_interrupts, pac};
18use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; 19use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
19use core::fmt::Write as _;
20
21// Bind DMA channel 0 interrupt using Embassy-style macro
22bind_interrupts!(struct Irqs {
23 DMA_CH0 => DmaCh0InterruptHandler;
24});
25 20
26// Source buffer: 4 words (16 bytes), aligned to 16 bytes for modulo 21// Source buffer: 4 words (16 bytes), aligned to 16 bytes for modulo
27#[repr(align(16))] 22#[repr(align(16))]
@@ -49,11 +44,6 @@ async fn main(_spawner: Spawner) {
49 44
50 defmt::info!("DMA wrap transfer example starting..."); 45 defmt::info!("DMA wrap transfer example starting...");
51 46
52 // Enable DMA interrupt (DMA clock/reset/init is handled automatically by HAL)
53 unsafe {
54 cortex_m::peripheral::NVIC::unmask(pac::Interrupt::DMA_CH0);
55 }
56
57 let config = Config { 47 let config = Config {
58 baudrate_bps: 115_200, 48 baudrate_bps: 115_200,
59 ..Default::default() 49 ..Default::default()