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-rw-r--r--examples/stm32c0/src/bin/adc.rs5
1 files changed, 3 insertions, 2 deletions
diff --git a/examples/stm32c0/src/bin/adc.rs b/examples/stm32c0/src/bin/adc.rs
index 10481f4d2..1f54b0b18 100644
--- a/examples/stm32c0/src/bin/adc.rs
+++ b/examples/stm32c0/src/bin/adc.rs
@@ -36,7 +36,8 @@ async fn main(_spawner: Spawner) {
36 ); 36 );
37 37
38 let channels_seqence: [&mut AnyAdcChannel<ADC1>; 3] = [&mut vref, &mut temp, &mut pin0]; 38 let channels_seqence: [&mut AnyAdcChannel<ADC1>; 3] = [&mut vref, &mut temp, &mut pin0];
39 adc.read(&mut dma, channels_seqence.into_iter(), &mut read_buffer).await; 39 adc.read(dma.reborrow(), channels_seqence.into_iter(), &mut read_buffer)
40 .await;
40 // Values are ordered according to hardware ADC channel number! 41 // Values are ordered according to hardware ADC channel number!
41 info!( 42 info!(
42 "DMA ADC read in set: vref = {}, temp = {}, pin0 = {}.", 43 "DMA ADC read in set: vref = {}, temp = {}, pin0 = {}.",
@@ -45,7 +46,7 @@ async fn main(_spawner: Spawner) {
45 46
46 let hw_channel_selection: u32 = 47 let hw_channel_selection: u32 =
47 (1 << temp.get_hw_channel()) + (1 << vref.get_hw_channel()) + (1 << pin0.get_hw_channel()); 48 (1 << temp.get_hw_channel()) + (1 << vref.get_hw_channel()) + (1 << pin0.get_hw_channel());
48 adc.read_in_hw_order(&mut dma, hw_channel_selection, Scandir::UP, &mut read_buffer) 49 adc.read_in_hw_order(dma.reborrow(), hw_channel_selection, Scandir::UP, &mut read_buffer)
49 .await; 50 .await;
50 info!( 51 info!(
51 "DMA ADC read in hardware order: vref = {}, temp = {}, pin0 = {}.", 52 "DMA ADC read in hardware order: vref = {}, temp = {}, pin0 = {}.",