3 files changed, 5 insertions, 5 deletions

diff --git a/examples/stm32h755cm7/Cargo.toml b/examples/stm32h755cm7/Cargo.toml
index c34d4e45c..f4e1e53b7 100644
--- a/examples/stm32h755cm7/Cargo.toml
+++ b/examples/stm32h755cm7/Cargo.toml
@@ -1,5 +1,5 @@
 [package]
-edition = "2021"
+edition = "2024"
 name = "embassy-stm32h755cm7-examples"
 version = "0.1.0"
 license = "MIT OR Apache-2.0"
@@ -30,7 +30,7 @@ panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
 critical-section = "1.1"
 micromath = "2.0.0"
-stm32-fmc = "0.3.0"
+stm32-fmc = "0.4.0"
 embedded-storage = "0.3.1"
 static_cell = "2"
 chrono = { version = "^0.4", default-features = false }
diff --git a/examples/stm32h755cm7/src/bin/blinky.rs b/examples/stm32h755cm7/src/bin/blinky.rs
index b30bf4de8..e8f5a1c43 100644
--- a/examples/stm32h755cm7/src/bin/blinky.rs
+++ b/examples/stm32h755cm7/src/bin/blinky.rs
@@ -5,8 +5,8 @@ use core::mem::MaybeUninit;
 
 use defmt::*;
 use embassy_executor::Spawner;
-use embassy_stm32::gpio::{Level, Output, Speed};
 use embassy_stm32::SharedData;
+use embassy_stm32::gpio::{Level, Output, Speed};
 use embassy_time::Timer;
 use {defmt_rtt as _, panic_probe as _};
 
diff --git a/examples/stm32h755cm7/src/bin/intercore.rs b/examples/stm32h755cm7/src/bin/intercore.rs
index a4e1b5ff4..3df0b26d7 100644
--- a/examples/stm32h755cm7/src/bin/intercore.rs
+++ b/examples/stm32h755cm7/src/bin/intercore.rs
@@ -97,7 +97,7 @@ mod shared {
         }
     }
 
-    #[link_section = ".ram_d3"]
+    #[unsafe(link_section = ".ram_d3")]
     pub static SHARED_LED_STATE: SharedLedState = SharedLedState::new();
 
     // Memory region constants for MPU configuration
@@ -106,7 +106,7 @@ mod shared {
     pub const SRAM4_REGION_NUMBER: u8 = 0;
 }
 
-#[link_section = ".ram_d3"]
+#[unsafe(link_section = ".ram_d3")]
 static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit();
 
 /// Configure MPU to make SRAM4 region non-cacheable