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-rw-r--r--examples/stm32l4/src/bin/button.rs2
-rw-r--r--examples/stm32l4/src/bin/spe_adin1110_http_server.rs8
-rw-r--r--examples/stm32l4/src/bin/spi_blocking_async.rs2
-rw-r--r--examples/stm32l4/src/bin/spi_dma.rs2
4 files changed, 7 insertions, 7 deletions
diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs
index 73b1962e8..0a102c2d6 100644
--- a/examples/stm32l4/src/bin/button.rs
+++ b/examples/stm32l4/src/bin/button.rs
@@ -12,7 +12,7 @@ fn main() -> ! {
12 12
13 let p = embassy_stm32::init(Default::default()); 13 let p = embassy_stm32::init(Default::default());
14 14
15 let button = Input::new(p.PC13, Pull::Up); 15 let mut button = Input::new(p.PC13, Pull::Up);
16 16
17 loop { 17 loop {
18 if button.is_high() { 18 if button.is_high() {
diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
index 4826e0bed..8ec810c7f 100644
--- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
+++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
@@ -114,8 +114,8 @@ async fn main(spawner: Spawner) {
114 let led_uc4_blue = Output::new(dp.PG15, Level::High, Speed::Low); 114 let led_uc4_blue = Output::new(dp.PG15, Level::High, Speed::Low);
115 115
116 // Read the uc_cfg switches 116 // Read the uc_cfg switches
117 let uc_cfg0 = Input::new(dp.PB2, Pull::None); 117 let mut uc_cfg0 = Input::new(dp.PB2, Pull::None);
118 let uc_cfg1 = Input::new(dp.PF11, Pull::None); 118 let mut uc_cfg1 = Input::new(dp.PF11, Pull::None);
119 let _uc_cfg2 = Input::new(dp.PG6, Pull::None); 119 let _uc_cfg2 = Input::new(dp.PG6, Pull::None);
120 let _uc_cfg3 = Input::new(dp.PG11, Pull::None); 120 let _uc_cfg3 = Input::new(dp.PG11, Pull::None);
121 121
@@ -133,8 +133,8 @@ async fn main(spawner: Spawner) {
133 133
134 // Setup IO and SPI for the SPE chip 134 // Setup IO and SPI for the SPE chip
135 let spe_reset_n = Output::new(dp.PC7, Level::Low, Speed::Low); 135 let spe_reset_n = Output::new(dp.PC7, Level::Low, Speed::Low);
136 let spe_cfg0 = Input::new(dp.PC8, Pull::None); 136 let mut spe_cfg0 = Input::new(dp.PC8, Pull::None);
137 let spe_cfg1 = Input::new(dp.PC9, Pull::None); 137 let mut spe_cfg1 = Input::new(dp.PC9, Pull::None);
138 let _spe_ts_capt = Output::new(dp.PC6, Level::Low, Speed::Low); 138 let _spe_ts_capt = Output::new(dp.PC6, Level::Low, Speed::Low);
139 139
140 let spe_int = Input::new(dp.PB11, Pull::None); 140 let spe_int = Input::new(dp.PB11, Pull::None);
diff --git a/examples/stm32l4/src/bin/spi_blocking_async.rs b/examples/stm32l4/src/bin/spi_blocking_async.rs
index f1b80087c..903ca58df 100644
--- a/examples/stm32l4/src/bin/spi_blocking_async.rs
+++ b/examples/stm32l4/src/bin/spi_blocking_async.rs
@@ -30,7 +30,7 @@ async fn main(_spawner: Spawner) {
30 let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); 30 let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh);
31 let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh); 31 let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh);
32 let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); 32 let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
33 let ready = Input::new(p.PE1, Pull::Up); 33 let mut ready = Input::new(p.PE1, Pull::Up);
34 34
35 cortex_m::asm::delay(100_000); 35 cortex_m::asm::delay(100_000);
36 reset.set_high(); 36 reset.set_high();
diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs
index ff9b5b43b..58cf2e51e 100644
--- a/examples/stm32l4/src/bin/spi_dma.rs
+++ b/examples/stm32l4/src/bin/spi_dma.rs
@@ -25,7 +25,7 @@ async fn main(_spawner: Spawner) {
25 let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); 25 let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh);
26 let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh); 26 let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh);
27 let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); 27 let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
28 let ready = Input::new(p.PE1, Pull::Up); 28 let mut ready = Input::new(p.PE1, Pull::Up);
29 29
30 cortex_m::asm::delay(100_000); 30 cortex_m::asm::delay(100_000);
31 reset.set_high(); 31 reset.set_high();