95 files changed, 1508 insertions, 322 deletions
diff --git a/examples/boot/application/nrf/Cargo.toml b/examples/boot/application/nrf/Cargo.toml
index 4d633e8a8..37183df97 100644
--- a/examples/boot/application/nrf/Cargo.toml
+++ b/examples/boot/application/nrf/Cargo.toml
@@ -8,10 +8,10 @@ license = "MIT OR Apache-2.0"
 embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [] }
-embassy-nrf = { version = "0.3.1", path = "../../../../embassy-nrf", features = ["time-driver-rtc1", "gpiote", ] }
+embassy-nrf = { version = "0.5.0", path = "../../../../embassy-nrf", features = ["time-driver-rtc1", "gpiote", ] }
-embassy-boot = { version = "0.4.0", path = "../../../../embassy-boot", features = [] }
+embassy-boot = { version = "0.5.0", path = "../../../../embassy-boot", features = [] }
-embassy-boot-nrf = { version = "0.4.0", path = "../../../../embassy-boot-nrf", features = [] }
+embassy-boot-nrf = { version = "0.6.0", path = "../../../../embassy-boot-nrf", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/rp/Cargo.toml b/examples/boot/application/rp/Cargo.toml
index be283fb27..e5568f6bb 100644
--- a/examples/boot/application/rp/Cargo.toml
+++ b/examples/boot/application/rp/Cargo.toml
@@ -8,9 +8,9 @@ license = "MIT OR Apache-2.0"
 embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [] }
-embassy-rp = { version = "0.4.0", path = "../../../../embassy-rp", features = ["time-driver", "rp2040"] }
+embassy-rp = { version = "0.6.0", path = "../../../../embassy-rp", features = ["time-driver", "rp2040"] }
-embassy-boot-rp = { version = "0.5.0", path = "../../../../embassy-boot-rp", features = [] }
+embassy-boot-rp = { version = "0.6.0", path = "../../../../embassy-boot-rp", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/boot/application/rp/src/bin/a.rs b/examples/boot/application/rp/src/bin/a.rs
index ede0c07da..e6d7b3d4f 100644
--- a/examples/boot/application/rp/src/bin/a.rs
+++ b/examples/boot/application/rp/src/bin/a.rs
@@ -54,7 +54,7 @@ async fn main(_s: Spawner) {
    for chunk in APP_B.chunks(4096) {
        buf.0[..chunk.len()].copy_from_slice(chunk);
        defmt::info!("writing block at offset {}", offset);
-        writer.write(offset, &buf.0[..]).unwrap();
+        writer.write(offset, &buf.0[..chunk.len()]).unwrap();
        offset += chunk.len() as u32;
    }
    watchdog.feed();
diff --git a/examples/boot/application/stm32f3/Cargo.toml b/examples/boot/application/stm32f3/Cargo.toml
index b3466e288..be8b7bff1 100644
--- a/examples/boot/application/stm32f3/Cargo.toml
+++ b/examples/boot/application/stm32f3/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32f303re", "time-driver-any", "exti"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32" }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32" }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/stm32f7/Cargo.toml b/examples/boot/application/stm32f7/Cargo.toml
index 72dbded5f..2b0175a0c 100644
--- a/examples/boot/application/stm32f7/Cargo.toml
+++ b/examples/boot/application/stm32f7/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32f767zi", "time-driver-any", "exti", "single-bank"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/stm32h7/Cargo.toml b/examples/boot/application/stm32h7/Cargo.toml
index 57fb8312c..3c88f4241 100644
--- a/examples/boot/application/stm32h7/Cargo.toml
+++ b/examples/boot/application/stm32h7/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32h743zi", "time-driver-any", "exti"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/stm32l0/Cargo.toml b/examples/boot/application/stm32l0/Cargo.toml
index 7dbbba138..b4e7e090a 100644
--- a/examples/boot/application/stm32l0/Cargo.toml
+++ b/examples/boot/application/stm32l0/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32l072cz", "time-driver-any", "exti", "memory-x"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/stm32l1/Cargo.toml b/examples/boot/application/stm32l1/Cargo.toml
index 9549b2048..394578e1a 100644
--- a/examples/boot/application/stm32l1/Cargo.toml
+++ b/examples/boot/application/stm32l1/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32l151cb-a", "time-driver-any", "exti"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/stm32l4/Cargo.toml b/examples/boot/application/stm32l4/Cargo.toml
index 03daeb0bc..abe0451fd 100644
--- a/examples/boot/application/stm32l4/Cargo.toml
+++ b/examples/boot/application/stm32l4/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32l475vg", "time-driver-any", "exti"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/application/stm32wb-dfu/Cargo.toml b/examples/boot/application/stm32wb-dfu/Cargo.toml
index e582628aa..bc4681f79 100644
--- a/examples/boot/application/stm32wb-dfu/Cargo.toml
+++ b/examples/boot/application/stm32wb-dfu/Cargo.toml
@@ -9,9 +9,9 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32wb55rg", "time-driver-any", "exti"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
-embassy-usb = { version = "0.4.0", path = "../../../../embassy-usb" }
+embassy-usb = { version = "0.5.0", path = "../../../../embassy-usb" }
 embassy-usb-dfu = { version = "0.1.0", path = "../../../../embassy-usb-dfu", features = ["application", "cortex-m"] }
 defmt = { version = "1.0.1", optional = true }
diff --git a/examples/boot/application/stm32wl/Cargo.toml b/examples/boot/application/stm32wl/Cargo.toml
index 3ed04b472..0552d109a 100644
--- a/examples/boot/application/stm32wl/Cargo.toml
+++ b/examples/boot/application/stm32wl/Cargo.toml
@@ -9,8 +9,8 @@ embassy-sync = { version = "0.7.0", path = "../../../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.4.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../../../embassy-stm32", features = ["stm32wl55jc-cm4", "time-driver-any", "exti"]  }
-embassy-boot-stm32 = { version = "0.3.0", path = "../../../../embassy-boot-stm32", features = [] }
+embassy-boot-stm32 = { version = "0.4.0", path = "../../../../embassy-boot-stm32", features = [] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../../../embassy-embedded-hal" }
 defmt = { version = "1.0.1", optional = true }
 defmt-rtt = { version = "1.0.0", optional = true }
diff --git a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml
index 0bb93b12e..d101e6ace 100644
--- a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml
+++ b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml
@@ -18,7 +18,7 @@ embedded-storage = "0.3.1"
 embedded-storage-async = "0.4.0"
 cfg-if = "1.0.0"
 embassy-usb-dfu = { version = "0.1.0", path = "../../../../embassy-usb-dfu", features = ["dfu", "cortex-m"] }
-embassy-usb = { version = "0.4.0", path = "../../../../embassy-usb", default-features = false }
+embassy-usb = { version = "0.5.0", path = "../../../../embassy-usb", default-features = false }
 embassy-futures = { version = "0.1.1", path = "../../../../embassy-futures" }
 [features]
diff --git a/examples/lpc55s69/Cargo.toml b/examples/lpc55s69/Cargo.toml
index 7f81e9c7f..1724a22d4 100644
--- a/examples/lpc55s69/Cargo.toml
+++ b/examples/lpc55s69/Cargo.toml
@@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
-embassy-nxp = { version = "0.1.0", path = "../../embassy-nxp", features = ["rt"] }
+embassy-nxp = { version = "0.1.0", path = "../../embassy-nxp", features = ["lpc55", "rt", "defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt"] }
diff --git a/examples/mimxrt1011/.cargo/config.toml b/examples/mimxrt1011/.cargo/config.toml
new file mode 100644
index 000000000..12f4b27b2
--- /dev/null
+++ b/examples/mimxrt1011/.cargo/config.toml
@@ -0,0 +1,8 @@
+[target.thumbv7em-none-eabihf]
+runner = 'probe-rs run --chip MIMXRT1010'
+[build]
+target = "thumbv7em-none-eabihf" # Cortex-M7
+[env]
+DEFMT_LOG = "trace"
diff --git a/examples/mimxrt1011/Cargo.toml b/examples/mimxrt1011/Cargo.toml
new file mode 100644
index 000000000..cf4e4c163
--- /dev/null
+++ b/examples/mimxrt1011/Cargo.toml
@@ -0,0 +1,29 @@
+[package]
+name = "embassy-imxrt1011-examples"
+version = "0.1.0"
+edition = "2021"
+license = "MIT or Apache-2.0"
+[dependencies]
+cortex-m = { version = "0.7.7", features = ["inline-asm", "critical-section-single-core"] }
+cortex-m-rt = "0.7.3"
+defmt = "1.0.1"
+defmt-rtt = "1.0.0"
+embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
+embassy-futures = { version = "0.1.1", path = "../../embassy-futures" }
+embassy-nxp = { version = "0.1.0", path = "../../embassy-nxp", features = ["defmt", "mimxrt1011", "unstable-pac", "time-driver-pit"] }
+embassy-time = { version = "0.4", path = "../../embassy-time", features = ["defmt", ] } # "defmt-timestamp-uptime" # RT1011 hard faults currently with this enabled.
+embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
+embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
+embedded-hal-async = "1.0.0"
+imxrt-boot-gen = { version = "0.3.4", features = ["imxrt1010"] }
+panic-probe = { version = "1.0.0", features = ["print-defmt"] }
+panic-semihosting = "0.6.0"
+[build-dependencies]
+imxrt-rt = { version = "0.1.7", features = ["device"] }
+[profile.release]
+debug = 2
diff --git a/examples/mimxrt1011/build.rs b/examples/mimxrt1011/build.rs
new file mode 100644
index 000000000..99e172aba
--- /dev/null
+++ b/examples/mimxrt1011/build.rs
@@ -0,0 +1,14 @@
+use imxrt_rt::{Family, RuntimeBuilder};
+fn main() {
+    // The IMXRT1010-EVK technically has 128M of flash, but we only ever use 8MB so that the examples
+    // will build fine on the Adafruit Metro M7 boards.
+    RuntimeBuilder::from_flexspi(Family::Imxrt1010, 8 * 1024 * 1024)
+        .build()
+        .unwrap();
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+    // Not link.x, as imxrt-rt needs to do some special things
+    println!("cargo:rustc-link-arg-bins=-Timxrt-link.x");
+}
diff --git a/examples/mimxrt1011/src/bin/blinky.rs b/examples/mimxrt1011/src/bin/blinky.rs
new file mode 100644
index 000000000..a5d5de6b3
--- /dev/null
+++ b/examples/mimxrt1011/src/bin/blinky.rs
@@ -0,0 +1,48 @@
+//! This example works on the following boards:
+//! - IMXRT1010-EVK
+//! - Adafruit Metro M7 (with microSD or with AirLift), requires an external button
+//! - Makerdiary iMX RT1011 Nano Kit (TODO: currently untested, please change this)
+//!
+//! Although beware you will need to change the GPIO pins being used (scroll down).
+#![no_std]
+#![no_main]
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_nxp::gpio::{Level, Output};
+use embassy_time::Timer;
+// Must include `embassy_imxrt1011_examples` to ensure the FCB gets linked.
+use {defmt_rtt as _, embassy_imxrt1011_examples as _, panic_probe as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    let p = embassy_nxp::init(Default::default());
+    info!("Hello world!");
+    /* Pick the pins to use depending on your board. */
+    // IMXRT1010-EVK
+    //
+    // LED (D25)
+    let led = p.GPIO_11;
+    // Adafruit Metro M7 (both microSD and AirLift variants)
+    //
+    // The LED is connected to D13 on the board.
+    // let led = p.GPIO_03;
+    // Makerdiary iMX RT1011 Nano Kit
+    //
+    // LED0
+    // let led = p.GPIO_SD_04;
+    let mut led = Output::new(led, Level::Low);
+    loop {
+        Timer::after_millis(500).await;
+        info!("Toggle");
+        led.toggle();
+    }
+}
diff --git a/examples/mimxrt1011/src/bin/button.rs b/examples/mimxrt1011/src/bin/button.rs
new file mode 100644
index 000000000..e63d7171d
--- /dev/null
+++ b/examples/mimxrt1011/src/bin/button.rs
@@ -0,0 +1,62 @@
+//! This example works on the following boards:
+//! - IMXRT1010-EVK
+//! - Adafruit Metro M7 (with microSD or with AirLift), requires an external button
+//! - Makerdiary iMX RT1011 Nano Kit (TODO: currently untested, please change this)
+//!
+//! Although beware you will need to change the GPIO pins being used (scroll down).
+#![no_std]
+#![no_main]
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_nxp::gpio::{Input, Level, Output, Pull};
+// Must include `embassy_imxrt1011_examples` to ensure the FCB gets linked.
+use {defmt_rtt as _, embassy_imxrt1011_examples as _, panic_probe as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    let p = embassy_nxp::init(Default::default());
+    info!("Hello world!");
+    /* Pick the pins to use depending on your board. */
+    // IMXRT1010-EVK
+    //
+    // LED (D25) and user button (SW4)
+    let (led, button) = (p.GPIO_11, p.GPIO_SD_05);
+    // Adafruit Metro M7 (both microSD and AirLift variants)
+    //
+    // The LED is connected to D13 on the board.
+    //
+    // In particular the Metro M7 has no board user buttons, so you will need to connect a button.
+    // Any other GPIO pin can be used. GPIO_04 is used for example since it is on pin D12.
+    // let (led, button) = (p.GPIO_03, p.GPIO_04);
+    // Makerdiary iMX RT1011 Nano Kit
+    //
+    // LED0 and user button.
+    // let (led, button) = (p.GPIO_SD_04, p.GPIO_SD_03);
+    let mut button = Input::new(button, Pull::Up100K);
+    let mut led = Output::new(led, Level::Low);
+    led.set_high();
+    loop {
+        button.wait_for_falling_edge().await;
+        info!("Toggled");
+        led.toggle();
+        // The RT1010EVK has a 100 nF debouncing capacitor which results in false positive events
+        // when listening for a falling edge in a loop, wait for the rising edge and then wait for
+        // stabilization.
+        button.wait_for_rising_edge().await;
+        // Stabilization.
+        for _ in 0..100_000 {
+            cortex_m::asm::nop();
+        }
+    }
+}
diff --git a/examples/mimxrt1011/src/lib.rs b/examples/mimxrt1011/src/lib.rs
new file mode 100644
index 000000000..f0391ef57
--- /dev/null
+++ b/examples/mimxrt1011/src/lib.rs
@@ -0,0 +1,75 @@
+//! FlexSPI configuration block (FCB) for iMXRT1011 boards.
+//!
+//! This is a generic FCB that should work with most QSPI flash.
+#![no_std]
+use imxrt_boot_gen::flexspi;
+use imxrt_boot_gen::flexspi::opcodes::sdr::*;
+use imxrt_boot_gen::flexspi::{
+    ColumnAddressWidth, Command, DeviceModeConfiguration, FlashPadType, Instr, LookupTable, Pads,
+    ReadSampleClockSource, Sequence, SequenceBuilder, SerialClockFrequency, SerialFlashRegion,
+    WaitTimeConfigurationCommands,
+};
+use imxrt_boot_gen::serial_flash::nor;
+/// While the IMXRT1010-EVK and Makerdiary iMX RT1011 Nano Kit have 128MBit of flash we limit to 64Mbit
+/// to allow the Metro M7 boards to use the same FCB configuration.
+const DENSITY_BITS: u32 = 64 * 1024 * 1024;
+const DENSITY_BYTES: u32 = DENSITY_BITS / 8;
+const SEQ_READ: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0xEB))
+    .instr(Instr::new(RADDR, Pads::Four, 0x18))
+    .instr(Instr::new(DUMMY, Pads::Four, 0x06))
+    .instr(Instr::new(READ, Pads::Four, 0x04))
+    .build();
+const SEQ_READ_STATUS: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0x05))
+    .instr(Instr::new(READ, Pads::One, 0x01))
+    .build();
+const SEQ_WRITE_ENABLE: Sequence = SequenceBuilder::new().instr(Instr::new(CMD, Pads::One, 0x06)).build();
+const SEQ_ERASE_SECTOR: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0x20))
+    .instr(Instr::new(RADDR, Pads::One, 0x18))
+    .build();
+const SEQ_PAGE_PROGRAM: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0x02))
+    .instr(Instr::new(RADDR, Pads::One, 0x18))
+    .instr(Instr::new(WRITE, Pads::One, 0x04))
+    .build();
+const SEQ_CHIP_ERASE: Sequence = SequenceBuilder::new().instr(Instr::new(CMD, Pads::One, 0x60)).build();
+const LUT: LookupTable = LookupTable::new()
+    .command(Command::Read, SEQ_READ)
+    .command(Command::ReadStatus, SEQ_READ_STATUS)
+    .command(Command::WriteEnable, SEQ_WRITE_ENABLE)
+    .command(Command::EraseSector, SEQ_ERASE_SECTOR)
+    .command(Command::PageProgram, SEQ_PAGE_PROGRAM)
+    .command(Command::ChipErase, SEQ_CHIP_ERASE);
+const COMMON_CONFIGURATION_BLOCK: flexspi::ConfigurationBlock = flexspi::ConfigurationBlock::new(LUT)
+    .read_sample_clk_src(ReadSampleClockSource::LoopbackFromDQSPad)
+    .cs_hold_time(0x03)
+    .cs_setup_time(0x03)
+    .column_address_width(ColumnAddressWidth::OtherDevices)
+    .device_mode_configuration(DeviceModeConfiguration::Disabled)
+    .wait_time_cfg_commands(WaitTimeConfigurationCommands::disable())
+    .flash_size(SerialFlashRegion::A1, DENSITY_BYTES)
+    .serial_clk_freq(SerialClockFrequency::MHz120)
+    .serial_flash_pad_type(FlashPadType::Quad);
+pub const SERIAL_NOR_CONFIGURATION_BLOCK: nor::ConfigurationBlock =
+    nor::ConfigurationBlock::new(COMMON_CONFIGURATION_BLOCK)
+        .page_size(256)
+        .sector_size(4096)
+        .ip_cmd_serial_clk_freq(nor::SerialClockFrequency::MHz30);
+#[unsafe(no_mangle)]
+#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".fcb")]
+pub static FLEXSPI_CONFIGURATION_BLOCK: nor::ConfigurationBlock = SERIAL_NOR_CONFIGURATION_BLOCK;
diff --git a/examples/mimxrt1062-evk/.cargo/config.toml b/examples/mimxrt1062-evk/.cargo/config.toml
new file mode 100644
index 000000000..ca4c606dc
--- /dev/null
+++ b/examples/mimxrt1062-evk/.cargo/config.toml
@@ -0,0 +1,8 @@
+[target.thumbv7em-none-eabihf]
+runner = 'probe-rs run --chip MIMXRT1060'
+[build]
+target = "thumbv7em-none-eabihf" # Cortex-M7
+[env]
+DEFMT_LOG = "trace"
diff --git a/examples/mimxrt1062-evk/Cargo.toml b/examples/mimxrt1062-evk/Cargo.toml
new file mode 100644
index 000000000..430a26b41
--- /dev/null
+++ b/examples/mimxrt1062-evk/Cargo.toml
@@ -0,0 +1,29 @@
+[package]
+name = "embassy-imxrt1062-evk-examples"
+version = "0.1.0"
+edition = "2021"
+license = "MIT or Apache-2.0"
+[dependencies]
+cortex-m = { version = "0.7.7", features = ["inline-asm", "critical-section-single-core"] }
+cortex-m-rt = "0.7.3"
+defmt = "1.0.1"
+defmt-rtt = "1.0.0"
+embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
+embassy-futures = { version = "0.1.1", path = "../../embassy-futures" }
+embassy-nxp = { version = "0.1.0", path = "../../embassy-nxp", features = ["defmt", "mimxrt1062", "unstable-pac", "time-driver-pit"] }
+embassy-time = { version = "0.4", path = "../../embassy-time", features = ["defmt", ] } # "defmt-timestamp-uptime"
+embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
+embedded-hal-1 = { package = "embedded-hal", version = "1.0" }
+embedded-hal-async = "1.0.0"
+imxrt-boot-gen = { version = "0.3.4", features = ["imxrt1060"] }
+panic-probe = { version = "1.0.0", features = ["print-defmt"] }
+panic-semihosting = "0.6.0"
+[build-dependencies]
+imxrt-rt = { version = "0.1.7", features = ["device"] }
+[profile.release]
+debug = 2
diff --git a/examples/mimxrt1062-evk/build.rs b/examples/mimxrt1062-evk/build.rs
new file mode 100644
index 000000000..e0e0d547e
--- /dev/null
+++ b/examples/mimxrt1062-evk/build.rs
@@ -0,0 +1,12 @@
+use imxrt_rt::{Family, RuntimeBuilder};
+fn main() {
+    RuntimeBuilder::from_flexspi(Family::Imxrt1060, 8 * 1024 * 1024)
+        .build()
+        .unwrap();
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+    // Not link.x, as imxrt-rt needs to do some special things
+    println!("cargo:rustc-link-arg-bins=-Timxrt-link.x");
+}
diff --git a/examples/mimxrt1062-evk/src/bin/blinky.rs b/examples/mimxrt1062-evk/src/bin/blinky.rs
new file mode 100644
index 000000000..b6d90d94d
--- /dev/null
+++ b/examples/mimxrt1062-evk/src/bin/blinky.rs
@@ -0,0 +1,25 @@
+#![no_std]
+#![no_main]
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_nxp::gpio::{Level, Output};
+use embassy_time::Timer;
+// Must include `embassy_imxrt1062_evk_examples` to ensure the FCB gets linked.
+use {defmt_rtt as _, embassy_imxrt1062_evk_examples as _, panic_probe as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    let p = embassy_nxp::init(Default::default());
+    info!("Hello world!");
+    let led = p.GPIO_AD_B0_08;
+    let mut led = Output::new(led, Level::Low);
+    loop {
+        Timer::after_millis(500).await;
+        info!("Toggle");
+        led.toggle();
+    }
+}
diff --git a/examples/mimxrt1062-evk/src/bin/button.rs b/examples/mimxrt1062-evk/src/bin/button.rs
new file mode 100644
index 000000000..d60fa3dac
--- /dev/null
+++ b/examples/mimxrt1062-evk/src/bin/button.rs
@@ -0,0 +1,36 @@
+#![no_std]
+#![no_main]
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_nxp::gpio::{Input, Level, Output, Pull};
+use {defmt_rtt as _, embassy_imxrt1062_evk_examples as _, panic_probe as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    let p = embassy_nxp::init(Default::default());
+    info!("Hello world!");
+    // User LED (D8)
+    let led = p.GPIO_AD_B0_08;
+    // User button (SW5)
+    let button = p.WAKEUP;
+    let mut button = Input::new(button, Pull::Up100K);
+    let mut led = Output::new(led, Level::Low);
+    led.set_high();
+    loop {
+        button.wait_for_falling_edge().await;
+        info!("Toggled");
+        led.toggle();
+        // Software debounce.
+        button.wait_for_rising_edge().await;
+        // Stabilization.
+        for _ in 0..100_000 {
+            cortex_m::asm::nop();
+        }
+    }
+}
diff --git a/examples/mimxrt1062-evk/src/lib.rs b/examples/mimxrt1062-evk/src/lib.rs
new file mode 100644
index 000000000..3f99f9db3
--- /dev/null
+++ b/examples/mimxrt1062-evk/src/lib.rs
@@ -0,0 +1,60 @@
+//! FlexSPI configuration block (FCB) for the iMXRT1060-EVK
+//!
+//! This uses IS25WP QuadSPI flash.
+#![no_std]
+use imxrt_boot_gen::flexspi::opcodes::sdr::*;
+use imxrt_boot_gen::flexspi::{self, FlashPadType, ReadSampleClockSource, SerialClockFrequency, SerialFlashRegion, *};
+use imxrt_boot_gen::serial_flash::*;
+pub use nor::ConfigurationBlock;
+const SEQ_READ: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0xEB))
+    .instr(Instr::new(RADDR, Pads::Four, 0x18))
+    .instr(Instr::new(DUMMY, Pads::Four, 0x06))
+    .instr(Instr::new(READ, Pads::Four, 0x04))
+    .build();
+const SEQ_READ_STATUS: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0x05))
+    .instr(Instr::new(READ, Pads::One, 0x04))
+    .build();
+const SEQ_WRITE_ENABLE: Sequence = SequenceBuilder::new().instr(Instr::new(CMD, Pads::One, 0x06)).build();
+const SEQ_ERASE_SECTOR: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0x20))
+    .instr(Instr::new(RADDR, Pads::One, 0x18))
+    .build();
+const SEQ_PAGE_PROGRAM: Sequence = SequenceBuilder::new()
+    .instr(Instr::new(CMD, Pads::One, 0x02))
+    .instr(Instr::new(RADDR, Pads::One, 0x18))
+    .instr(Instr::new(WRITE, Pads::One, 0x04))
+    .build();
+const SEQ_CHIP_ERASE: Sequence = SequenceBuilder::new().instr(Instr::new(CMD, Pads::One, 0x60)).build();
+const LUT: LookupTable = LookupTable::new()
+    .command(Command::Read, SEQ_READ)
+    .command(Command::ReadStatus, SEQ_READ_STATUS)
+    .command(Command::WriteEnable, SEQ_WRITE_ENABLE)
+    .command(Command::EraseSector, SEQ_ERASE_SECTOR)
+    .command(Command::PageProgram, SEQ_PAGE_PROGRAM)
+    .command(Command::ChipErase, SEQ_CHIP_ERASE);
+const COMMON_CONFIGURATION_BLOCK: flexspi::ConfigurationBlock = flexspi::ConfigurationBlock::new(LUT)
+    .version(Version::new(1, 4, 0))
+    .read_sample_clk_src(ReadSampleClockSource::LoopbackFromDQSPad)
+    .cs_hold_time(3)
+    .cs_setup_time(3)
+    .controller_misc_options(0x10)
+    .serial_flash_pad_type(FlashPadType::Quad)
+    .serial_clk_freq(SerialClockFrequency::MHz133)
+    .flash_size(SerialFlashRegion::A1, 8 * 1024 * 1024);
+pub const SERIAL_NOR_CONFIGURATION_BLOCK: nor::ConfigurationBlock =
+    nor::ConfigurationBlock::new(COMMON_CONFIGURATION_BLOCK)
+        .page_size(256)
+        .sector_size(4096)
+        .ip_cmd_serial_clk_freq(nor::SerialClockFrequency::MHz30);
+#[no_mangle]
+#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".fcb")]
+pub static FLEXSPI_CONFIGURATION_BLOCK: nor::ConfigurationBlock = SERIAL_NOR_CONFIGURATION_BLOCK;
diff --git a/examples/mspm0g3507/.cargo/config.toml b/examples/mspm0g3507/.cargo/config.toml
index 34c720cdd..e711afaf2 100644
--- a/examples/mspm0g3507/.cargo/config.toml
+++ b/examples/mspm0g3507/.cargo/config.toml
@@ -6,4 +6,4 @@ runner = "probe-rs run --chip MSPM0G3507 --protocol=swd"
 target = "thumbv6m-none-eabi"
 [env]
-DEFMT_LOG = "debug"
+DEFMT_LOG = "trace"
diff --git a/examples/mspm0g3507/Cargo.toml b/examples/mspm0g3507/Cargo.toml
index b6621c9c5..cc40b3109 100644
--- a/examples/mspm0g3507/Cargo.toml
+++ b/examples/mspm0g3507/Cargo.toml
@@ -17,5 +17,7 @@ defmt-rtt = "1.0.0"
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 panic-semihosting = "0.6.0"
+embedded-io-async = "0.6.1"
 [profile.release]
 debug = 2
diff --git a/examples/nrf-rtos-trace/Cargo.toml b/examples/nrf-rtos-trace/Cargo.toml
index d9e8ca2f9..f1c40192d 100644
--- a/examples/nrf-rtos-trace/Cargo.toml
+++ b/examples/nrf-rtos-trace/Cargo.toml
@@ -18,7 +18,7 @@ log = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync" }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "rtos-trace"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time" }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] }
 cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
diff --git a/examples/nrf51/Cargo.toml b/examples/nrf51/Cargo.toml
index 91f78737f..a21d7f6ce 100644
--- a/examples/nrf51/Cargo.toml
+++ b/examples/nrf51/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["defmt", "nrf51", "gpiote", "time-driver-rtc1", "unstable-pac", "time", "rt"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "gpiote", "time-driver-rtc1", "unstable-pac", "time", "rt"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52810/Cargo.toml b/examples/nrf52810/Cargo.toml
index 87da89efe..baa873f22 100644
--- a/examples/nrf52810/Cargo.toml
+++ b/examples/nrf52810/Cargo.toml
@@ -9,7 +9,7 @@ embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52840-rtic/Cargo.toml b/examples/nrf52840-rtic/Cargo.toml
index afd269f72..3e499e9bc 100644
--- a/examples/nrf52840-rtic/Cargo.toml
+++ b/examples/nrf52840-rtic/Cargo.toml
@@ -11,7 +11,7 @@ embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = [ "defmt", "defmt-timestamp-uptime"] }
 embassy-time-queue-utils = { version = "0.1", path = "../../embassy-time-queue-utils", features = ["generic-queue-8"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = [ "defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = [ "defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf52840/Cargo.toml b/examples/nrf52840/Cargo.toml
index 4140e49d2..d2baebf8e 100644
--- a/examples/nrf52840/Cargo.toml
+++ b/examples/nrf52840/Cargo.toml
@@ -9,9 +9,9 @@ embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embedded-io = { version = "0.6.0", features = ["defmt-03"]  }
 embedded-io-async = { version = "0.6.1", features = ["defmt-03"] }
 embassy-net-esp-hosted = { version = "0.2.0", path = "../../embassy-net-esp-hosted", features = ["defmt"] }
diff --git a/examples/nrf52840/src/bin/self_spawn_current_executor.rs b/examples/nrf52840/src/bin/self_spawn_current_executor.rs
index ec9569a64..ddb40dc53 100644
--- a/examples/nrf52840/src/bin/self_spawn_current_executor.rs
+++ b/examples/nrf52840/src/bin/self_spawn_current_executor.rs
@@ -10,7 +10,8 @@ use {defmt_rtt as _, panic_probe as _};
 async fn my_task(n: u32) {
    Timer::after_secs(1).await;
    info!("Spawning self! {}", n);
-    unwrap!(Spawner::for_current_executor().await.spawn(my_task(n + 1)));
+    let spawner = unsafe { Spawner::for_current_executor().await };
+    unwrap!(spawner.spawn(my_task(n + 1)));
 }
 #[embassy_executor::main]
diff --git a/examples/nrf5340/Cargo.toml b/examples/nrf5340/Cargo.toml
index dc4fba4fd..bdebd5386 100644
--- a/examples/nrf5340/Cargo.toml
+++ b/examples/nrf5340/Cargo.toml
@@ -9,9 +9,9 @@ embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embedded-io-async = { version = "0.6.1" }
 defmt = "1.0.1"
diff --git a/examples/nrf54l15/Cargo.toml b/examples/nrf54l15/Cargo.toml
index 4b229d06d..27d5babee 100644
--- a/examples/nrf54l15/Cargo.toml
+++ b/examples/nrf54l15/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["defmt", "nrf54l15-app-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["defmt", "nrf54l15-app-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf9151/ns/Cargo.toml b/examples/nrf9151/ns/Cargo.toml
index a083aa5e7..2a492b595 100644
--- a/examples/nrf9151/ns/Cargo.toml
+++ b/examples/nrf9151/ns/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-executor = { version = "0.7.0", path = "../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-ns", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-ns", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf9151/s/Cargo.toml b/examples/nrf9151/s/Cargo.toml
index ae98631ef..62ef3e4ce 100644
--- a/examples/nrf9151/s/Cargo.toml
+++ b/examples/nrf9151/s/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-executor = { version = "0.7.0", path = "../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../../embassy-nrf", features = ["defmt", "nrf9120-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
diff --git a/examples/nrf9160/Cargo.toml b/examples/nrf9160/Cargo.toml
index 25aedf624..c896afdbe 100644
--- a/examples/nrf9160/Cargo.toml
+++ b/examples/nrf9160/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-nrf = { version = "0.3.1", path = "../../embassy-nrf", features = ["defmt", "nrf9160-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
+embassy-nrf = { version = "0.5.0", path = "../../embassy-nrf", features = ["defmt", "nrf9160-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] }
 embassy-net-nrf91 = { version = "0.1.0", path = "../../embassy-net-nrf91", features = ["defmt"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "proto-ipv4", "medium-ip"] }
diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml
index c8a132a5e..eefd69315 100644
--- a/examples/rp/Cargo.toml
+++ b/examples/rp/Cargo.toml
@@ -6,18 +6,18 @@ license = "MIT OR Apache-2.0"
 [dependencies]
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal", features = ["defmt"] }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal", features = ["defmt"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-rp = { version = "0.4.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl", "rp2040"] }
+embassy-rp = { version = "0.6.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl", "rp2040"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "icmp", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet", "dns", "proto-ipv4", "proto-ipv6", "multicast"] }
 embassy-net-wiznet = { version = "0.2.0", path = "../../embassy-net-wiznet", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
-embassy-usb-logger = { version = "0.4.0", path = "../../embassy-usb-logger" }
+embassy-usb-logger = { version = "0.5.0", path = "../../embassy-usb-logger" }
-cyw43 = { version = "0.3.0", path = "../../cyw43", features = ["defmt", "firmware-logs"] }
+cyw43 = { version = "0.4.0", path = "../../cyw43", features = ["defmt", "firmware-logs"] }
-cyw43-pio = { version = "0.4.0", path = "../../cyw43-pio", features = ["defmt"] }
+cyw43-pio = { version = "0.5.1", path = "../../cyw43-pio", features = ["defmt"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
@@ -58,11 +58,5 @@ rand = { version = "0.9.0", default-features = false }
 embedded-sdmmc = "0.7.0"
 [profile.release]
-debug = 2
+# Enable generation of debug symbols even on release builds
-lto = true
+debug = true
-opt-level = 'z'
-[profile.dev]
-debug = 2
-lto = true
-opt-level = "z"
diff --git a/examples/rp/src/bin/usb_raw_bulk.rs b/examples/rp/src/bin/usb_raw_bulk.rs
index 103269791..0747901d1 100644
--- a/examples/rp/src/bin/usb_raw_bulk.rs
+++ b/examples/rp/src/bin/usb_raw_bulk.rs
@@ -96,8 +96,8 @@ async fn main(_spawner: Spawner) {
    let mut function = builder.function(0xFF, 0, 0);
    let mut interface = function.interface();
    let mut alt = interface.alt_setting(0xFF, 0, 0, None);
-    let mut read_ep = alt.endpoint_bulk_out(64);
+    let mut read_ep = alt.endpoint_bulk_out(None, 64);
-    let mut write_ep = alt.endpoint_bulk_in(64);
+    let mut write_ep = alt.endpoint_bulk_in(None, 64);
    drop(function);
    // Build the builder.
diff --git a/examples/rp/src/bin/usb_webusb.rs b/examples/rp/src/bin/usb_webusb.rs
index a5dc94d5b..5cecb92f0 100644
--- a/examples/rp/src/bin/usb_webusb.rs
+++ b/examples/rp/src/bin/usb_webusb.rs
@@ -125,8 +125,8 @@ impl<'d, D: Driver<'d>> WebEndpoints<'d, D> {
        let mut iface = func.interface();
        let mut alt = iface.alt_setting(0xff, 0x00, 0x00, None);
-        let write_ep = alt.endpoint_bulk_in(config.max_packet_size);
+        let write_ep = alt.endpoint_bulk_in(None, config.max_packet_size);
-        let read_ep = alt.endpoint_bulk_out(config.max_packet_size);
+        let read_ep = alt.endpoint_bulk_out(None, config.max_packet_size);
        WebEndpoints { write_ep, read_ep }
    }
diff --git a/examples/rp235x/Cargo.toml b/examples/rp235x/Cargo.toml
index c81b79ae1..4d3dc77b5 100644
--- a/examples/rp235x/Cargo.toml
+++ b/examples/rp235x/Cargo.toml
@@ -6,18 +6,18 @@ license = "MIT OR Apache-2.0"
 [dependencies]
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal", features = ["defmt"] }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal", features = ["defmt"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
-embassy-rp = { version = "0.4.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl", "rp235xa", "binary-info"] }
+embassy-rp = { version = "0.6.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl", "rp235xa", "binary-info"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet", "dns"] }
 embassy-net-wiznet = { version = "0.2.0", path = "../../embassy-net-wiznet", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
-embassy-usb-logger = { version = "0.4.0", path = "../../embassy-usb-logger" }
+embassy-usb-logger = { version = "0.5.0", path = "../../embassy-usb-logger" }
-cyw43 = { version = "0.3.0", path = "../../cyw43", features = ["defmt", "firmware-logs"] }
+cyw43 = { version = "0.4.0", path = "../../cyw43", features = ["defmt", "firmware-logs"] }
-cyw43-pio = { version = "0.4.0", path = "../../cyw43-pio", features = ["defmt"] }
+cyw43-pio = { version = "0.5.1", path = "../../cyw43-pio", features = ["defmt"] }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"
@@ -58,8 +58,5 @@ log = "0.4"
 embedded-sdmmc = "0.7.0"
 [profile.release]
-debug = 2
+# Enable generation of debug symbols even on release builds
+debug = true
-[profile.dev]
-lto = true
-opt-level = "z"
diff --git a/examples/rp235x/memory.x b/examples/rp235x/memory.x
index c803896f6..4382e2065 100644
--- a/examples/rp235x/memory.x
+++ b/examples/rp235x/memory.x
@@ -17,8 +17,8 @@ MEMORY {
     * of access times.
     * Example: Separate stacks for core0 and core1.
     */
-    SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
+    SRAM8 : ORIGIN = 0x20080000, LENGTH = 4K
-    SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
+    SRAM9 : ORIGIN = 0x20081000, LENGTH = 4K
 }
 SECTIONS {
diff --git a/examples/rp235x/src/bin/blinky_wifi.rs b/examples/rp235x/src/bin/blinky_wifi.rs
index 8c352ebc4..ef6057a1c 100644
--- a/examples/rp235x/src/bin/blinky_wifi.rs
+++ b/examples/rp235x/src/bin/blinky_wifi.rs
@@ -5,7 +5,7 @@
 #![no_std]
 #![no_main]
-use cyw43_pio::{PioSpi, DEFAULT_CLOCK_DIVIDER};
+use cyw43_pio::{PioSpi, RM2_CLOCK_DIVIDER};
 use defmt::*;
 use embassy_executor::Spawner;
 use embassy_rp::bind_interrupts;
@@ -58,7 +58,9 @@ async fn main(spawner: Spawner) {
    let spi = PioSpi::new(
        &mut pio.common,
        pio.sm0,
-        DEFAULT_CLOCK_DIVIDER,
+        // SPI communication won't work if the speed is too high, so we use a divider larger than `DEFAULT_CLOCK_DIVIDER`.
+        // See: https://github.com/embassy-rs/embassy/issues/3960.
+        RM2_CLOCK_DIVIDER,
        pio.irq0,
        cs,
        p.PIN_24,
diff --git a/examples/rp235x/src/bin/usb_webusb.rs b/examples/rp235x/src/bin/usb_webusb.rs
index 75d28c853..a68163b61 100644
--- a/examples/rp235x/src/bin/usb_webusb.rs
+++ b/examples/rp235x/src/bin/usb_webusb.rs
@@ -125,8 +125,8 @@ impl<'d, D: Driver<'d>> WebEndpoints<'d, D> {
        let mut iface = func.interface();
        let mut alt = iface.alt_setting(0xff, 0x00, 0x00, None);
-        let write_ep = alt.endpoint_bulk_in(config.max_packet_size);
+        let write_ep = alt.endpoint_bulk_in(None, config.max_packet_size);
-        let read_ep = alt.endpoint_bulk_out(config.max_packet_size);
+        let read_ep = alt.endpoint_bulk_out(None, config.max_packet_size);
        WebEndpoints { write_ep, read_ep }
    }
diff --git a/examples/stm32c0/Cargo.toml b/examples/stm32c0/Cargo.toml
index 4cf07cef4..70a7b0895 100644
--- a/examples/stm32c0/Cargo.toml
+++ b/examples/stm32c0/Cargo.toml
@@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 # Change stm32c031c6 to your chip name, if necessary.
-embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32c031c6", "memory-x", "unstable-pac", "exti"]  }
+embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32c031c6", "memory-x", "unstable-pac", "exti", "chrono"]  }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
@@ -19,6 +19,7 @@ cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
 panic-probe = { version = "1.0.0", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }
+chrono = { version = "^0.4", default-features = false}
 [profile.release]
 debug = 2
diff --git a/examples/stm32c0/src/bin/rtc.rs b/examples/stm32c0/src/bin/rtc.rs
new file mode 100644
index 000000000..82d8a37ba
--- /dev/null
+++ b/examples/stm32c0/src/bin/rtc.rs
@@ -0,0 +1,35 @@
+#![no_std]
+#![no_main]
+use chrono::{NaiveDate, NaiveDateTime};
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_stm32::rtc::{Rtc, RtcConfig};
+use embassy_stm32::Config;
+use embassy_time::Timer;
+use {defmt_rtt as _, panic_probe as _};
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let config = Config::default();
+    let p = embassy_stm32::init(config);
+    info!("Hello World!");
+    let now = NaiveDate::from_ymd_opt(2020, 5, 15)
+        .unwrap()
+        .and_hms_opt(10, 30, 15)
+        .unwrap();
+    let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
+    rtc.set_datetime(now.into()).expect("datetime not set");
+    loop {
+        let now: NaiveDateTime = rtc.now().unwrap().into();
+        info!("{}", now.and_utc().timestamp());
+        Timer::after_millis(1000).await;
+    }
+}
diff --git a/examples/stm32f0/src/bin/adc-watchdog.rs b/examples/stm32f0/src/bin/adc-watchdog.rs
new file mode 100644
index 000000000..ff98aac8e
--- /dev/null
+++ b/examples/stm32f0/src/bin/adc-watchdog.rs
@@ -0,0 +1,34 @@
+#![no_std]
+#![no_main]
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_stm32::adc::{self, Adc, WatchdogChannels};
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::peripherals::ADC1;
+use {defmt_rtt as _, panic_probe as _};
+bind_interrupts!(struct Irqs {
+    ADC1_COMP => adc::InterruptHandler<ADC1>;
+});
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_stm32::init(Default::default());
+    info!("ADC watchdog example");
+    let mut adc = Adc::new(p.ADC1, Irqs);
+    let pin = p.PC1;
+    loop {
+        // Wait for pin to go high
+        adc.init_watchdog(WatchdogChannels::from_channel(&pin), 0, 0x07F);
+        let v_high = adc.monitor_watchdog().await;
+        info!("ADC sample is high {}", v_high);
+        // Wait for pin to go low
+        adc.init_watchdog(WatchdogChannels::from_channel(&pin), 0x01f, 0xFFF);
+        let v_low = adc.monitor_watchdog().await;
+        info!("ADC sample is low {}", v_low);
+    }
+}
diff --git a/examples/stm32f1/Cargo.toml b/examples/stm32f1/Cargo.toml
index 261733305..01f4fd84a 100644
--- a/examples/stm32f1/Cargo.toml
+++ b/examples/stm32f1/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32f1/src/bin/input_capture.rs b/examples/stm32f1/src/bin/input_capture.rs
index 6fe8e0b50..84811fb95 100644
--- a/examples/stm32f1/src/bin/input_capture.rs
+++ b/examples/stm32f1/src/bin/input_capture.rs
@@ -39,7 +39,7 @@ async fn main(spawner: Spawner) {
    unwrap!(spawner.spawn(blinky(p.PC13)));
-    let ch3 = CapturePin::new_ch3(p.PA2, Pull::None);
+    let ch3 = CapturePin::new(p.PA2, Pull::None);
    let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default());
    loop {
diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs
index afbef3edb..aa6a11ff8 100644
--- a/examples/stm32f1/src/bin/pwm_input.rs
+++ b/examples/stm32f1/src/bin/pwm_input.rs
@@ -38,7 +38,7 @@ async fn main(spawner: Spawner) {
    unwrap!(spawner.spawn(blinky(p.PC13)));
-    let mut pwm_input = PwmInput::new(p.TIM2, p.PA0, Pull::None, khz(10));
+    let mut pwm_input = PwmInput::new_ch1(p.TIM2, p.PA0, Pull::None, khz(10));
    pwm_input.enable();
    loop {
diff --git a/examples/stm32f3/Cargo.toml b/examples/stm32f3/Cargo.toml
index f675b0be1..ab7d6b255 100644
--- a/examples/stm32f3/Cargo.toml
+++ b/examples/stm32f3/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32f334/Cargo.toml b/examples/stm32f334/Cargo.toml
index b47a81e1b..6595804e1 100644
--- a/examples/stm32f334/Cargo.toml
+++ b/examples/stm32f334/Cargo.toml
@@ -9,7 +9,7 @@ embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["de
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f334r8", "unstable-pac", "memory-x", "time-driver-any", "exti"]  }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml
index edab9ea00..80c43f2ab 100644
--- a/examples/stm32f4/Cargo.toml
+++ b/examples/stm32f4/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt" ] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt" ] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] }
 embassy-net-wiznet = { version = "0.2.0", path = "../../embassy-net-wiznet", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
diff --git a/examples/stm32f4/src/bin/input_capture.rs b/examples/stm32f4/src/bin/input_capture.rs
index fe5e2bdfc..e15b4d26e 100644
--- a/examples/stm32f4/src/bin/input_capture.rs
+++ b/examples/stm32f4/src/bin/input_capture.rs
@@ -39,7 +39,7 @@ async fn main(spawner: Spawner) {
    unwrap!(spawner.spawn(blinky(p.PB2)));
-    let ch3 = CapturePin::new_ch3(p.PB10, Pull::None);
+    let ch3 = CapturePin::new(p.PB10, Pull::None);
    let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default());
    loop {
diff --git a/examples/stm32f4/src/bin/pwm.rs b/examples/stm32f4/src/bin/pwm.rs
index 04811162b..e385842f0 100644
--- a/examples/stm32f4/src/bin/pwm.rs
+++ b/examples/stm32f4/src/bin/pwm.rs
@@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
    info!("Hello World!");
-    let ch1_pin = PwmPin::new_ch1(p.PE9, OutputType::PushPull);
+    let ch1_pin = PwmPin::new(p.PE9, OutputType::PushPull);
    let mut pwm = SimplePwm::new(p.TIM1, Some(ch1_pin), None, None, None, khz(10), Default::default());
    let mut ch1 = pwm.ch1();
    ch1.enable();
diff --git a/examples/stm32f4/src/bin/pwm_complementary.rs b/examples/stm32f4/src/bin/pwm_complementary.rs
index 161f43c48..c981f1a76 100644
--- a/examples/stm32f4/src/bin/pwm_complementary.rs
+++ b/examples/stm32f4/src/bin/pwm_complementary.rs
@@ -16,8 +16,8 @@ async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
    info!("Hello World!");
-    let ch1 = PwmPin::new_ch1(p.PE9, OutputType::PushPull);
+    let ch1 = PwmPin::new(p.PE9, OutputType::PushPull);
-    let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull);
+    let ch1n = ComplementaryPwmPin::new(p.PA7, OutputType::PushPull);
    let mut pwm = ComplementaryPwm::new(
        p.TIM1,
        Some(ch1),
diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs
index 465cbe4f5..74167cbf2 100644
--- a/examples/stm32f4/src/bin/pwm_input.rs
+++ b/examples/stm32f4/src/bin/pwm_input.rs
@@ -38,7 +38,7 @@ async fn main(spawner: Spawner) {
    unwrap!(spawner.spawn(blinky(p.PB2)));
-    let mut pwm_input = PwmInput::new(p.TIM3, p.PA6, Pull::None, khz(10));
+    let mut pwm_input = PwmInput::new_ch1(p.TIM3, p.PA6, Pull::None, khz(10));
    pwm_input.enable();
    loop {
diff --git a/examples/stm32f4/src/bin/ws2812_pwm.rs b/examples/stm32f4/src/bin/ws2812_pwm.rs
index ca924e181..5153e1cfd 100644
--- a/examples/stm32f4/src/bin/ws2812_pwm.rs
+++ b/examples/stm32f4/src/bin/ws2812_pwm.rs
@@ -50,7 +50,7 @@ async fn main(_spawner: Spawner) {
    let mut ws2812_pwm = SimplePwm::new(
        dp.TIM3,
-        Some(PwmPin::new_ch1(dp.PB4, OutputType::PushPull)),
+        Some(PwmPin::new(dp.PB4, OutputType::PushPull)),
        None,
        None,
        None,
diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml
index c5801ea90..5995211d2 100644
--- a/examples/stm32f7/Cargo.toml
+++ b/examples/stm32f7/Cargo.toml
@@ -12,7 +12,7 @@ embassy-executor = { version = "0.7.0", path = "../../embassy-executor", feature
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] }
 embedded-io-async = { version = "0.6.1" }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32f7/src/bin/cryp.rs b/examples/stm32f7/src/bin/cryp.rs
index 235853cb9..a31e9b4f2 100644
--- a/examples/stm32f7/src/bin/cryp.rs
+++ b/examples/stm32f7/src/bin/cryp.rs
@@ -68,7 +68,9 @@ async fn main(_spawner: Spawner) -> ! {
    );
    // Decrypt in software using AES-GCM 128-bit
-    let _ = cipher.decrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
+    cipher
+        .decrypt_in_place(&iv.into(), aad.into(), &mut payload_vec)
+        .unwrap();
    let sw_end_time = Instant::now();
    let sw_execution_time = sw_end_time - sw_start_time;
diff --git a/examples/stm32f7/src/bin/qspi.rs b/examples/stm32f7/src/bin/qspi.rs
index bd3287964..ab29ddeff 100644
--- a/examples/stm32f7/src/bin/qspi.rs
+++ b/examples/stm32f7/src/bin/qspi.rs
@@ -279,6 +279,7 @@ async fn main(_spawner: Spawner) -> ! {
        prescaler: 16,
        cs_high_time: ChipSelectHighTime::_1Cycle,
        fifo_threshold: FIFOThresholdLevel::_16Bytes,
+        sample_shifting: SampleShifting::None,
    };
    let driver = Qspi::new_bank1(
        p.QUADSPI, p.PF8, p.PF9, p.PE2, p.PF6, p.PF10, p.PB10, p.DMA2_CH7, config,
diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml
index bf1e7250e..1c290fcfa 100644
--- a/examples/stm32g0/Cargo.toml
+++ b/examples/stm32g0/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32g0/src/bin/hf_timer.rs b/examples/stm32g0/src/bin/hf_timer.rs
index dfb6e0edc..705905f01 100644
--- a/examples/stm32g0/src/bin/hf_timer.rs
+++ b/examples/stm32g0/src/bin/hf_timer.rs
@@ -37,8 +37,8 @@ async fn main(_spawner: Spawner) {
    }
    let p = embassy_stm32::init(config);
-    let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
+    let ch1 = PwmPin::new(p.PA8, OutputType::PushPull);
-    let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull);
+    let ch1n = ComplementaryPwmPin::new(p.PA7, OutputType::PushPull);
    let mut pwm = ComplementaryPwm::new(
        p.TIM1,
diff --git a/examples/stm32g0/src/bin/input_capture.rs b/examples/stm32g0/src/bin/input_capture.rs
index 08df4e043..df339d541 100644
--- a/examples/stm32g0/src/bin/input_capture.rs
+++ b/examples/stm32g0/src/bin/input_capture.rs
@@ -47,12 +47,12 @@ async fn main(spawner: Spawner) {
    unwrap!(spawner.spawn(blinky(p.PB1)));
    // Connect PB1 and PA8 with a 1k Ohm resistor
-    let ch1_pin = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
+    let ch1_pin = PwmPin::new(p.PA8, OutputType::PushPull);
    let mut pwm = SimplePwm::new(p.TIM1, Some(ch1_pin), None, None, None, khz(1), Default::default());
    pwm.ch1().enable();
    pwm.ch1().set_duty_cycle(50);
-    let ch1 = CapturePin::new_ch1(p.PA0, Pull::None);
+    let ch1 = CapturePin::new(p.PA0, Pull::None);
    let mut ic = InputCapture::new(p.TIM2, Some(ch1), None, None, None, Irqs, khz(1000), Default::default());
    let mut old_capture = 0;
diff --git a/examples/stm32g0/src/bin/pwm_complementary.rs b/examples/stm32g0/src/bin/pwm_complementary.rs
index 97b163c40..dbd9194c9 100644
--- a/examples/stm32g0/src/bin/pwm_complementary.rs
+++ b/examples/stm32g0/src/bin/pwm_complementary.rs
@@ -26,10 +26,10 @@ use {defmt_rtt as _, panic_probe as _};
 async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
-    let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
+    let ch1 = PwmPin::new(p.PA8, OutputType::PushPull);
-    let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull);
+    let ch1n = ComplementaryPwmPin::new(p.PA7, OutputType::PushPull);
-    let ch2 = PwmPin::new_ch2(p.PB3, OutputType::PushPull);
+    let ch2 = PwmPin::new(p.PB3, OutputType::PushPull);
-    let ch2n = ComplementaryPwmPin::new_ch2(p.PB0, OutputType::PushPull);
+    let ch2n = ComplementaryPwmPin::new(p.PB0, OutputType::PushPull);
    let mut pwm = ComplementaryPwm::new(
        p.TIM1,
diff --git a/examples/stm32g0/src/bin/pwm_input.rs b/examples/stm32g0/src/bin/pwm_input.rs
index 9d6b5fe97..fd4f53f1e 100644
--- a/examples/stm32g0/src/bin/pwm_input.rs
+++ b/examples/stm32g0/src/bin/pwm_input.rs
@@ -42,12 +42,12 @@ async fn main(spawner: Spawner) {
    unwrap!(spawner.spawn(blinky(p.PB1)));
    // Connect PA8 and PA6 with a 1k Ohm resistor
-    let ch1_pin = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
+    let ch1_pin = PwmPin::new(p.PA8, OutputType::PushPull);
    let mut pwm = SimplePwm::new(p.TIM1, Some(ch1_pin), None, None, None, khz(1), Default::default());
    pwm.ch1().set_duty_cycle_fraction(1, 4);
    pwm.ch1().enable();
-    let mut pwm_input = PwmInput::new(p.TIM2, p.PA0, Pull::None, khz(1000));
+    let mut pwm_input = PwmInput::new_ch1(p.TIM2, p.PA0, Pull::None, khz(1000));
    pwm_input.enable();
    loop {
diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml
index 3d2c2aa7d..a503420e5 100644
--- a/examples/stm32g4/Cargo.toml
+++ b/examples/stm32g4/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 usbd-hid = "0.8.1"
diff --git a/examples/stm32g4/src/bin/i2c_slave.rs b/examples/stm32g4/src/bin/i2c_slave.rs
new file mode 100644
index 000000000..a723a0e18
--- /dev/null
+++ b/examples/stm32g4/src/bin/i2c_slave.rs
@@ -0,0 +1,149 @@
+//! This example shows how to use an stm32 as both a master and a slave.
+#![no_std]
+#![no_main]
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_stm32::i2c::{Address, OwnAddresses, SlaveCommandKind};
+use embassy_stm32::mode::Async;
+use embassy_stm32::time::Hertz;
+use embassy_stm32::{bind_interrupts, i2c, peripherals};
+use embassy_time::Timer;
+use {defmt_rtt as _, panic_probe as _};
+bind_interrupts!(struct Irqs {
+    I2C1_ER => i2c::ErrorInterruptHandler<peripherals::I2C1>;
+    I2C1_EV => i2c::EventInterruptHandler<peripherals::I2C1>;
+    I2C2_ER => i2c::ErrorInterruptHandler<peripherals::I2C2>;
+    I2C2_EV => i2c::EventInterruptHandler<peripherals::I2C2>;
+});
+const DEV_ADDR: u8 = 0x42;
+#[embassy_executor::task]
+async fn device_task(mut dev: i2c::I2c<'static, Async, i2c::MultiMaster>) -> ! {
+    info!("Device start");
+    let mut state = 0;
+    loop {
+        let mut buf = [0u8; 128];
+        match dev.listen().await {
+            Ok(i2c::SlaveCommand {
+                kind: SlaveCommandKind::Read,
+                address: Address::SevenBit(DEV_ADDR),
+            }) => match dev.respond_to_read(&[state]).await {
+                Ok(i2c::SendStatus::LeftoverBytes(x)) => info!("tried to write {} extra bytes", x),
+                Ok(i2c::SendStatus::Done) => {}
+                Err(e) => error!("error while responding {}", e),
+            },
+            Ok(i2c::SlaveCommand {
+                kind: SlaveCommandKind::Write,
+                address: Address::SevenBit(DEV_ADDR),
+            }) => match dev.respond_to_write(&mut buf).await {
+                Ok(len) => {
+                    info!("Device received write: {}", buf[..len]);
+                    if match buf[0] {
+                        // Set the state
+                        0xC2 => {
+                            state = buf[1];
+                            true
+                        }
+                        // Reset State
+                        0xC8 => {
+                            state = 0;
+                            true
+                        }
+                        x => {
+                            error!("Invalid Write Read {:x}", x);
+                            false
+                        }
+                    } {
+                        match dev.respond_to_read(&[state]).await {
+                            Ok(read_status) => info!(
+                                "This read is part of a write/read transaction. The response read status {}",
+                                read_status
+                            ),
+                            Err(i2c::Error::Timeout) => {
+                                info!("The device only performed a write and it not also do a read")
+                            }
+                            Err(e) => error!("error while responding {}", e),
+                        }
+                    }
+                }
+                Err(e) => error!("error while receiving {}", e),
+            },
+            Ok(i2c::SlaveCommand { address, .. }) => {
+                defmt::unreachable!(
+                    "The slave matched address: {}, which it was not configured for",
+                    address
+                );
+            }
+            Err(e) => error!("{}", e),
+        }
+    }
+}
+#[embassy_executor::task]
+async fn controller_task(mut con: i2c::I2c<'static, Async, i2c::Master>) {
+    info!("Controller start");
+    loop {
+        let mut resp_buff = [0u8; 1];
+        for i in 0..10 {
+            match con.write_read(DEV_ADDR, &[0xC2, i], &mut resp_buff).await {
+                Ok(_) => {
+                    info!("write_read response: {}", resp_buff);
+                    defmt::assert_eq!(resp_buff[0], i);
+                }
+                Err(e) => error!("Error writing {}", e),
+            }
+            Timer::after_millis(100).await;
+        }
+        match con.read(DEV_ADDR, &mut resp_buff).await {
+            Ok(_) => {
+                info!("read response: {}", resp_buff);
+                // assert that the state is the last index that was written
+                defmt::assert_eq!(resp_buff[0], 9);
+            }
+            Err(e) => error!("Error writing {}", e),
+        }
+        match con.write_read(DEV_ADDR, &[0xC8], &mut resp_buff).await {
+            Ok(_) => {
+                info!("write_read response: {}", resp_buff);
+                // assert that the state has been reset
+                defmt::assert_eq!(resp_buff[0], 0);
+            }
+            Err(e) => error!("Error writing {}", e),
+        }
+        Timer::after_millis(100).await;
+    }
+}
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(Default::default());
+    info!("Hello World!");
+    let speed = Hertz::khz(400);
+    let config = i2c::Config::default();
+    let d_addr_config = i2c::SlaveAddrConfig {
+        addr: OwnAddresses::OA1(Address::SevenBit(DEV_ADDR)),
+        general_call: false,
+    };
+    let d_sda = p.PA8;
+    let d_scl = p.PA9;
+    let device = i2c::I2c::new(p.I2C2, d_scl, d_sda, Irqs, p.DMA1_CH1, p.DMA1_CH2, speed, config)
+        .into_slave_multimaster(d_addr_config);
+    unwrap!(spawner.spawn(device_task(device)));
+    let c_sda = p.PB8;
+    let c_scl = p.PB7;
+    let controller = i2c::I2c::new(p.I2C1, c_sda, c_scl, Irqs, p.DMA1_CH3, p.DMA1_CH4, speed, config);
+    unwrap!(spawner.spawn(controller_task(controller)));
+}
diff --git a/examples/stm32g4/src/bin/pwm.rs b/examples/stm32g4/src/bin/pwm.rs
index 6c965012c..5b4194927 100644
--- a/examples/stm32g4/src/bin/pwm.rs
+++ b/examples/stm32g4/src/bin/pwm.rs
@@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
    info!("Hello World!");
-    let ch1_pin = PwmPin::new_ch1(p.PC0, OutputType::PushPull);
+    let ch1_pin = PwmPin::new(p.PC0, OutputType::PushPull);
    let mut pwm = SimplePwm::new(p.TIM1, Some(ch1_pin), None, None, None, khz(10), Default::default());
    let mut ch1 = pwm.ch1();
    ch1.enable();
diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml
index f3fda7ff3..0ac9016d4 100644
--- a/examples/stm32h5/Cargo.toml
+++ b/examples/stm32h5/Cargo.toml
@@ -11,7 +11,7 @@ embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["de
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml
index 27c59d980..9053289ea 100644
--- a/examples/stm32h7/Cargo.toml
+++ b/examples/stm32h7/Cargo.toml
@@ -8,11 +8,11 @@ license = "MIT OR Apache-2.0"
 # Change stm32h743bi to your chip name, if necessary.
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["defmt", "stm32h743bi", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32h7/src/bin/i2c_shared.rs b/examples/stm32h7/src/bin/i2c_shared.rs
index 136b91eeb..655ff901f 100644
--- a/examples/stm32h7/src/bin/i2c_shared.rs
+++ b/examples/stm32h7/src/bin/i2c_shared.rs
@@ -25,7 +25,7 @@ const SHTC3_WAKEUP: [u8; 2] = [0x35, 0x17];
 const SHTC3_MEASURE_RH_FIRST: [u8; 2] = [0x5c, 0x24];
 const SHTC3_SLEEP: [u8; 2] = [0xb0, 0x98];
-static I2C_BUS: StaticCell<NoopMutex<RefCell<I2c<'static, Async>>>> = StaticCell::new();
+static I2C_BUS: StaticCell<NoopMutex<RefCell<I2c<'static, Async, i2c::Master>>>> = StaticCell::new();
 bind_interrupts!(struct Irqs {
    I2C1_EV => i2c::EventInterruptHandler<peripherals::I2C1>;
@@ -33,7 +33,7 @@ bind_interrupts!(struct Irqs {
 });
 #[embassy_executor::task]
-async fn temperature(mut i2c: I2cDevice<'static, NoopRawMutex, I2c<'static, Async>>) {
+async fn temperature(mut i2c: I2cDevice<'static, NoopRawMutex, I2c<'static, Async, i2c::Master>>) {
    let mut data = [0u8; 2];
    loop {
@@ -50,7 +50,7 @@ async fn temperature(mut i2c: I2cDevice<'static, NoopRawMutex, I2c<'static, Asyn
 }
 #[embassy_executor::task]
-async fn humidity(mut i2c: I2cDevice<'static, NoopRawMutex, I2c<'static, Async>>) {
+async fn humidity(mut i2c: I2cDevice<'static, NoopRawMutex, I2c<'static, Async, i2c::Master>>) {
    let mut data = [0u8; 6];
    loop {
diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs
index 8de31ea5b..12abb8693 100644
--- a/examples/stm32h7/src/bin/low_level_timer_api.rs
+++ b/examples/stm32h7/src/bin/low_level_timer_api.rs
@@ -6,7 +6,7 @@ use embassy_executor::Spawner;
 use embassy_stm32::gpio::{AfType, Flex, OutputType, Speed};
 use embassy_stm32::time::{khz, Hertz};
 use embassy_stm32::timer::low_level::{OutputCompareMode, Timer as LLTimer};
-use embassy_stm32::timer::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance32bit4Channel};
+use embassy_stm32::timer::{Ch1, Ch2, Ch3, Ch4, Channel, GeneralInstance32bit4Channel, TimerPin};
 use embassy_stm32::{Config, Peri};
 use embassy_time::Timer;
 use {defmt_rtt as _, panic_probe as _};
@@ -67,10 +67,10 @@ pub struct SimplePwm32<'d, T: GeneralInstance32bit4Channel> {
 impl<'d, T: GeneralInstance32bit4Channel> SimplePwm32<'d, T> {
    pub fn new(
        tim: Peri<'d, T>,
-        ch1: Peri<'d, impl Channel1Pin<T>>,
+        ch1: Peri<'d, impl TimerPin<T, Ch1>>,
-        ch2: Peri<'d, impl Channel2Pin<T>>,
+        ch2: Peri<'d, impl TimerPin<T, Ch2>>,
-        ch3: Peri<'d, impl Channel3Pin<T>>,
+        ch3: Peri<'d, impl TimerPin<T, Ch3>>,
-        ch4: Peri<'d, impl Channel4Pin<T>>,
+        ch4: Peri<'d, impl TimerPin<T, Ch4>>,
        freq: Hertz,
    ) -> Self {
        let af1 = ch1.af_num();
diff --git a/examples/stm32h7/src/bin/pwm.rs b/examples/stm32h7/src/bin/pwm.rs
index a1c53fc3f..73b43be69 100644
--- a/examples/stm32h7/src/bin/pwm.rs
+++ b/examples/stm32h7/src/bin/pwm.rs
@@ -36,7 +36,7 @@ async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(config);
    info!("Hello World!");
-    let ch1_pin = PwmPin::new_ch1(p.PA6, OutputType::PushPull);
+    let ch1_pin = PwmPin::new(p.PA6, OutputType::PushPull);
    let mut pwm = SimplePwm::new(p.TIM3, Some(ch1_pin), None, None, None, khz(10), Default::default());
    let mut ch1 = pwm.ch1();
    ch1.enable();
diff --git a/examples/stm32h723/src/bin/spdifrx.rs b/examples/stm32h723/src/bin/spdifrx.rs
index a04d7cb34..6d29e8a4d 100644
--- a/examples/stm32h723/src/bin/spdifrx.rs
+++ b/examples/stm32h723/src/bin/spdifrx.rs
@@ -7,9 +7,9 @@
 use defmt::{info, trace};
 use embassy_executor::Spawner;
-use embassy_futures::select::{self, select, Either};
+use embassy_futures::select::{select, Either};
 use embassy_stm32::spdifrx::{self, Spdifrx};
-use embassy_stm32::{bind_interrupts, peripherals, sai};
+use embassy_stm32::{bind_interrupts, peripherals, sai, Peri};
 use grounded::uninit::GroundedArrayCell;
 use hal::sai::*;
 use {defmt_rtt as _, embassy_stm32 as hal, panic_probe as _};
@@ -25,10 +25,10 @@ const DMA_BUFFER_LENGTH: usize = HALF_DMA_BUFFER_LENGTH * 2; //  2 half-blocks
 // DMA buffers must be in special regions. Refer https://embassy.dev/book/#_stm32_bdma_only_working_out_of_some_ram_regions
 #[unsafe(link_section = ".sram1")]
-static mut SPDIFRX_BUFFER: GroundedArrayCell<u32, DMA_BUFFER_LENGTH> = GroundedArrayCell::uninit();
+static SPDIFRX_BUFFER: GroundedArrayCell<u32, DMA_BUFFER_LENGTH> = GroundedArrayCell::uninit();
 #[unsafe(link_section = ".sram4")]
-static mut SAI_BUFFER: GroundedArrayCell<u32, DMA_BUFFER_LENGTH> = GroundedArrayCell::uninit();
+static SAI_BUFFER: GroundedArrayCell<u32, DMA_BUFFER_LENGTH> = GroundedArrayCell::uninit();
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -144,9 +144,9 @@ async fn main(_spawner: Spawner) {
 ///
 /// Used (again) after dropping the SPDIFRX instance, in case of errors (e.g. source disconnect).
 fn new_spdif_receiver<'d>(
-    spdifrx: &'d mut peripherals::SPDIFRX1,
+    spdifrx: Peri<'d, peripherals::SPDIFRX1>,
-    input_pin: &'d mut peripherals::PD7,
+    input_pin: Peri<'d, peripherals::PD7>,
-    dma: &'d mut peripherals::DMA2_CH7,
+    dma: Peri<'d, peripherals::DMA2_CH7>,
    buf: &'d mut [u32],
 ) -> Spdifrx<'d, peripherals::SPDIFRX1> {
    Spdifrx::new(spdifrx, Irqs, spdifrx::Config::default(), input_pin, dma, buf)
@@ -156,11 +156,11 @@ fn new_spdif_receiver<'d>(
 ///
 /// Used (again) after dropping the SAI4 instance, in case of errors (e.g. buffer overrun).
 fn new_sai_transmitter<'d>(
-    sai: &'d mut peripherals::SAI4,
+    sai: Peri<'d, peripherals::SAI4>,
-    sck: &'d mut peripherals::PD13,
+    sck: Peri<'d, peripherals::PD13>,
-    sd: &'d mut peripherals::PC1,
+    sd: Peri<'d, peripherals::PC1>,
-    fs: &'d mut peripherals::PD12,
+    fs: Peri<'d, peripherals::PD12>,
-    dma: &'d mut peripherals::BDMA_CH0,
+    dma: Peri<'d, peripherals::BDMA_CH0>,
    buf: &'d mut [u32],
 ) -> Sai<'d, peripherals::SAI4, u32> {
    let mut sai_config = hal::sai::Config::default();
diff --git a/examples/stm32h735/Cargo.toml b/examples/stm32h735/Cargo.toml
index 8d23c346a..e4938e15b 100644
--- a/examples/stm32h735/Cargo.toml
+++ b/examples/stm32h735/Cargo.toml
@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["defmt", "stm32h735ig", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
diff --git a/examples/stm32h742/Cargo.toml b/examples/stm32h742/Cargo.toml
index 31eff4379..efa71e144 100644
--- a/examples/stm32h742/Cargo.toml
+++ b/examples/stm32h742/Cargo.toml
@@ -34,7 +34,7 @@ embassy-net = { version = "0.7.0", path = "../../embassy-net", features = [
    "medium-ethernet",
 ] }
 embedded-io-async = { version = "0.6.1" }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = [
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = [
    "defmt",
 ] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
diff --git a/examples/stm32h742/src/bin/qspi.rs b/examples/stm32h742/src/bin/qspi.rs
index aee07f3f2..50e37ec52 100644
--- a/examples/stm32h742/src/bin/qspi.rs
+++ b/examples/stm32h742/src/bin/qspi.rs
@@ -272,6 +272,7 @@ async fn main(_spawner: Spawner) -> ! {
        prescaler: 16,
        cs_high_time: ChipSelectHighTime::_1Cycle,
        fifo_threshold: FIFOThresholdLevel::_16Bytes,
+        sample_shifting: SampleShifting::None,
    };
    let driver = Qspi::new_blocking_bank1(p.QUADSPI, p.PD11, p.PD12, p.PE2, p.PD13, p.PB2, p.PB10, config);
    let mut flash = FlashMemory::new(driver);
diff --git a/examples/stm32h755cm4/Cargo.toml b/examples/stm32h755cm4/Cargo.toml
index 71bd50d60..eaaeb1ac0 100644
--- a/examples/stm32h755cm4/Cargo.toml
+++ b/examples/stm32h755cm4/Cargo.toml
@@ -8,11 +8,11 @@ license = "MIT OR Apache-2.0"
 # Change stm32h755zi-cm4 to your chip name, if necessary.
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["defmt", "stm32h755zi-cm4", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32h755cm7/Cargo.toml b/examples/stm32h755cm7/Cargo.toml
index 8e960932a..e7fc05948 100644
--- a/examples/stm32h755cm7/Cargo.toml
+++ b/examples/stm32h755cm7/Cargo.toml
@@ -8,11 +8,11 @@ license = "MIT OR Apache-2.0"
 # Change stm32h743bi to your chip name, if necessary.
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["defmt", "stm32h755zi-cm7", "time-driver-tim3", "exti", "memory-x", "unstable-pac", "chrono"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32h7b0/Cargo.toml b/examples/stm32h7b0/Cargo.toml
index 72f86e0cf..bfa7f9202 100644
--- a/examples/stm32h7b0/Cargo.toml
+++ b/examples/stm32h7b0/Cargo.toml
@@ -7,11 +7,11 @@ license = "MIT OR Apache-2.0"
 [dependencies]
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["defmt", "stm32h7b0vb", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] }
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32h7rs/Cargo.toml b/examples/stm32h7rs/Cargo.toml
index 5f1ce8dfc..9794c6dbd 100644
--- a/examples/stm32h7rs/Cargo.toml
+++ b/examples/stm32h7rs/Cargo.toml
@@ -11,7 +11,7 @@ embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["de
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt", "udp", "medium-ethernet", "medium-ip", "proto-ipv4"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32h7rs/src/bin/xspi_memory_mapped.rs b/examples/stm32h7rs/src/bin/xspi_memory_mapped.rs
index 88d914180..59045ca2e 100644
--- a/examples/stm32h7rs/src/bin/xspi_memory_mapped.rs
+++ b/examples/stm32h7rs/src/bin/xspi_memory_mapped.rs
@@ -3,7 +3,8 @@
 //! For Nucleo STM32H7S3L8 MB1737, has MX25UW25645GXDI00
 //!
-//! TODO: Currently this only uses single SPI, pending flash chip documentation for octo SPI.
+use core::cmp::min;
 use defmt::info;
 use embassy_executor::Spawner;
@@ -52,14 +53,16 @@ async fn main(_spawner: Spawner) {
        fifo_threshold: FIFOThresholdLevel::_4Bytes,
        memory_type: MemoryType::Macronix,
        delay_hold_quarter_cycle: true,
-        // memory_type: MemoryType::Micron,
-        // delay_hold_quarter_cycle: false,
        device_size: MemorySize::_32MiB,
        chip_select_high_time: ChipSelectHighTime::_2Cycle,
        free_running_clock: false,
        clock_mode: false,
        wrap_size: WrapSize::None,
-        // 300mhz / (4+1) = 60mhz. Unsure the limit, need to find a MX25UW25645GXDI00 datasheet.
+        // 300 MHz clock / (3 + 1) = 75 MHz. This is above the max for READ instructions so the
+        // FAST READ must be used. The nucleo board's flash  can run at up to 133 MHz in SPI mode
+        // and 200 MHz in OPI mode. This clock prescaler must be even otherwise the clock will not
+        // have symmetric high and low times.
+        // The clock can also be fed by one of the PLLs to allow for more flexible clock rates.
        clock_prescaler: 3,
        sample_shifting: false,
        chip_select_boundary: 0,
@@ -71,28 +74,41 @@ async fn main(_spawner: Spawner) {
    // Not necessary, but recommended if using XIP
    cor.SCB.enable_icache();
+    // Note: Enabling data cache can cause issues with DMA transfers.
    cor.SCB.enable_dcache(&mut cor.CPUID);
    let xspi = embassy_stm32::xspi::Xspi::new_blocking_xspi(
        p.XSPI2, p.PN6, p.PN2, p.PN3, p.PN4, p.PN5, p.PN8, p.PN9, p.PN10, p.PN11, p.PN1, spi_config,
    );
-    let mut flash = FlashMemory::new(xspi).await;
+    let mut flash = SpiFlashMemory::new(xspi);
    let flash_id = flash.read_id();
    info!("FLASH ID: {=[u8]:x}", flash_id);
-    let mut wr_buf = [0u8; 8];
+    // Erase the first sector
-    for i in 0..8 {
+    flash.erase_sector(0);
-        wr_buf[i] = 0x90 + i as u8;
-    }
+    // Write some data into the flash. This writes more than one page to test that functionality.
-    let mut rd_buf = [0u8; 8];
+    let mut wr_buf = [0u8; 512];
-    flash.erase_sector(0).await;
+    let base_number: u8 = 0x90;
-    flash.write_memory(0, &wr_buf, true).await;
+    for i in 0..512 {
-    flash.read_memory(0, &mut rd_buf, true);
+        wr_buf[i] = base_number.wrapping_add(i as u8);
-    info!("WRITE BUF: {=[u8]:#X}", wr_buf);
+    }
-    info!("READ BUF: {=[u8]:#X}", rd_buf);
+    flash.write_memory(0, &wr_buf);
-    flash.enable_mm().await;
+    // Read the data back and verify it.
+    let mut rd_buf = [0u8; 512];
+    let start_time = embassy_time::Instant::now();
+    flash.read_memory(0, &mut rd_buf);
+    let elapsed = start_time.elapsed();
+    info!("Read 512 bytes in {} us in SPI mode", elapsed.as_micros());
+    info!("WRITE BUF: {=[u8]:#X}", wr_buf[0..32]);
+    info!("READ BUF: {=[u8]:#X}", rd_buf[0..32]);
+    assert_eq!(wr_buf, rd_buf, "Read buffer does not match write buffer");
+    flash.enable_mm();
    info!("Enabled memory mapped mode");
    let first_u32 = unsafe { *(0x70000000 as *const u32) };
@@ -103,10 +119,53 @@ async fn main(_spawner: Spawner) {
    assert_eq!(second_u32, 0x97969594);
    info!("second_u32 {:08x}", first_u32);
-    flash.disable_mm().await;
+    flash.disable_mm();
    info!("Disabled memory mapped mode");
+    let flash_id = flash.read_id();
+    info!("FLASH ID: {=[u8]:x}", flash_id);
+    let mut flash = flash.into_octo();
+    Timer::after_millis(100).await;
+    let flash_id = flash.read_id();
+    info!("FLASH ID in OPI mode: {=[u8]:x}", flash_id);
+    flash.erase_sector(0);
+    let mut rd_buf = [0u8; 512];
+    flash.read_memory(0, &mut rd_buf);
+    info!("READ BUF after erase: {=[u8]:#X}", rd_buf[0..32]);
+    assert_eq!(rd_buf, [0xFF; 512], "Read buffer is not all 0xFF after erase");
+    flash.write_memory(0, &wr_buf);
+    let start = embassy_time::Instant::now();
+    flash.read_memory(0, &mut rd_buf);
+    let elapsed = start.elapsed();
+    info!("Read 512 bytes in {} us in OPI mode", elapsed.as_micros());
+    info!("READ BUF after write: {=[u8]:#X}", rd_buf[0..32]);
+    assert_eq!(wr_buf, rd_buf, "Read buffer does not match write buffer in OPI mode");
+    flash.enable_mm();
+    info!("Enabled memory mapped mode in OPI mode");
+    let first_u32 = unsafe { *(0x70000000 as *const u32) };
+    assert_eq!(first_u32, 0x93929190);
+    info!("first_u32 {:08x}", first_u32);
+    let second_u32 = unsafe { *(0x70000004 as *const u32) };
+    assert_eq!(second_u32, 0x97969594);
+    info!("second_u32 {:08x}", first_u32);
+    flash.disable_mm();
+    info!("Disabled memory mapped mode in OPI mode");
+    // Reset back to SPI mode
+    let mut flash = flash.into_spi();
+    let flash_id = flash.read_id();
+    info!("FLASH ID back in SPI mode: {=[u8]:x}", flash_id);
    info!("DONE");
    // Output pin PE3
    let mut led = Output::new(p.PE3, Level::Low, Speed::Low);
@@ -116,80 +175,268 @@ async fn main(_spawner: Spawner) {
    }
 }
-const MEMORY_PAGE_SIZE: usize = 8;
+const MEMORY_PAGE_SIZE: usize = 256;
-const CMD_READ: u8 = 0x0B;
-const _CMD_QUAD_READ: u8 = 0x6B;
-const CMD_WRITE_PG: u8 = 0x02;
-const _CMD_QUAD_WRITE_PG: u8 = 0x32;
-const CMD_READ_ID: u8 = 0x9F;
-const CMD_READ_ID_OCTO: u16 = 0x9F60;
-const CMD_ENABLE_RESET: u8 = 0x66;
+/// Implementation of access to flash chip using SPI.
-const CMD_RESET: u8 = 0x99;
+///
+/// Chip commands are hardcoded as it depends on used chip.
-const CMD_WRITE_ENABLE: u8 = 0x06;
+/// This targets a MX25UW25645GXDI00.
+pub struct SpiFlashMemory<I: Instance> {
-const CMD_CHIP_ERASE: u8 = 0xC7;
+    xspi: Xspi<'static, I, Blocking>,
-const CMD_SECTOR_ERASE: u8 = 0x20;
+}
-const CMD_BLOCK_ERASE_32K: u8 = 0x52;
-const CMD_BLOCK_ERASE_64K: u8 = 0xD8;
-const CMD_READ_SR: u8 = 0x05;
-const CMD_READ_CR: u8 = 0x35;
-const CMD_WRITE_SR: u8 = 0x01;
-const CMD_WRITE_CR: u8 = 0x31;
-/// Implementation of access to flash chip.
+/// Implementation of access to flash chip using Octo SPI.
 ///
 /// Chip commands are hardcoded as it depends on used chip.
 /// This targets a MX25UW25645GXDI00.
-pub struct FlashMemory<I: Instance> {
+pub struct OpiFlashMemory<I: Instance> {
    xspi: Xspi<'static, I, Blocking>,
 }
-impl<I: Instance> FlashMemory<I> {
+/// SPI mode commands for MX25UW25645G flash memory
-    pub async fn new(xspi: Xspi<'static, I, Blocking>) -> Self {
+#[allow(dead_code)]
-        let mut memory = Self { xspi };
+#[repr(u8)]
+enum SpiCommand {
+    // Array access commands
+    /// Read data bytes using 3-byte address (up to 50 MHz)
+    Read3B = 0x03,
+    /// Fast read data bytes using 3-byte address with 8 dummy cycles (up to 133 MHz)
+    FastRead3B = 0x0B,
+    /// Program 1-256 bytes of data using 3-byte address
+    PageProgram3B = 0x02,
+    /// Erase 4KB sector using 3-byte address
+    SectorErase3B = 0x20,
+    /// Erase 64KB block using 3-byte address
+    BlockErase3B = 0xD8,
+    /// Read data bytes using 4-byte address (up to 50 MHz)
+    Read4B = 0x13,
+    /// Fast read data bytes using 4-byte address with 8 dummy cycles (up to 133 MHz)
+    FastRead4B = 0x0C,
+    /// Program 1-256 bytes of data using 4-byte address
+    PageProgram4B = 0x12,
+    /// Erase 4KB sector using 4-byte address
+    SectorErase4B = 0x21,
+    /// Erase 64KB block using 4-byte address
+    BlockErase4B = 0xDC,
+    /// Erase entire chip (only if no blocks are protected)
+    ChipErase = 0x60,
+    // Write Buffer Access commands
+    /// Read data from the 256-byte page buffer
+    ReadBuffer = 0x25,
+    /// Initialize write-to-buffer sequence, clears buffer and writes initial data
+    WriteBufferInitial = 0x22,
+    /// Continue writing data to buffer (used between WRBI and WRCF)
+    WriteBufferContinue = 0x24,
+    /// Confirm write operation, programs buffer contents to flash array
+    WriteBufferConfirm = 0x31,
+    // Device operation commands
+    /// Set Write Enable Latch (WEL) bit, required before write/program/erase operations
+    WriteEnable = 0x06,
+    /// Clear Write Enable Latch (WEL) bit
+    WriteDisable = 0x04,
+    /// Select write protection mode (BP mode or Advanced Sector Protection)
+    WriteProtectSelection = 0x68,
+    /// Suspend ongoing program or erase operation to allow read access
+    ProgramEraseSuspend = 0xB0,
+    /// Resume suspended program or erase operation
+    ProgramEraseResume = 0x30,
+    /// Enter deep power-down mode for minimum power consumption
+    DeepPowerDown = 0xB9,
+    /// Exit deep power-down mode and return to standby
+    ReleaseFromDeepPowerDown = 0xAB,
+    /// No operation, can terminate Reset Enable command
+    NoOperation = 0x00,
+    /// Enable reset operation (must precede Reset Memory command)
+    ResetEnable = 0x66,
+    /// Reset device to power-on state (requires prior Reset Enable)
+    ResetMemory = 0x99,
+    /// Protect all sectors using Dynamic Protection Bits (DPB)
+    GangBlockLock = 0x7E,
+    /// Unprotect all sectors by clearing Dynamic Protection Bits (DPB)
+    GangBlockUnlock = 0x98,
+    // Register Access commands
+    /// Read 3-byte device identification (manufacturer ID + device ID)
+    ReadIdentification = 0x9F,
+    /// Read Serial Flash Discoverable Parameters (SFDP) table
+    ReadSFDP = 0x5A,
+    /// Read 8-bit Status Register (WIP, WEL, BP bits, etc.)
+    ReadStatusRegister = 0x05,
+    /// Read 8-bit Configuration Register (ODS, TB, PBE bits)
+    ReadConfigurationRegister = 0x15,
+    /// Write Status and/or Configuration Register (1-2 bytes)
+    WriteStatusConfigurationRegister = 0x01,
+    /// Read Configuration Register 2 from specified 4-byte address
+    ReadConfigurationRegister2 = 0x71,
+    /// Write Configuration Register 2 to specified 4-byte address
+    WriteConfigurationRegister2 = 0x72,
+    /// Read 8-bit Security Register (protection status, suspend bits)
+    ReadSecurityRegister = 0x2B,
+    /// Write Security Register to set customer lock-down bit
+    WriteSecurityRegister = 0x2F,
+    /// Read 32-bit Fast Boot Register (boot address and configuration)
+    ReadFastBootRegister = 0x16,
+    /// Write 32-bit Fast Boot Register
+    WriteFastBootRegister = 0x17,
+    /// Erase Fast Boot Register (disable fast boot feature)
+    EraseFastBootRegister = 0x18,
+    /// Set burst/wrap length for read operations (16/32/64 bytes)
+    SetBurstLength = 0xC0,
+    /// Enter 8K-bit secured OTP mode for programming unique identifiers
+    EnterSecuredOTP = 0xB1,
+    /// Exit secured OTP mode and return to main array access
+    ExitSecuredOTP = 0xC1,
+    /// Write Lock Register to control SPB protection mode
+    WriteLockRegister = 0x2C,
+    /// Read Lock Register status
+    ReadLockRegister = 0x2D,
+    /// Program Solid Protection Bit (SPB) for specified sector/block
+    WriteSPB = 0xE3,
+    /// Erase all Solid Protection Bits (SPB)
+    EraseSPB = 0xE4,
+    /// Read Solid Protection Bit (SPB) status for specified sector/block
+    ReadSPB = 0xE2,
+    /// Write Dynamic Protection Bit (DPB) for specified sector
+    WriteDPB = 0xE1,
+    /// Read Dynamic Protection Bit (DPB) status for specified sector
+    ReadDPB = 0xE0,
+    /// Read 64-bit password register (only in Solid Protection mode)
+    ReadPassword = 0x27,
+    /// Write 64-bit password register
+    WritePassword = 0x28,
+    /// Unlock SPB operations using 64-bit password
+    PasswordUnlock = 0x29,
+}
-        memory.reset_memory().await;
+/// OPI mode commands for MX25UW25645G flash memory
-        memory.enable_octo();
+#[allow(dead_code)]
-        memory
+#[repr(u16)]
-    }
+enum OpiCommand {
+    // Array access commands
+    /// Read data using 8 I/O lines in STR mode with configurable dummy cycles (up to 200 MHz)
+    OctaRead = 0xEC13,
+    /// Read data using 8 I/O lines in DTR mode with configurable dummy cycles (up to 200 MHz)
+    OctaDTRRead = 0xEE11,
+    /// Program 1-256 bytes using 4-byte address and 8 I/O lines
+    PageProgram4B = 0x12ED,
+    /// Erase 4KB sector using 4-byte address
+    SectorErase4B = 0x21DE,
+    /// Erase 64KB block using 4-byte address
+    BlockErase4B = 0xDC23,
+    /// Erase entire chip (only if no blocks are protected)
+    ChipErase = 0x609F,
+    // Write Buffer Access commands
+    /// Read data from the 256-byte page buffer using 4-byte address
+    ReadBuffer = 0x25DA,
+    /// Initialize interruptible write-to-buffer sequence with 4-byte address
+    WriteBufferInitial = 0x22DD,
+    /// Continue writing data to buffer during interruptible sequence
+    WriteBufferContinue = 0x24DB,
+    /// Confirm and execute write operation from buffer to flash array
+    WriteBufferConfirm = 0x31CE,
+    // Device operation commands
+    /// Set Write Enable Latch (WEL) bit, required before write/program/erase operations
+    WriteEnable = 0x06F9,
+    /// Clear Write Enable Latch (WEL) bit, aborts write-to-buffer sequence
+    WriteDisable = 0x04FB,
+    /// Select write protection mode (BP mode or Advanced Sector Protection) - OTP bit
+    WriteProtectSelection = 0x6897,
+    /// Suspend ongoing program or erase operation to allow read from other banks
+    ProgramEraseSuspend = 0xB04F,
+    /// Resume suspended program or erase operation
+    ProgramEraseResume = 0x30CF,
+    /// Enter deep power-down mode for minimum power consumption
+    DeepPowerDown = 0xB946,
+    /// Exit deep power-down mode and return to standby
+    ReleaseFromDeepPowerDown = 0xAB54,
+    /// No operation, can terminate Reset Enable command
+    NoOperation = 0x00FF,
+    /// Enable reset operation (must precede Reset Memory command)
+    ResetEnable = 0x6699,
+    /// Reset device to power-on state, clears volatile settings
+    ResetMemory = 0x9966,
+    /// Protect all sectors using Dynamic Protection Bits (DPB)
+    GangBlockLock = 0x7E81,
+    /// Unprotect all sectors by clearing Dynamic Protection Bits (DPB)
+    GangBlockUnlock = 0x9867,
+    // Register Access commands
+    /// Read 3-byte device identification with 4-byte dummy address
+    ReadIdentification = 0x9F60,
+    /// Read Serial Flash Discoverable Parameters (SFDP) table with 4-byte address
+    ReadSFDP = 0x5AA5,
+    /// Read 8-bit Status Register with 4-byte dummy address
+    ReadStatusRegister = 0x05FA,
+    /// Read 8-bit Configuration Register with specific address (00000001h)
+    ReadConfigurationRegister = 0x15EA,
+    /// Write 8-bit Status Register with specific address (00000000h) or Configuration Register with address (00000001h)
+    WriteStatusConfigurationRegister = 0x01FE,
+    /// Read Configuration Register 2 from specified 4-byte address
+    ReadConfigurationRegister2 = 0x718E,
+    /// Write Configuration Register 2 to specified 4-byte address
+    WriteConfigurationRegister2 = 0x728D,
+    /// Read 8-bit Security Register with 4-byte dummy address
+    ReadSecurityRegister = 0x2BD4,
+    /// Write Security Register to set customer lock-down bit
+    WriteSecurityRegister = 0x2FD0,
+    /// Set burst/wrap length for read operations with 4-byte dummy address
+    SetBurstLength = 0xC03F,
+    /// Read 32-bit Fast Boot Register with 4-byte dummy address
+    ReadFastBootRegister = 0x16E9,
+    /// Write 32-bit Fast Boot Register with 4-byte dummy address
+    WriteFastBootRegister = 0x17E8,
+    /// Erase Fast Boot Register (disable fast boot feature)
+    EraseFastBootRegister = 0x18E7,
+    /// Enter 8K-bit secured OTP mode for programming unique identifiers
+    EnterSecuredOTP = 0xB14E,
+    /// Exit secured OTP mode and return to main array access
+    ExitSecuredOTP = 0xC13E,
+    /// Write Lock Register to control SPB protection mode with 4-byte dummy address
+    WriteLockRegister = 0x2CD3,
+    /// Read Lock Register status with 4-byte dummy address
+    ReadLockRegister = 0x2DD2,
+    /// Program Solid Protection Bit (SPB) for specified 4-byte address
+    WriteSPB = 0xE31C,
+    /// Erase all Solid Protection Bits (SPB)
+    EraseSPB = 0xE41B,
+    /// Read Solid Protection Bit (SPB) status for specified 4-byte address
+    ReadSPB = 0xE21D,
+    /// Write Dynamic Protection Bit (DPB) for specified 4-byte address
+    WriteDPB = 0xE11E,
+    /// Read Dynamic Protection Bit (DPB) status for specified 4-byte address
+    ReadDPB = 0xE01F,
+    /// Read 64-bit password register with 4-byte dummy address and 20 dummy cycles
+    ReadPassword = 0x27D8,
+    /// Write 64-bit password register with 4-byte dummy address
+    WritePassword = 0x28D7,
+    /// Unlock SPB operations using 64-bit password with 4-byte dummy address
+    PasswordUnlock = 0x29D6,
+}
-    async fn qpi_mode(&mut self) {
+impl<I: Instance> SpiFlashMemory<I> {
-        // Enter qpi mode
+    pub fn new(xspi: Xspi<'static, I, Blocking>) -> Self {
-        self.exec_command(0x38).await;
+        let mut memory = Self { xspi };
-        // Set read param
+        memory.reset_memory();
-        let transaction = TransferConfig {
+        memory
-            iwidth: XspiWidth::QUAD,
-            dwidth: XspiWidth::QUAD,
-            instruction: Some(0xC0),
-            ..Default::default()
-        };
-        self.enable_write().await;
-        self.xspi.blocking_write(&[0x30_u8], transaction).unwrap();
-        self.wait_write_finish();
    }
-    pub async fn disable_mm(&mut self) {
+    pub fn disable_mm(&mut self) {
        self.xspi.disable_memory_mapped_mode();
    }
-    pub async fn enable_mm(&mut self) {
+    pub fn enable_mm(&mut self) {
-        self.qpi_mode().await;
        let read_config = TransferConfig {
            iwidth: XspiWidth::SING,
            isize: AddressSize::_8bit,
            adwidth: XspiWidth::SING,
-            adsize: AddressSize::_24bit,
+            adsize: AddressSize::_32bit,
            dwidth: XspiWidth::SING,
-            instruction: Some(CMD_READ as u32),
+            instruction: Some(SpiCommand::FastRead4B as u32),
            dummy: DummyCycles::_8,
            ..Default::default()
        };
@@ -198,42 +445,28 @@ impl<I: Instance> FlashMemory<I> {
            iwidth: XspiWidth::SING,
            isize: AddressSize::_8bit,
            adwidth: XspiWidth::SING,
-            adsize: AddressSize::_24bit,
+            adsize: AddressSize::_32bit,
            dwidth: XspiWidth::SING,
-            instruction: Some(CMD_WRITE_PG as u32),
+            instruction: Some(SpiCommand::PageProgram4B as u32),
            dummy: DummyCycles::_0,
            ..Default::default()
        };
        self.xspi.enable_memory_mapped_mode(read_config, write_config).unwrap();
    }
-    fn enable_octo(&mut self) {
+    fn into_octo(mut self) -> OpiFlashMemory<I> {
-        let cr = self.read_cr();
+        self.enable_opi_mode();
-        // info!("Read cr: {:x}", cr);
+        OpiFlashMemory { xspi: self.xspi }
-        self.write_cr(cr | 0x02);
-        // info!("Read cr after writing: {:x}", cr);
    }
-    pub fn disable_octo(&mut self) {
+    fn enable_opi_mode(&mut self) {
-        let cr = self.read_cr();
+        let cr2_0 = self.read_cr2(0);
-        self.write_cr(cr & (!(0x02)));
+        info!("Read CR2 at 0x0: {:x}", cr2_0);
-    }
+        self.enable_write();
+        self.write_cr2(0, cr2_0 | 0x01); // Set bit 0 to enable octo SPI in STR
-    async fn exec_command_4(&mut self, cmd: u8) {
-        let transaction = TransferConfig {
-            iwidth: XspiWidth::QUAD,
-            adwidth: XspiWidth::NONE,
-            // adsize: AddressSize::_24bit,
-            dwidth: XspiWidth::NONE,
-            instruction: Some(cmd as u32),
-            address: None,
-            dummy: DummyCycles::_0,
-            ..Default::default()
-        };
-        self.xspi.blocking_command(&transaction).unwrap();
    }
-    async fn exec_command(&mut self, cmd: u8) {
+    fn exec_command(&mut self, cmd: u8) {
        let transaction = TransferConfig {
            iwidth: XspiWidth::SING,
            adwidth: XspiWidth::NONE,
@@ -248,16 +481,14 @@ impl<I: Instance> FlashMemory<I> {
        self.xspi.blocking_command(&transaction).unwrap();
    }
-    pub async fn reset_memory(&mut self) {
+    pub fn reset_memory(&mut self) {
-        self.exec_command_4(CMD_ENABLE_RESET).await;
+        self.exec_command(SpiCommand::ResetEnable as u8);
-        self.exec_command_4(CMD_RESET).await;
+        self.exec_command(SpiCommand::ResetMemory as u8);
-        self.exec_command(CMD_ENABLE_RESET).await;
-        self.exec_command(CMD_RESET).await;
        self.wait_write_finish();
    }
-    pub async fn enable_write(&mut self) {
+    pub fn enable_write(&mut self) {
-        self.exec_command(CMD_WRITE_ENABLE).await;
+        self.exec_command(SpiCommand::WriteEnable as u8);
    }
    pub fn read_id(&mut self) -> [u8; 3] {
@@ -266,92 +497,64 @@ impl<I: Instance> FlashMemory<I> {
            iwidth: XspiWidth::SING,
            isize: AddressSize::_8bit,
            adwidth: XspiWidth::NONE,
-            // adsize: AddressSize::_24bit,
            dwidth: XspiWidth::SING,
-            instruction: Some(CMD_READ_ID as u32),
+            instruction: Some(SpiCommand::ReadIdentification as u32),
            ..Default::default()
        };
-        // info!("Reading id: 0x{:X}", transaction.instruction);
        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
        buffer
    }
-    pub fn read_id_8(&mut self) -> [u8; 3] {
+    pub fn read_memory(&mut self, addr: u32, buffer: &mut [u8]) {
-        let mut buffer = [0; 3];
-        let transaction: TransferConfig = TransferConfig {
-            iwidth: XspiWidth::OCTO,
-            isize: AddressSize::_16bit,
-            adwidth: XspiWidth::OCTO,
-            address: Some(0),
-            adsize: AddressSize::_32bit,
-            dwidth: XspiWidth::OCTO,
-            instruction: Some(CMD_READ_ID_OCTO as u32),
-            dummy: DummyCycles::_4,
-            ..Default::default()
-        };
-        info!("Reading id: {:#X}", transaction.instruction);
-        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
-        buffer
-    }
-    pub fn read_memory(&mut self, addr: u32, buffer: &mut [u8], use_dma: bool) {
        let transaction = TransferConfig {
            iwidth: XspiWidth::SING,
            adwidth: XspiWidth::SING,
-            adsize: AddressSize::_24bit,
+            adsize: AddressSize::_32bit,
            dwidth: XspiWidth::SING,
-            instruction: Some(CMD_READ as u32),
+            instruction: Some(SpiCommand::FastRead4B as u32),
            dummy: DummyCycles::_8,
-            // dwidth: XspiWidth::QUAD,
-            // instruction: Some(CMD_QUAD_READ as u32),
-            // dummy: DummyCycles::_8,
            address: Some(addr),
            ..Default::default()
        };
-        if use_dma {
-            self.xspi.blocking_read(buffer, transaction).unwrap();
+        self.xspi.blocking_read(buffer, transaction).unwrap();
-        } else {
-            self.xspi.blocking_read(buffer, transaction).unwrap();
-        }
    }
    fn wait_write_finish(&mut self) {
        while (self.read_sr() & 0x01) != 0 {}
    }
-    async fn perform_erase(&mut self, addr: u32, cmd: u8) {
+    fn perform_erase(&mut self, addr: u32, cmd: u8) {
        let transaction = TransferConfig {
            iwidth: XspiWidth::SING,
            adwidth: XspiWidth::SING,
-            adsize: AddressSize::_24bit,
+            adsize: AddressSize::_32bit,
            dwidth: XspiWidth::NONE,
            instruction: Some(cmd as u32),
            address: Some(addr),
            dummy: DummyCycles::_0,
            ..Default::default()
        };
-        self.enable_write().await;
+        self.enable_write();
        self.xspi.blocking_command(&transaction).unwrap();
        self.wait_write_finish();
    }
-    pub async fn erase_sector(&mut self, addr: u32) {
+    pub fn erase_sector(&mut self, addr: u32) {
-        self.perform_erase(addr, CMD_SECTOR_ERASE).await;
+        self.perform_erase(addr, SpiCommand::SectorErase4B as u8);
    }
-    pub async fn erase_block_32k(&mut self, addr: u32) {
+    pub fn erase_block_64k(&mut self, addr: u32) {
-        self.perform_erase(addr, CMD_BLOCK_ERASE_32K).await;
+        self.perform_erase(addr, SpiCommand::BlockErase4B as u8);
    }
-    pub async fn erase_block_64k(&mut self, addr: u32) {
+    pub fn erase_chip(&mut self) {
-        self.perform_erase(addr, CMD_BLOCK_ERASE_64K).await;
+        self.enable_write();
-    }
+        self.exec_command(SpiCommand::ChipErase as u8);
+        self.wait_write_finish();
-    pub async fn erase_chip(&mut self) {
-        self.exec_command(CMD_CHIP_ERASE).await;
    }
-    async fn write_page(&mut self, addr: u32, buffer: &[u8], len: usize, use_dma: bool) {
+    fn write_page(&mut self, addr: u32, buffer: &[u8], len: usize) {
        assert!(
            (len as u32 + (addr & 0x000000ff)) <= MEMORY_PAGE_SIZE as u32,
            "write_page(): page write length exceeds page boundary (len = {}, addr = {:X}",
@@ -361,48 +564,43 @@ impl<I: Instance> FlashMemory<I> {
        let transaction = TransferConfig {
            iwidth: XspiWidth::SING,
-            adsize: AddressSize::_24bit,
+            adsize: AddressSize::_32bit,
            adwidth: XspiWidth::SING,
            dwidth: XspiWidth::SING,
-            instruction: Some(CMD_WRITE_PG as u32),
+            instruction: Some(SpiCommand::PageProgram4B as u32),
-            // dwidth: XspiWidth::QUAD,
-            // instruction: Some(CMD_QUAD_WRITE_PG as u32),
            address: Some(addr),
            dummy: DummyCycles::_0,
            ..Default::default()
        };
-        self.enable_write().await;
+        self.enable_write();
-        if use_dma {
+        self.xspi.blocking_write(buffer, transaction).unwrap();
-            self.xspi.blocking_write(buffer, transaction).unwrap();
-        } else {
-            self.xspi.blocking_write(buffer, transaction).unwrap();
-        }
        self.wait_write_finish();
    }
-    pub async fn write_memory(&mut self, addr: u32, buffer: &[u8], use_dma: bool) {
+    pub fn write_memory(&mut self, addr: u32, buffer: &[u8]) {
        let mut left = buffer.len();
        let mut place = addr;
        let mut chunk_start = 0;
        while left > 0 {
            let max_chunk_size = MEMORY_PAGE_SIZE - (place & 0x000000ff) as usize;
-            let chunk_size = if left >= max_chunk_size { max_chunk_size } else { left };
+            let chunk_size = min(max_chunk_size, left);
            let chunk = &buffer[chunk_start..(chunk_start + chunk_size)];
-            self.write_page(place, chunk, chunk_size, use_dma).await;
+            self.write_page(place, chunk, chunk_size);
            place += chunk_size as u32;
            left -= chunk_size;
            chunk_start += chunk_size;
        }
    }
+    // Note: read_register cannot be used to read the configuration register 2 since there is an
+    // address required for that read.
    fn read_register(&mut self, cmd: u8) -> u8 {
        let mut buffer = [0; 1];
        let transaction: TransferConfig = TransferConfig {
            iwidth: XspiWidth::SING,
            isize: AddressSize::_8bit,
            adwidth: XspiWidth::NONE,
-            adsize: AddressSize::_24bit,
            dwidth: XspiWidth::SING,
            instruction: Some(cmd as u32),
            address: None,
@@ -410,39 +608,345 @@ impl<I: Instance> FlashMemory<I> {
            ..Default::default()
        };
        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
-        // info!("Read w25q64 register: 0x{:x}", buffer[0]);
        buffer[0]
    }
-    fn write_register(&mut self, cmd: u8, value: u8) {
+    pub fn read_sr(&mut self) -> u8 {
-        let buffer = [value; 1];
+        self.read_register(SpiCommand::ReadStatusRegister as u8)
+    }
+    pub fn read_cr(&mut self) -> u8 {
+        self.read_register(SpiCommand::ReadConfigurationRegister as u8)
+    }
+    pub fn write_sr_cr(&mut self, sr: u8, cr: u8) {
+        let buffer = [sr, cr];
        let transaction: TransferConfig = TransferConfig {
            iwidth: XspiWidth::SING,
            isize: AddressSize::_8bit,
-            instruction: Some(cmd as u32),
+            instruction: Some(SpiCommand::WriteStatusConfigurationRegister as u32),
-            adsize: AddressSize::_24bit,
            adwidth: XspiWidth::NONE,
            dwidth: XspiWidth::SING,
            address: None,
            dummy: DummyCycles::_0,
            ..Default::default()
        };
+        self.enable_write();
+        self.xspi.blocking_write(&buffer, transaction).unwrap();
+        self.wait_write_finish();
+    }
+    pub fn read_cr2(&mut self, address: u32) -> u8 {
+        let mut buffer = [0; 1];
+        let transaction: TransferConfig = TransferConfig {
+            iwidth: XspiWidth::SING,
+            isize: AddressSize::_8bit,
+            instruction: Some(SpiCommand::ReadConfigurationRegister2 as u32),
+            adsize: AddressSize::_32bit,
+            adwidth: XspiWidth::SING,
+            dwidth: XspiWidth::SING,
+            address: Some(address),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
+        buffer[0]
+    }
+    pub fn write_cr2(&mut self, address: u32, value: u8) {
+        let buffer = [value; 1];
+        let transaction: TransferConfig = TransferConfig {
+            iwidth: XspiWidth::SING,
+            isize: AddressSize::_8bit,
+            instruction: Some(SpiCommand::WriteConfigurationRegister2 as u32),
+            adsize: AddressSize::_32bit,
+            adwidth: XspiWidth::SING,
+            dwidth: XspiWidth::SING,
+            address: Some(address),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
        self.xspi.blocking_write(&buffer, transaction).unwrap();
+        self.wait_write_finish();
+    }
+}
+impl<I: Instance> OpiFlashMemory<I> {
+    pub fn into_spi(mut self) -> SpiFlashMemory<I> {
+        self.disable_opi_mode();
+        SpiFlashMemory { xspi: self.xspi }
+    }
+    /// Disable OPI mode and return to SPI
+    pub fn disable_opi_mode(&mut self) {
+        // Clear SOPI and DOPI bits in CR2 volatile register
+        let cr2_0 = self.read_cr2(0x00000000);
+        self.write_cr2(0x00000000, cr2_0 & 0xFC); // Clear bits 0 and 1
+    }
+    /// Enable memory-mapped mode for OPI
+    pub fn enable_mm(&mut self) {
+        let read_config = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit, // 2-byte command for OPI
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::OctaRead as u32),
+            dummy: DummyCycles::_20, // Default dummy cycles for OPI
+            ..Default::default()
+        };
+        let write_config = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::PageProgram4B as u32),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.xspi.enable_memory_mapped_mode(read_config, write_config).unwrap();
+    }
+    pub fn disable_mm(&mut self) {
+        self.xspi.disable_memory_mapped_mode();
+    }
+    /// Execute OPI command (2-byte command)
+    fn exec_command(&mut self, cmd: OpiCommand) {
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit, // 2-byte command
+            adwidth: XspiWidth::NONE,
+            dwidth: XspiWidth::NONE,
+            instruction: Some(cmd as u32),
+            address: None,
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.xspi.blocking_command(&transaction).unwrap();
+    }
+    /// Reset memory using OPI commands
+    pub fn reset_memory(&mut self) {
+        self.exec_command(OpiCommand::ResetEnable);
+        self.exec_command(OpiCommand::ResetMemory);
+        self.wait_write_finish();
    }
+    /// Enable write using OPI command
+    pub fn enable_write(&mut self) {
+        self.exec_command(OpiCommand::WriteEnable);
+    }
+    /// Read device ID in OPI mode
+    pub fn read_id(&mut self) -> [u8; 3] {
+        let mut buffer = [0; 3];
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::ReadIdentification as u32),
+            address: Some(0x00000000), // Dummy address required
+            dummy: DummyCycles::_4,
+            ..Default::default()
+        };
+        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
+        buffer
+    }
+    /// Read memory using OPI mode
+    pub fn read_memory(&mut self, addr: u32, buffer: &mut [u8]) {
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::OctaRead as u32),
+            address: Some(addr),
+            dummy: DummyCycles::_20, // Default for 200MHz operation
+            ..Default::default()
+        };
+        self.xspi.blocking_read(buffer, transaction).unwrap();
+    }
+    /// Wait for write completion using OPI status read
+    fn wait_write_finish(&mut self) {
+        while (self.read_sr() & 0x01) != 0 {}
+    }
+    /// Perform erase operation using OPI command
+    fn perform_erase(&mut self, addr: u32, cmd: OpiCommand) {
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::NONE,
+            instruction: Some(cmd as u32),
+            address: Some(addr),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.enable_write();
+        self.xspi.blocking_command(&transaction).unwrap();
+        self.wait_write_finish();
+    }
+    /// Erase 4KB sector using OPI
+    pub fn erase_sector(&mut self, addr: u32) {
+        self.perform_erase(addr, OpiCommand::SectorErase4B);
+    }
+    /// Erase 64KB block using OPI
+    pub fn erase_block_64k(&mut self, addr: u32) {
+        self.perform_erase(addr, OpiCommand::BlockErase4B);
+    }
+    /// Erase entire chip using OPI
+    pub fn erase_chip(&mut self) {
+        self.enable_write();
+        self.exec_command(OpiCommand::ChipErase);
+        self.wait_write_finish();
+    }
+    /// Write single page using OPI
+    fn write_page(&mut self, addr: u32, buffer: &[u8], len: usize) {
+        assert!(
+            (len as u32 + (addr & 0x000000ff)) <= MEMORY_PAGE_SIZE as u32,
+            "write_page(): page write length exceeds page boundary (len = {}, addr = {:X})",
+            len,
+            addr
+        );
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::PageProgram4B as u32),
+            address: Some(addr),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.enable_write();
+        self.xspi.blocking_write(buffer, transaction).unwrap();
+        self.wait_write_finish();
+    }
+    /// Write memory using OPI (handles page boundaries)
+    pub fn write_memory(&mut self, addr: u32, buffer: &[u8]) {
+        let mut left = buffer.len();
+        let mut place = addr;
+        let mut chunk_start = 0;
+        while left > 0 {
+            let max_chunk_size = MEMORY_PAGE_SIZE - (place & 0x000000ff) as usize;
+            let chunk_size = min(max_chunk_size, left);
+            let chunk = &buffer[chunk_start..(chunk_start + chunk_size)];
+            self.write_page(place, chunk, chunk_size);
+            place += chunk_size as u32;
+            left -= chunk_size;
+            chunk_start += chunk_size;
+        }
+    }
+    /// Read register using OPI mode
+    fn read_register(&mut self, cmd: OpiCommand, dummy_addr: u32, dummy_cycles: DummyCycles) -> u8 {
+        let mut buffer = [0; 1];
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(cmd as u32),
+            address: Some(dummy_addr),
+            dummy: dummy_cycles,
+            ..Default::default()
+        };
+        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
+        buffer[0]
+    }
+    /// Read Status Register using OPI
    pub fn read_sr(&mut self) -> u8 {
-        self.read_register(CMD_READ_SR)
+        self.read_register(
+            OpiCommand::ReadStatusRegister,
+            0x00000000, // Dummy address
+            DummyCycles::_4,
+        )
    }
+    /// Read Configuration Register using OPI
    pub fn read_cr(&mut self) -> u8 {
-        self.read_register(CMD_READ_CR)
+        self.read_register(
+            OpiCommand::ReadConfigurationRegister,
+            0x00000001, // Address for CR
+            DummyCycles::_4,
+        )
    }
-    pub fn write_sr(&mut self, value: u8) {
+    /// Write Status/Configuration Register using OPI
-        self.write_register(CMD_WRITE_SR, value);
+    pub fn write_sr_cr(&mut self, sr: u8, cr: u8) {
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::WriteStatusConfigurationRegister as u32),
+            address: Some(0x00000000),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.enable_write();
+        self.xspi.blocking_write(&[sr, cr], transaction).unwrap();
+        self.wait_write_finish();
+    }
+    /// Read Configuration Register 2 using OPI
+    pub fn read_cr2(&mut self, address: u32) -> u8 {
+        let mut buffer = [0; 1];
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::ReadConfigurationRegister2 as u32),
+            address: Some(address),
+            dummy: DummyCycles::_4,
+            ..Default::default()
+        };
+        self.xspi.blocking_read(&mut buffer, transaction).unwrap();
+        buffer[0]
    }
-    pub fn write_cr(&mut self, value: u8) {
+    /// Write Configuration Register 2 using OPI
-        self.write_register(CMD_WRITE_CR, value);
+    pub fn write_cr2(&mut self, address: u32, value: u8) {
+        let transaction = TransferConfig {
+            iwidth: XspiWidth::OCTO,
+            isize: AddressSize::_16bit,
+            adwidth: XspiWidth::OCTO,
+            adsize: AddressSize::_32bit,
+            dwidth: XspiWidth::OCTO,
+            instruction: Some(OpiCommand::WriteConfigurationRegister2 as u32),
+            address: Some(address),
+            dummy: DummyCycles::_0,
+            ..Default::default()
+        };
+        self.enable_write();
+        self.xspi.blocking_write(&[value], transaction).unwrap();
+        self.wait_write_finish();
    }
 }
diff --git a/examples/stm32l0/src/bin/dds.rs b/examples/stm32l0/src/bin/dds.rs
index a54b28a93..eaa7a61a8 100644
--- a/examples/stm32l0/src/bin/dds.rs
+++ b/examples/stm32l0/src/bin/dds.rs
@@ -11,7 +11,7 @@ use embassy_stm32::rcc::*;
 use embassy_stm32::time::hz;
 use embassy_stm32::timer::low_level::{Timer as LLTimer, *};
 use embassy_stm32::timer::simple_pwm::PwmPin;
-use embassy_stm32::timer::Channel;
+use embassy_stm32::timer::{Ch3, Channel};
 use embassy_stm32::{interrupt, pac, Config};
 use panic_probe as _;
@@ -70,7 +70,7 @@ async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(config);
    // setup PWM pin in AF mode
-    let _ch3 = PwmPin::new_ch3(p.PA2, OutputType::PushPull);
+    let _ch3 = PwmPin::<_, Ch3>::new(p.PA2, OutputType::PushPull);
    // initialize timer
    // we cannot use SimplePWM here because the Time is privately encapsulated
diff --git a/examples/stm32l1/Cargo.toml b/examples/stm32l1/Cargo.toml
index a0a7916a7..5d5d401f6 100644
--- a/examples/stm32l1/Cargo.toml
+++ b/examples/stm32l1/Cargo.toml
@@ -9,7 +9,7 @@ embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["de
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [ "defmt", "stm32l151cb-a", "time-driver-any", "memory-x"]  }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml
index 7da09e5b0..a6b4efcf8 100644
--- a/examples/stm32l4/Cargo.toml
+++ b/examples/stm32l4/Cargo.toml
@@ -10,8 +10,8 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768", ] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-net-adin1110 = { version = "0.3.0", path = "../../embassy-net-adin1110" }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt",  "udp", "tcp", "dhcpv4", "medium-ethernet"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
index 354ac90b2..dc90a3b85 100644
--- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
+++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
@@ -59,7 +59,7 @@ pub type SpeSpiCs = ExclusiveDevice<SpeSpi, Output<'static>, Delay>;
 pub type SpeInt = exti::ExtiInput<'static>;
 pub type SpeRst = Output<'static>;
 pub type Adin1110T = ADIN1110<SpeSpiCs>;
-pub type TempSensI2c = I2c<'static, Async>;
+pub type TempSensI2c = I2c<'static, Async, i2c::Master>;
 static TEMP: AtomicI32 = AtomicI32::new(0);
diff --git a/examples/stm32l432/src/bin/qspi_mmap.rs b/examples/stm32l432/src/bin/qspi_mmap.rs
index 86a20eb3d..075458fe5 100644
--- a/examples/stm32l432/src/bin/qspi_mmap.rs
+++ b/examples/stm32l432/src/bin/qspi_mmap.rs
@@ -7,7 +7,7 @@
 use defmt::info;
 use embassy_stm32::mode;
 use embassy_stm32::qspi::enums::{
-    AddressSize, ChipSelectHighTime, DummyCycles, FIFOThresholdLevel, MemorySize, QspiWidth,
+    AddressSize, ChipSelectHighTime, DummyCycles, FIFOThresholdLevel, MemorySize, QspiWidth, SampleShifting,
 };
 use embassy_stm32::qspi::{self, Instance, TransferConfig};
 pub struct FlashMemory<I: Instance> {
@@ -252,6 +252,7 @@ async fn main(_spawner: Spawner) {
        prescaler: 200,
        cs_high_time: ChipSelectHighTime::_1Cycle,
        fifo_threshold: FIFOThresholdLevel::_16Bytes,
+        sample_shifting: SampleShifting::None,
    };
    let driver = qspi::Qspi::new_bank1(p.QUADSPI, p.PB1, p.PB0, p.PA7, p.PA6, p.PA3, p.PA2, p.DMA2_CH7, config);
    let mut flash = FlashMemory::new(driver);
diff --git a/examples/stm32l5/Cargo.toml b/examples/stm32l5/Cargo.toml
index 3ea3bcd5c..1379d963c 100644
--- a/examples/stm32l5/Cargo.toml
+++ b/examples/stm32l5/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-net = { version = "0.7.0", path = "../../embassy-net", features = ["defmt",  "tcp", "dhcpv4", "medium-ethernet"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 usbd-hid = "0.8.1"
diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml
index 3aa45dc79..612d12ac2 100644
--- a/examples/stm32u0/Cargo.toml
+++ b/examples/stm32u0/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = [
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml
index 777d3ed4c..f92e85852 100644
--- a/examples/stm32u5/Cargo.toml
+++ b/examples/stm32u5/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-usb = { version = "0.4.0", path = "../../embassy-usb", features = ["defmt"] }
+embassy-usb = { version = "0.5.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 defmt = "1.0.1"
diff --git a/examples/stm32wb/src/bin/gatt_server.rs b/examples/stm32wb/src/bin/gatt_server.rs
index 041dc0cf5..9864fa026 100644
--- a/examples/stm32wb/src/bin/gatt_server.rs
+++ b/examples/stm32wb/src/bin/gatt_server.rs
@@ -27,6 +27,7 @@ use embassy_stm32_wpan::hci::vendor::event::{self, AttributeHandle, VendorEvent}
 use embassy_stm32_wpan::hci::{BdAddr, Event};
 use embassy_stm32_wpan::lhci::LhciC1DeviceInformationCcrp;
 use embassy_stm32_wpan::sub::ble::Ble;
+use embassy_stm32_wpan::sub::mm;
 use embassy_stm32_wpan::TlMbox;
 use {defmt_rtt as _, panic_probe as _};
@@ -38,7 +39,7 @@ bind_interrupts!(struct Irqs{
 const BLE_GAP_DEVICE_NAME_LENGTH: u8 = 7;
 #[embassy_executor::main]
-async fn main(_spawner: Spawner) {
+async fn main(spawner: Spawner) {
    /*
        How to make this work:
@@ -70,6 +71,7 @@ async fn main(_spawner: Spawner) {
    let config = Config::default();
    let mut mbox = TlMbox::init(p.IPCC, Irqs, config);
+    spawner.spawn(run_mm_queue(mbox.mm_subsystem)).unwrap();
    let sys_event = mbox.sys_subsystem.read().await;
    info!("sys event: {}", sys_event.payload());
@@ -221,6 +223,11 @@ async fn main(_spawner: Spawner) {
    }
 }
+#[embassy_executor::task]
+async fn run_mm_queue(memory_manager: mm::MemoryManager) {
+    memory_manager.run_queue().await;
+}
 fn get_bd_addr() -> BdAddr {
    let mut bytes = [0u8; 6];
diff --git a/examples/stm32wba/src/bin/adc.rs b/examples/stm32wba/src/bin/adc.rs
new file mode 100644
index 000000000..a9651d57e
--- /dev/null
+++ b/examples/stm32wba/src/bin/adc.rs
@@ -0,0 +1,49 @@
+#![no_std]
+#![no_main]
+use defmt::*;
+use embassy_stm32::adc::{adc4, AdcChannel};
+use {defmt_rtt as _, panic_probe as _};
+#[embassy_executor::main]
+async fn main(_spawner: embassy_executor::Spawner) {
+    let config = embassy_stm32::Config::default();
+    let mut p = embassy_stm32::init(config);
+    // **** ADC4 init ****
+    let mut adc4 = adc4::Adc4::new(p.ADC4);
+    let mut adc4_pin1 = p.PA0; // A4
+    let mut adc4_pin2 = p.PA1; // A5
+    adc4.set_resolution(adc4::Resolution::BITS12);
+    adc4.set_averaging(adc4::Averaging::Samples256);
+    adc4.set_sample_time(adc4::SampleTime::CYCLES1_5);
+    let max4 = adc4::resolution_to_max_count(adc4::Resolution::BITS12);
+    // **** ADC4 blocking read ****
+    let raw: u16 = adc4.blocking_read(&mut adc4_pin1);
+    let volt: f32 = 3.0 * raw as f32 / max4 as f32;
+    info!("Read adc4 pin 1 {}", volt);
+    let raw: u16 = adc4.blocking_read(&mut adc4_pin2);
+    let volt: f32 = 3.3 * raw as f32 / max4 as f32;
+    info!("Read adc4 pin 2 {}", volt);
+    // **** ADC4 async read ****
+    let mut degraded41 = adc4_pin1.degrade_adc();
+    let mut degraded42 = adc4_pin2.degrade_adc();
+    let mut measurements = [0u16; 2];
+    // The channels must be in ascending order and can't repeat for ADC4
+    adc4.read(
+        p.GPDMA1_CH1.reborrow(),
+        [&mut degraded42, &mut degraded41].into_iter(),
+        &mut measurements,
+    )
+    .await
+    .unwrap();
+    let volt2: f32 = 3.3 * measurements[0] as f32 / max4 as f32;
+    let volt1: f32 = 3.0 * measurements[1] as f32 / max4 as f32;
+    info!("Async read 4 pin 1 {}", volt1);
+    info!("Async read 4 pin 2 {}", volt2);
+}
diff --git a/examples/stm32wl/Cargo.toml b/examples/stm32wl/Cargo.toml
index 5ecd77443..1c5d9c07a 100644
--- a/examples/stm32wl/Cargo.toml
+++ b/examples/stm32wl/Cargo.toml
@@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.2.0", path = "../../embassy-stm32", features = ["
 embassy-sync = { version = "0.7.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.7.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt"] }
 embassy-time = { version = "0.4.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-embedded-hal = { version = "0.3.0", path = "../../embassy-embedded-hal" }
+embassy-embedded-hal = { version = "0.3.1", path = "../../embassy-embedded-hal" }
 defmt = "1.0.1"
 defmt-rtt = "1.0.0"