diff options
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/adc_interrupt.rs | 15 | ||||
| -rw-r--r-- | examples/common/mod.rs | 38 | ||||
| -rw-r--r-- | examples/lpuart_buffered.rs | 5 | ||||
| -rw-r--r-- | examples/ostimer_alarm.rs | 7 | ||||
| -rw-r--r-- | examples/ostimer_counter.rs | 8 | ||||
| -rw-r--r-- | examples/ostimer_race_test.rs | 5 | ||||
| -rw-r--r-- | examples/uart_interrupt.rs | 100 |
7 files changed, 84 insertions, 94 deletions
diff --git a/examples/adc_interrupt.rs b/examples/adc_interrupt.rs index dc82cfd30..3be85ac75 100644 --- a/examples/adc_interrupt.rs +++ b/examples/adc_interrupt.rs | |||
| @@ -2,6 +2,8 @@ | |||
| 2 | #![no_main] | 2 | #![no_main] |
| 3 | 3 | ||
| 4 | use embassy_executor::Spawner; | 4 | use embassy_executor::Spawner; |
| 5 | use embassy_mcxa276::clocks::periph_helpers::{AdcClockSel, Div4}; | ||
| 6 | use embassy_mcxa276::clocks::PoweredClock; | ||
| 5 | use hal::adc::{LpadcConfig, TriggerPriorityPolicy}; | 7 | use hal::adc::{LpadcConfig, TriggerPriorityPolicy}; |
| 6 | use hal::uart; | 8 | use hal::uart; |
| 7 | use mcxa_pac::adc1::cfg::{Pwrsel, Refsel}; | 9 | use mcxa_pac::adc1::cfg::{Pwrsel, Refsel}; |
| @@ -30,10 +32,10 @@ async fn main(_spawner: Spawner) { | |||
| 30 | common::init_uart2(hal::pac()); | 32 | common::init_uart2(hal::pac()); |
| 31 | } | 33 | } |
| 32 | 34 | ||
| 33 | let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; | 35 | // let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; |
| 34 | let uart = uart::Uart::<uart::Lpuart2>::new(p.LPUART2, uart::Config::new(src)); | 36 | // let uart = uart::Uart::<uart::Lpuart2>::new(p.LPUART2, uart::Config::new(src)); |
| 35 | 37 | ||
| 36 | uart.write_str_blocking("\r\n=== ADC interrupt Example ===\r\n"); | 38 | // uart.write_str_blocking("\r\n=== ADC interrupt Example ===\r\n"); |
| 37 | 39 | ||
| 38 | unsafe { | 40 | unsafe { |
| 39 | common::init_adc(hal::pac()); | 41 | common::init_adc(hal::pac()); |
| @@ -50,6 +52,9 @@ async fn main(_spawner: Spawner) { | |||
| 50 | enable_conv_pause: false, | 52 | enable_conv_pause: false, |
| 51 | conv_pause_delay: 0, | 53 | conv_pause_delay: 0, |
| 52 | fifo_watermark: 0, | 54 | fifo_watermark: 0, |
| 55 | power: PoweredClock::NormalEnabledDeepSleepDisabled, | ||
| 56 | source: AdcClockSel::FroLfDiv, | ||
| 57 | div: Div4::no_div(), | ||
| 53 | }; | 58 | }; |
| 54 | let adc = hal::adc::Adc::<hal::adc::Adc1>::new(p.ADC1, adc_config); | 59 | let adc = hal::adc::Adc::<hal::adc::Adc1>::new(p.ADC1, adc_config); |
| 55 | 60 | ||
| @@ -66,7 +71,7 @@ async fn main(_spawner: Spawner) { | |||
| 66 | conv_trigger_config.enable_hardware_trigger = false; | 71 | conv_trigger_config.enable_hardware_trigger = false; |
| 67 | adc.set_conv_trigger_config(0, &conv_trigger_config); | 72 | adc.set_conv_trigger_config(0, &conv_trigger_config); |
| 68 | 73 | ||
| 69 | uart.write_str_blocking("\r\n=== ADC configuration done... ===\r\n"); | 74 | // uart.write_str_blocking("\r\n=== ADC configuration done... ===\r\n"); |
| 70 | 75 | ||
| 71 | adc.enable_interrupt(0x1); | 76 | adc.enable_interrupt(0x1); |
| 72 | 77 | ||
| @@ -83,7 +88,7 @@ async fn main(_spawner: Spawner) { | |||
| 83 | while !adc.is_interrupt_triggered() { | 88 | while !adc.is_interrupt_triggered() { |
| 84 | // Wait until the interrupt is triggered | 89 | // Wait until the interrupt is triggered |
| 85 | } | 90 | } |
| 86 | uart.write_str_blocking("\r\n*** ADC interrupt TRIGGERED! ***\r\n"); | 91 | // uart.write_str_blocking("\r\n*** ADC interrupt TRIGGERED! ***\r\n"); |
| 87 | //TBD need to print the value | 92 | //TBD need to print the value |
| 88 | } | 93 | } |
| 89 | } | 94 | } |
diff --git a/examples/common/mod.rs b/examples/common/mod.rs index 8c52c8e86..7b197a590 100644 --- a/examples/common/mod.rs +++ b/examples/common/mod.rs | |||
| @@ -1,45 +1,31 @@ | |||
| 1 | //! Shared board-specific helpers for the FRDM-MCXA276 examples. | 1 | //! Shared board-specific helpers for the FRDM-MCXA276 examples. |
| 2 | //! These live with the examples so the HAL stays generic. | 2 | //! These live with the examples so the HAL stays generic. |
| 3 | 3 | ||
| 4 | use hal::{clocks, pins, reset}; | 4 | use hal::{clocks, pins}; |
| 5 | use {embassy_mcxa276 as hal, panic_probe as _}; | 5 | use {embassy_mcxa276 as hal, panic_probe as _}; |
| 6 | 6 | ||
| 7 | /// Initialize clocks and pin muxing for UART2 debug console. | 7 | /// Initialize clocks and pin muxing for UART2 debug console. |
| 8 | /// Safe to call multiple times; writes are idempotent for our use. | 8 | /// Safe to call multiple times; writes are idempotent for our use. |
| 9 | #[allow(dead_code)] | 9 | #[allow(dead_code)] |
| 10 | pub unsafe fn init_uart2(p: &mcxa_pac::Peripherals) { | 10 | pub unsafe fn init_uart2(_p: &mcxa_pac::Peripherals) { |
| 11 | clocks::ensure_frolf_running(p); | 11 | // NOTE: Lpuart has been updated to properly enable + reset its own clocks. |
| 12 | clocks::enable_uart2_port2(p); | 12 | // GPIO has not. |
| 13 | reset::release_reset_port2(p); | 13 | _ = clocks::enable_and_reset::<hal::peripherals::PORT2>(&clocks::NoConfig); |
| 14 | reset::release_reset_lpuart2(p); | ||
| 15 | pins::configure_uart2_pins_port2(); | 14 | pins::configure_uart2_pins_port2(); |
| 16 | clocks::select_uart2_clock(p); | ||
| 17 | } | 15 | } |
| 18 | 16 | ||
| 19 | /// Initialize clocks for the LED GPIO/PORT used by the blink example. | 17 | /// Initialize clocks for the LED GPIO/PORT used by the blink example. |
| 20 | #[allow(dead_code)] | 18 | #[allow(dead_code)] |
| 21 | pub unsafe fn init_led(p: &mcxa_pac::Peripherals) { | 19 | pub unsafe fn init_led(_p: &mcxa_pac::Peripherals) { |
| 22 | clocks::enable_led_port(p); | 20 | _ = clocks::enable_and_reset::<hal::peripherals::PORT3>(&clocks::NoConfig); |
| 23 | reset::release_reset_gpio3(p); | 21 | _ = clocks::enable_and_reset::<hal::peripherals::GPIO3>(&clocks::NoConfig); |
| 24 | reset::release_reset_port3(p); | ||
| 25 | } | ||
| 26 | |||
| 27 | /// Initialize clocks for OSTIMER0 (1 MHz source). | ||
| 28 | #[allow(dead_code)] | ||
| 29 | pub unsafe fn init_ostimer0(p: &mcxa_pac::Peripherals) { | ||
| 30 | clocks::ensure_frolf_running(p); | ||
| 31 | clocks::enable_ostimer0(p); | ||
| 32 | reset::release_reset_ostimer0(p); | ||
| 33 | clocks::select_ostimer0_clock_1m(p); | ||
| 34 | } | 22 | } |
| 35 | 23 | ||
| 36 | /// Initialize clocks and pin muxing for ADC. | 24 | /// Initialize clocks and pin muxing for ADC. |
| 37 | #[allow(dead_code)] | 25 | #[allow(dead_code)] |
| 38 | pub unsafe fn init_adc(p: &mcxa_pac::Peripherals) { | 26 | pub unsafe fn init_adc(_p: &mcxa_pac::Peripherals) { |
| 39 | clocks::ensure_frolf_running(p); | 27 | // NOTE: Lpuart has been updated to properly enable + reset its own clocks. |
| 40 | clocks::enable_adc(p); | 28 | // GPIO has not. |
| 41 | reset::release_reset_port1(p); | 29 | _ = clocks::enable_and_reset::<hal::peripherals::PORT1>(&clocks::NoConfig); |
| 42 | reset::release_reset_adc1(p); | ||
| 43 | pins::configure_adc_pins(); | 30 | pins::configure_adc_pins(); |
| 44 | clocks::select_adc_clock(p); | ||
| 45 | } | 31 | } |
diff --git a/examples/lpuart_buffered.rs b/examples/lpuart_buffered.rs index 35d311143..6ae690c56 100644 --- a/examples/lpuart_buffered.rs +++ b/examples/lpuart_buffered.rs | |||
| @@ -12,18 +12,17 @@ mod common; | |||
| 12 | 12 | ||
| 13 | // Bind OS_EVENT for timers plus LPUART2 IRQ for the buffered driver | 13 | // Bind OS_EVENT for timers plus LPUART2 IRQ for the buffered driver |
| 14 | bind_interrupts!(struct Irqs { | 14 | bind_interrupts!(struct Irqs { |
| 15 | LPUART2 => lpuart::buffered::BufferedInterruptHandler::<lpuart::lib::peripherals::LPUART2>; | 15 | LPUART2 => lpuart::buffered::BufferedInterruptHandler::<hal::peripherals::LPUART2>; |
| 16 | }); | 16 | }); |
| 17 | 17 | ||
| 18 | // Wrapper function for the interrupt handler | 18 | // Wrapper function for the interrupt handler |
| 19 | unsafe extern "C" fn lpuart2_handler() { | 19 | unsafe extern "C" fn lpuart2_handler() { |
| 20 | lpuart::buffered::BufferedInterruptHandler::<lpuart::lib::peripherals::LPUART2>::on_interrupt(); | 20 | lpuart::buffered::BufferedInterruptHandler::<hal::peripherals::LPUART2>::on_interrupt(); |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | #[embassy_executor::main] | 23 | #[embassy_executor::main] |
| 24 | async fn main(_spawner: Spawner) { | 24 | async fn main(_spawner: Spawner) { |
| 25 | let _p = hal::init(hal::config::Config::default()); | 25 | let _p = hal::init(hal::config::Config::default()); |
| 26 | let p2 = lpuart::lib::init(); | ||
| 27 | 26 | ||
| 28 | unsafe { | 27 | unsafe { |
| 29 | hal::interrupt::install_irq_handler(mcxa_pac::Interrupt::LPUART2, lpuart2_handler); | 28 | hal::interrupt::install_irq_handler(mcxa_pac::Interrupt::LPUART2, lpuart2_handler); |
diff --git a/examples/ostimer_alarm.rs b/examples/ostimer_alarm.rs index 78ca4bbc5..4f29a2c7c 100644 --- a/examples/ostimer_alarm.rs +++ b/examples/ostimer_alarm.rs | |||
| @@ -9,7 +9,7 @@ use {cortex_m, embassy_mcxa276 as hal}; | |||
| 9 | 9 | ||
| 10 | mod common; | 10 | mod common; |
| 11 | 11 | ||
| 12 | use embassy_mcxa276::bind_interrupts; | 12 | use embassy_mcxa276::{bind_interrupts, clocks::{periph_helpers::OstimerClockSel, PoweredClock}}; |
| 13 | use {defmt_rtt as _, panic_probe as _}; | 13 | use {defmt_rtt as _, panic_probe as _}; |
| 14 | 14 | ||
| 15 | // Bind only OS_EVENT, and retain the symbol explicitly so it can't be GC'ed. | 15 | // Bind only OS_EVENT, and retain the symbol explicitly so it can't be GC'ed. |
| @@ -50,9 +50,10 @@ async fn main(_spawner: Spawner) { | |||
| 50 | // Create OSTIMER instance | 50 | // Create OSTIMER instance |
| 51 | let config = hal::ostimer::Config { | 51 | let config = hal::ostimer::Config { |
| 52 | init_match_max: true, | 52 | init_match_max: true, |
| 53 | clock_frequency_hz: 1_000_000, // 1MHz | 53 | power: PoweredClock::NormalEnabledDeepSleepDisabled, |
| 54 | source: OstimerClockSel::Clk1M, | ||
| 54 | }; | 55 | }; |
| 55 | let ostimer = hal::ostimer::Ostimer::<hal::ostimer::Ostimer0>::new(p.OSTIMER0, config, hal::pac()); | 56 | let ostimer = hal::ostimer::Ostimer::<hal::ostimer::Ostimer0>::new(p.OSTIMER0, config); |
| 56 | 57 | ||
| 57 | // Create alarm with callback | 58 | // Create alarm with callback |
| 58 | let alarm = hal::ostimer::Alarm::new() | 59 | let alarm = hal::ostimer::Alarm::new() |
diff --git a/examples/ostimer_counter.rs b/examples/ostimer_counter.rs index e95140a88..069e879d8 100644 --- a/examples/ostimer_counter.rs +++ b/examples/ostimer_counter.rs | |||
| @@ -7,6 +7,7 @@ | |||
| 7 | #![no_main] | 7 | #![no_main] |
| 8 | 8 | ||
| 9 | use embassy_executor::Spawner; | 9 | use embassy_executor::Spawner; |
| 10 | use embassy_mcxa276::clocks::{periph_helpers::OstimerClockSel, PoweredClock}; | ||
| 10 | use embassy_time::{Duration, Timer}; | 11 | use embassy_time::{Duration, Timer}; |
| 11 | use hal::bind_interrupts; | 12 | use hal::bind_interrupts; |
| 12 | use {defmt_rtt as _, embassy_mcxa276 as hal, panic_probe as _}; | 13 | use {defmt_rtt as _, embassy_mcxa276 as hal, panic_probe as _}; |
| @@ -23,9 +24,6 @@ async fn main(_spawner: Spawner) { | |||
| 23 | 24 | ||
| 24 | // Enable/clock OSTIMER0 and UART2 before touching their registers | 25 | // Enable/clock OSTIMER0 and UART2 before touching their registers |
| 25 | unsafe { | 26 | unsafe { |
| 26 | common::init_ostimer0(hal::pac()); | ||
| 27 | } | ||
| 28 | unsafe { | ||
| 29 | common::init_uart2(hal::pac()); | 27 | common::init_uart2(hal::pac()); |
| 30 | } | 28 | } |
| 31 | let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; | 29 | let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; |
| @@ -44,9 +42,9 @@ async fn main(_spawner: Spawner) { | |||
| 44 | p.OSTIMER0, | 42 | p.OSTIMER0, |
| 45 | hal::ostimer::Config { | 43 | hal::ostimer::Config { |
| 46 | init_match_max: true, | 44 | init_match_max: true, |
| 47 | clock_frequency_hz: 1_000_000, | 45 | power: PoweredClock::NormalEnabledDeepSleepDisabled, |
| 46 | source: OstimerClockSel::Clk1M, | ||
| 48 | }, | 47 | }, |
| 49 | hal::pac(), | ||
| 50 | ); | 48 | ); |
| 51 | 49 | ||
| 52 | // Read initial counter value | 50 | // Read initial counter value |
diff --git a/examples/ostimer_race_test.rs b/examples/ostimer_race_test.rs index 368a3e52f..6e3d4ac21 100644 --- a/examples/ostimer_race_test.rs +++ b/examples/ostimer_race_test.rs | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | use core::sync::atomic::{AtomicU32, Ordering}; | 12 | use core::sync::atomic::{AtomicU32, Ordering}; |
| 13 | 13 | ||
| 14 | use embassy_executor::Spawner; | 14 | use embassy_executor::Spawner; |
| 15 | use embassy_mcxa276::clocks::{periph_helpers::OstimerClockSel, PoweredClock}; | ||
| 15 | use embassy_time::{Duration, Timer}; | 16 | use embassy_time::{Duration, Timer}; |
| 16 | use hal::bind_interrupts; | 17 | use hal::bind_interrupts; |
| 17 | use {defmt_rtt as _, embassy_mcxa276 as hal, panic_probe as _}; | 18 | use {defmt_rtt as _, embassy_mcxa276 as hal, panic_probe as _}; |
| @@ -98,9 +99,9 @@ async fn main(_spawner: Spawner) { | |||
| 98 | p.OSTIMER0, | 99 | p.OSTIMER0, |
| 99 | hal::ostimer::Config { | 100 | hal::ostimer::Config { |
| 100 | init_match_max: true, | 101 | init_match_max: true, |
| 101 | clock_frequency_hz: 1_000_000, | 102 | power: PoweredClock::NormalEnabledDeepSleepDisabled, |
| 103 | source: OstimerClockSel::Clk1M, | ||
| 102 | }, | 104 | }, |
| 103 | hal::pac(), | ||
| 104 | ); | 105 | ); |
| 105 | 106 | ||
| 106 | uart.write_str_blocking("OSTIMER instance created\n"); | 107 | uart.write_str_blocking("OSTIMER instance created\n"); |
diff --git a/examples/uart_interrupt.rs b/examples/uart_interrupt.rs index bd734f859..190a4d850 100644 --- a/examples/uart_interrupt.rs +++ b/examples/uart_interrupt.rs | |||
| @@ -2,68 +2,68 @@ | |||
| 2 | #![no_main] | 2 | #![no_main] |
| 3 | 3 | ||
| 4 | use embassy_executor::Spawner; | 4 | use embassy_executor::Spawner; |
| 5 | use embassy_mcxa276 as hal; | 5 | // use embassy_mcxa276 as hal; |
| 6 | use hal::interrupt::typelevel::Handler; | 6 | // use hal::interrupt::typelevel::Handler; |
| 7 | use hal::uart; | 7 | // use hal::uart; |
| 8 | 8 | ||
| 9 | mod common; | 9 | // mod common; |
| 10 | 10 | ||
| 11 | use embassy_mcxa276::bind_interrupts; | 11 | // use embassy_mcxa276::bind_interrupts; |
| 12 | use {defmt_rtt as _, panic_probe as _}; | 12 | // use {defmt_rtt as _, panic_probe as _}; |
| 13 | 13 | ||
| 14 | // Bind LPUART2 interrupt to our handler | 14 | // // Bind LPUART2 interrupt to our handler |
| 15 | bind_interrupts!(struct Irqs { | 15 | // bind_interrupts!(struct Irqs { |
| 16 | LPUART2 => hal::uart::UartInterruptHandler; | 16 | // LPUART2 => hal::uart::UartInterruptHandler; |
| 17 | }); | 17 | // }); |
| 18 | 18 | ||
| 19 | #[used] | 19 | // #[used] |
| 20 | #[no_mangle] | 20 | // #[no_mangle] |
| 21 | static KEEP_LPUART2: unsafe extern "C" fn() = LPUART2; | 21 | // static KEEP_LPUART2: unsafe extern "C" fn() = LPUART2; |
| 22 | 22 | ||
| 23 | // Wrapper function for the interrupt handler | 23 | // // Wrapper function for the interrupt handler |
| 24 | unsafe extern "C" fn lpuart2_handler() { | 24 | // unsafe extern "C" fn lpuart2_handler() { |
| 25 | hal::uart::UartInterruptHandler::on_interrupt(); | 25 | // hal::uart::UartInterruptHandler::on_interrupt(); |
| 26 | } | 26 | // } |
| 27 | 27 | ||
| 28 | #[embassy_executor::main] | 28 | #[embassy_executor::main] |
| 29 | async fn main(_spawner: Spawner) { | 29 | async fn main(_spawner: Spawner) { |
| 30 | let _p = hal::init(hal::config::Config::default()); | 30 | // let _p = hal::init(hal::config::Config::default()); |
| 31 | 31 | ||
| 32 | // Enable/clock UART2 before touching its registers | 32 | // // Enable/clock UART2 before touching its registers |
| 33 | unsafe { | 33 | // unsafe { |
| 34 | common::init_uart2(hal::pac()); | 34 | // common::init_uart2(hal::pac()); |
| 35 | } | 35 | // } |
| 36 | let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; | 36 | // let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; |
| 37 | let uart = uart::Uart::<uart::Lpuart2>::new(_p.LPUART2, uart::Config::new(src)); | 37 | // let uart = uart::Uart::<uart::Lpuart2>::new(_p.LPUART2, uart::Config::new(src)); |
| 38 | 38 | ||
| 39 | // Configure LPUART2 interrupt for UART operation BEFORE any UART usage | 39 | // // Configure LPUART2 interrupt for UART operation BEFORE any UART usage |
| 40 | hal::interrupt::LPUART2.configure_for_uart(hal::interrupt::Priority::from(3)); | 40 | // hal::interrupt::LPUART2.configure_for_uart(hal::interrupt::Priority::from(3)); |
| 41 | 41 | ||
| 42 | // Manually install the interrupt handler and enable RX IRQs in the peripheral | 42 | // // Manually install the interrupt handler and enable RX IRQs in the peripheral |
| 43 | unsafe { | 43 | // unsafe { |
| 44 | hal::interrupt::LPUART2.install_handler(lpuart2_handler); | 44 | // hal::interrupt::LPUART2.install_handler(lpuart2_handler); |
| 45 | // Enable RX interrupts so the handler actually fires on incoming bytes | 45 | // // Enable RX interrupts so the handler actually fires on incoming bytes |
| 46 | uart.enable_rx_interrupts(); | 46 | // uart.enable_rx_interrupts(); |
| 47 | } | 47 | // } |
| 48 | 48 | ||
| 49 | // Print welcome message | 49 | // // Print welcome message |
| 50 | uart.write_str_blocking("UART interrupt echo demo starting...\r\n"); | 50 | // uart.write_str_blocking("UART interrupt echo demo starting...\r\n"); |
| 51 | uart.write_str_blocking("Type characters to echo them back.\r\n"); | 51 | // uart.write_str_blocking("Type characters to echo them back.\r\n"); |
| 52 | 52 | ||
| 53 | // Log using defmt if enabled | 53 | // // Log using defmt if enabled |
| 54 | defmt::info!("UART interrupt echo demo starting..."); | 54 | // defmt::info!("UART interrupt echo demo starting..."); |
| 55 | 55 | ||
| 56 | loop { | 56 | // loop { |
| 57 | // Check if we have received any data | 57 | // // Check if we have received any data |
| 58 | if uart.rx_data_available() { | 58 | // if uart.rx_data_available() { |
| 59 | if let Some(byte) = uart.try_read_byte() { | 59 | // if let Some(byte) = uart.try_read_byte() { |
| 60 | // Echo it back | 60 | // // Echo it back |
| 61 | uart.write_byte(byte); | 61 | // uart.write_byte(byte); |
| 62 | uart.write_str_blocking(" (received)\r\n"); | 62 | // uart.write_str_blocking(" (received)\r\n"); |
| 63 | } | 63 | // } |
| 64 | } else { | 64 | // } else { |
| 65 | // No data available, wait a bit before checking again | 65 | // // No data available, wait a bit before checking again |
| 66 | cortex_m::asm::delay(12_000_000); // ~1 second at 12MHz | 66 | // cortex_m::asm::delay(12_000_000); // ~1 second at 12MHz |
| 67 | } | 67 | // } |
| 68 | } | 68 | // } |
| 69 | } | 69 | } |
