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-rw-r--r--src/lib.rs6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 3932ce41b..ef586c8f4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -53,6 +53,8 @@ const REG_BUS_STATUS: u32 = 0x8;
53const REG_BUS_FEEDBEAD: u32 = 0x14; 53const REG_BUS_FEEDBEAD: u32 = 0x14;
54const REG_BUS_TEST: u32 = 0x18; 54const REG_BUS_TEST: u32 = 0x18;
55const REG_BUS_RESP_DELAY: u32 = 0x1c; 55const REG_BUS_RESP_DELAY: u32 = 0x1c;
56const WORD_LENGTH_32: u32 = 0x1;
57const HIGH_SPEED: u32 = 0x10;
56 58
57// SPI_STATUS_REGISTER bits 59// SPI_STATUS_REGISTER bits
58const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; 60const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001;
@@ -570,8 +572,8 @@ where
570 let val = self.read32_swapped(REG_BUS_TEST).await; 572 let val = self.read32_swapped(REG_BUS_TEST).await;
571 assert_eq!(val, TEST_PATTERN); 573 assert_eq!(val, TEST_PATTERN);
572 574
573 // 32bit, little endian. 575 // 32-bit word length, little endian (which is the default endianess).
574 self.write32_swapped(REG_BUS_CTRL, 0x00010031).await; 576 self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await;
575 577
576 let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD).await; 578 let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD).await;
577 assert_eq!(val, FEEDBEAD); 579 assert_eq!(val, FEEDBEAD);