diff options
Diffstat (limited to 'tests/stm32/src')
| -rw-r--r-- | tests/stm32/src/bin/cryp.rs | 30 | ||||
| -rw-r--r-- | tests/stm32/src/common.rs | 1 |
2 files changed, 21 insertions, 10 deletions
diff --git a/tests/stm32/src/bin/cryp.rs b/tests/stm32/src/bin/cryp.rs index f105abf26..60778bdaa 100644 --- a/tests/stm32/src/bin/cryp.rs +++ b/tests/stm32/src/bin/cryp.rs | |||
| @@ -10,9 +10,14 @@ use aes_gcm::aead::{AeadInPlace, KeyInit}; | |||
| 10 | use aes_gcm::Aes128Gcm; | 10 | use aes_gcm::Aes128Gcm; |
| 11 | use common::*; | 11 | use common::*; |
| 12 | use embassy_executor::Spawner; | 12 | use embassy_executor::Spawner; |
| 13 | use embassy_stm32::cryp::*; | 13 | use embassy_stm32::cryp::{self, *}; |
| 14 | use embassy_stm32::{bind_interrupts, peripherals}; | ||
| 14 | use {defmt_rtt as _, panic_probe as _}; | 15 | use {defmt_rtt as _, panic_probe as _}; |
| 15 | 16 | ||
| 17 | bind_interrupts!(struct Irqs { | ||
| 18 | CRYP => cryp::InterruptHandler<peripherals::CRYP>; | ||
| 19 | }); | ||
| 20 | |||
| 16 | #[embassy_executor::main] | 21 | #[embassy_executor::main] |
| 17 | async fn main(_spawner: Spawner) { | 22 | async fn main(_spawner: Spawner) { |
| 18 | let p: embassy_stm32::Peripherals = embassy_stm32::init(config()); | 23 | let p: embassy_stm32::Peripherals = embassy_stm32::init(config()); |
| @@ -22,27 +27,32 @@ async fn main(_spawner: Spawner) { | |||
| 22 | const AAD1: &[u8] = b"additional data 1 stdargadrhaethaethjatjatjaetjartjstrjsfkk;'jopofyuisrteytweTASTUIKFUKIXTRDTEREharhaeryhaterjartjarthaethjrtjarthaetrhartjatejatrjsrtjartjyt1"; | 27 | const AAD1: &[u8] = b"additional data 1 stdargadrhaethaethjatjatjaetjartjstrjsfkk;'jopofyuisrteytweTASTUIKFUKIXTRDTEREharhaeryhaterjartjarthaethjrtjarthaetrhartjatejatrjsrtjartjyt1"; |
| 23 | const AAD2: &[u8] = b"additional data 2 stdhthsthsthsrthsrthsrtjdykjdukdyuldadfhsdghsdghsdghsadghjk'hioethjrtjarthaetrhartjatecfgjhzdfhgzdfhzdfghzdfhzdfhzfhjatrjsrtjartjytjfytjfyg"; | 28 | const AAD2: &[u8] = b"additional data 2 stdhthsthsthsrthsrthsrtjdykjdukdyuldadfhsdghsdghsdghsadghjk'hioethjrtjarthaetrhartjatecfgjhzdfhgzdfhzdfghzdfhzdfhzfhjatrjsrtjartjytjfytjfyg"; |
| 24 | 29 | ||
| 25 | let hw_cryp = Cryp::new(p.CRYP); | 30 | let in_dma = peri!(p, CRYP_IN_DMA); |
| 31 | let out_dma = peri!(p, CRYP_OUT_DMA); | ||
| 32 | |||
| 33 | let mut hw_cryp = Cryp::new(p.CRYP, in_dma, out_dma, Irqs); | ||
| 26 | let key: [u8; 16] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; | 34 | let key: [u8; 16] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; |
| 27 | let mut ciphertext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()]; | 35 | let mut ciphertext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()]; |
| 28 | let mut plaintext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()]; | 36 | let mut plaintext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()]; |
| 29 | let iv: [u8; 12] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12]; | 37 | let iv: [u8; 12] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12]; |
| 30 | 38 | ||
| 31 | // Encrypt in hardware using AES-GCM 128-bit | 39 | // Encrypt in hardware using AES-GCM 128-bit in blocking mode. |
| 32 | let aes_gcm = AesGcm::new(&key, &iv); | 40 | let aes_gcm = AesGcm::new(&key, &iv); |
| 33 | let mut gcm_encrypt = hw_cryp.start(&aes_gcm, Direction::Encrypt); | 41 | let mut gcm_encrypt = hw_cryp.start_blocking(&aes_gcm, Direction::Encrypt); |
| 34 | hw_cryp.aad_blocking(&mut gcm_encrypt, AAD1, false); | 42 | hw_cryp.aad_blocking(&mut gcm_encrypt, AAD1, false); |
| 35 | hw_cryp.aad_blocking(&mut gcm_encrypt, AAD2, true); | 43 | hw_cryp.aad_blocking(&mut gcm_encrypt, AAD2, true); |
| 36 | hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD1, &mut ciphertext[..PAYLOAD1.len()], false); | 44 | hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD1, &mut ciphertext[..PAYLOAD1.len()], false); |
| 37 | hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD2, &mut ciphertext[PAYLOAD1.len()..], true); | 45 | hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD2, &mut ciphertext[PAYLOAD1.len()..], true); |
| 38 | let encrypt_tag = hw_cryp.finish_blocking(gcm_encrypt); | 46 | let encrypt_tag = hw_cryp.finish_blocking(gcm_encrypt); |
| 39 | 47 | ||
| 40 | // Decrypt in hardware using AES-GCM 128-bit | 48 | // Decrypt in hardware using AES-GCM 128-bit in async (DMA) mode. |
| 41 | let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt); | 49 | let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt).await; |
| 42 | hw_cryp.aad_blocking(&mut gcm_decrypt, AAD1, false); | 50 | hw_cryp.aad(&mut gcm_decrypt, AAD1, false).await; |
| 43 | hw_cryp.aad_blocking(&mut gcm_decrypt, AAD2, true); | 51 | hw_cryp.aad(&mut gcm_decrypt, AAD2, true).await; |
| 44 | hw_cryp.payload_blocking(&mut gcm_decrypt, &ciphertext, &mut plaintext, true); | 52 | hw_cryp |
| 45 | let decrypt_tag = hw_cryp.finish_blocking(gcm_decrypt); | 53 | .payload(&mut gcm_decrypt, &ciphertext, &mut plaintext, true) |
| 54 | .await; | ||
| 55 | let decrypt_tag = hw_cryp.finish(gcm_decrypt).await; | ||
| 46 | 56 | ||
| 47 | info!("AES-GCM Ciphertext: {:?}", ciphertext); | 57 | info!("AES-GCM Ciphertext: {:?}", ciphertext); |
| 48 | info!("AES-GCM Plaintext: {:?}", plaintext); | 58 | info!("AES-GCM Plaintext: {:?}", plaintext); |
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 3297ea7e2..c379863a8 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -140,6 +140,7 @@ define_peris!( | |||
| 140 | ); | 140 | ); |
| 141 | #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))] | 141 | #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))] |
| 142 | define_peris!( | 142 | define_peris!( |
| 143 | CRYP_IN_DMA = DMA1_CH0, CRYP_OUT_DMA = DMA1_CH1, | ||
| 143 | UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1, | 144 | UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1, |
| 144 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1, | 145 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1, |
| 145 | ADC = ADC1, DAC = DAC1, DAC_PIN = PA4, | 146 | ADC = ADC1, DAC = DAC1, DAC_PIN = PA4, |
