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-rw-r--r--tests/stm32/src/bin/gpio.rs20
-rw-r--r--tests/stm32/src/bin/spi.rs22
-rw-r--r--tests/stm32/src/bin/spi_dma.rs24
-rw-r--r--tests/stm32/src/bin/usart.rs55
-rw-r--r--tests/stm32/src/bin/usart_dma.rs51
-rw-r--r--tests/stm32/src/bin/usart_rx_ringbuffered.rs105
-rw-r--r--tests/stm32/src/common.rs85
7 files changed, 119 insertions, 243 deletions
diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs
index aad174431..49d9a60f7 100644
--- a/tests/stm32/src/bin/gpio.rs
+++ b/tests/stm32/src/bin/gpio.rs
@@ -16,24 +16,8 @@ async fn main(_spawner: Spawner) {
16 16
17 // Arduino pins D0 and D1 17 // Arduino pins D0 and D1
18 // They're connected together with a 1K resistor. 18 // They're connected together with a 1K resistor.
19 #[cfg(feature = "stm32f103c8")] 19 let mut a = peri!(p, UART_RX);
20 let (mut a, mut b) = (p.PA9, p.PA10); 20 let mut b = peri!(p, UART_TX);
21 #[cfg(feature = "stm32g491re")]
22 let (mut a, mut b) = (p.PC4, p.PC5);
23 #[cfg(feature = "stm32g071rb")]
24 let (mut a, mut b) = (p.PC4, p.PC5);
25 #[cfg(feature = "stm32f429zi")]
26 let (mut a, mut b) = (p.PG14, p.PG9);
27 #[cfg(feature = "stm32wb55rg")]
28 let (mut a, mut b) = (p.PA3, p.PA2);
29 #[cfg(feature = "stm32h755zi")]
30 let (mut a, mut b) = (p.PB6, p.PB7);
31 #[cfg(feature = "stm32u585ai")]
32 let (mut a, mut b) = (p.PD9, p.PD8);
33 #[cfg(feature = "stm32h563zi")]
34 let (mut a, mut b) = (p.PB6, p.PB7);
35 #[cfg(feature = "stm32c031c6")]
36 let (mut a, mut b) = (p.PB6, p.PB7);
37 21
38 // Test initial output 22 // Test initial output
39 { 23 {
diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs
index e51dd5bf2..b0fb75d69 100644
--- a/tests/stm32/src/bin/spi.rs
+++ b/tests/stm32/src/bin/spi.rs
@@ -16,24 +16,10 @@ async fn main(_spawner: Spawner) {
16 let p = embassy_stm32::init(config()); 16 let p = embassy_stm32::init(config());
17 info!("Hello World!"); 17 info!("Hello World!");
18 18
19 #[cfg(feature = "stm32f103c8")] 19 let spi = peri!(p, SPI);
20 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); 20 let sck = peri!(p, SPI_SCK);
21 #[cfg(feature = "stm32f429zi")] 21 let mosi = peri!(p, SPI_MOSI);
22 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); 22 let miso = peri!(p, SPI_MISO);
23 #[cfg(feature = "stm32h755zi")]
24 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PB5, p.PA6);
25 #[cfg(feature = "stm32g491re")]
26 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
27 #[cfg(feature = "stm32g071rb")]
28 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
29 #[cfg(feature = "stm32wb55rg")]
30 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
31 #[cfg(feature = "stm32u585ai")]
32 let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
33 #[cfg(feature = "stm32h563zi")]
34 let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
35 #[cfg(feature = "stm32c031c6")]
36 let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
37 23
38 let mut spi_config = spi::Config::default(); 24 let mut spi_config = spi::Config::default();
39 spi_config.frequency = Hertz(1_000_000); 25 spi_config.frequency = Hertz(1_000_000);
diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs
index d45cbe45b..212cfae5d 100644
--- a/tests/stm32/src/bin/spi_dma.rs
+++ b/tests/stm32/src/bin/spi_dma.rs
@@ -15,24 +15,12 @@ async fn main(_spawner: Spawner) {
15 let p = embassy_stm32::init(config()); 15 let p = embassy_stm32::init(config());
16 info!("Hello World!"); 16 info!("Hello World!");
17 17
18 #[cfg(feature = "stm32f103c8")] 18 let spi = peri!(p, SPI);
19 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2); 19 let sck = peri!(p, SPI_SCK);
20 #[cfg(feature = "stm32f429zi")] 20 let mosi = peri!(p, SPI_MOSI);
21 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2); 21 let miso = peri!(p, SPI_MISO);
22 #[cfg(feature = "stm32h755zi")] 22 let tx_dma = peri!(p, SPI_TX_DMA);
23 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1); 23 let rx_dma = peri!(p, SPI_RX_DMA);
24 #[cfg(feature = "stm32g491re")]
25 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
26 #[cfg(feature = "stm32g071rb")]
27 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
28 #[cfg(feature = "stm32wb55rg")]
29 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
30 #[cfg(feature = "stm32u585ai")]
31 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
32 #[cfg(feature = "stm32h563zi")]
33 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
34 #[cfg(feature = "stm32c031c6")]
35 let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
36 24
37 let mut spi_config = spi::Config::default(); 25 let mut spi_config = spi::Config::default();
38 spi_config.frequency = Hertz(1_000_000); 26 spi_config.frequency = Hertz(1_000_000);
diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs
index 394005b82..e789e543d 100644
--- a/tests/stm32/src/bin/usart.rs
+++ b/tests/stm32/src/bin/usart.rs
@@ -9,35 +9,8 @@ use defmt::assert_eq;
9use embassy_executor::Spawner; 9use embassy_executor::Spawner;
10use embassy_stm32::dma::NoDma; 10use embassy_stm32::dma::NoDma;
11use embassy_stm32::usart::{Config, Error, Uart}; 11use embassy_stm32::usart::{Config, Error, Uart};
12use embassy_stm32::{bind_interrupts, peripherals, usart};
13use embassy_time::{Duration, Instant}; 12use embassy_time::{Duration, Instant};
14 13
15#[cfg(any(
16 feature = "stm32f103c8",
17 feature = "stm32g491re",
18 feature = "stm32g071rb",
19 feature = "stm32h755zi",
20 feature = "stm32c031c6",
21))]
22bind_interrupts!(struct Irqs {
23 USART1 => usart::InterruptHandler<peripherals::USART1>;
24});
25
26#[cfg(feature = "stm32u585ai")]
27bind_interrupts!(struct Irqs {
28 USART3 => usart::InterruptHandler<peripherals::USART3>;
29});
30
31#[cfg(feature = "stm32f429zi")]
32bind_interrupts!(struct Irqs {
33 USART6 => usart::InterruptHandler<peripherals::USART6>;
34});
35
36#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
37bind_interrupts!(struct Irqs {
38 LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
39});
40
41#[embassy_executor::main] 14#[embassy_executor::main]
42async fn main(_spawner: Spawner) { 15async fn main(_spawner: Spawner) {
43 let p = embassy_stm32::init(config()); 16 let p = embassy_stm32::init(config());
@@ -45,28 +18,14 @@ async fn main(_spawner: Spawner) {
45 18
46 // Arduino pins D0 and D1 19 // Arduino pins D0 and D1
47 // They're connected together with a 1K resistor. 20 // They're connected together with a 1K resistor.
48 #[cfg(feature = "stm32f103c8")] 21 let mut usart = peri!(p, UART);
49 let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1); 22 let mut rx = peri!(p, UART_RX);
50 #[cfg(feature = "stm32g491re")] 23 let mut tx = peri!(p, UART_TX);
51 let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1); 24 let irq = irqs!(UART);
52 #[cfg(feature = "stm32g071rb")]
53 let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
54 #[cfg(feature = "stm32f429zi")]
55 let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6);
56 #[cfg(feature = "stm32wb55rg")]
57 let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1);
58 #[cfg(feature = "stm32h755zi")]
59 let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
60 #[cfg(feature = "stm32u585ai")]
61 let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3);
62 #[cfg(feature = "stm32h563zi")]
63 let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1);
64 #[cfg(feature = "stm32c031c6")]
65 let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
66 25
67 { 26 {
68 let config = Config::default(); 27 let config = Config::default();
69 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config); 28 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config);
70 29
71 // We can't send too many bytes, they have to fit in the FIFO. 30 // We can't send too many bytes, they have to fit in the FIFO.
72 // This is because we aren't sending+receiving at the same time. 31 // This is because we aren't sending+receiving at the same time.
@@ -82,7 +41,7 @@ async fn main(_spawner: Spawner) {
82 // Test error handling with with an overflow error 41 // Test error handling with with an overflow error
83 { 42 {
84 let config = Config::default(); 43 let config = Config::default();
85 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config); 44 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config);
86 45
87 // Send enough bytes to fill the RX FIFOs off all USART versions. 46 // Send enough bytes to fill the RX FIFOs off all USART versions.
88 let data = [0xC0, 0xDE, 0x12, 0x23, 0x34]; 47 let data = [0xC0, 0xDE, 0x12, 0x23, 0x34];
@@ -116,7 +75,7 @@ async fn main(_spawner: Spawner) {
116 75
117 let mut config = Config::default(); 76 let mut config = Config::default();
118 config.baudrate = baudrate; 77 config.baudrate = baudrate;
119 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config); 78 let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config);
120 79
121 let n = (baudrate as usize / 100).max(64); 80 let n = (baudrate as usize / 100).max(64);
122 81
diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs
index c34d9574b..f203ebb56 100644
--- a/tests/stm32/src/bin/usart_dma.rs
+++ b/tests/stm32/src/bin/usart_dma.rs
@@ -9,33 +9,6 @@ use defmt::assert_eq;
9use embassy_executor::Spawner; 9use embassy_executor::Spawner;
10use embassy_futures::join::join; 10use embassy_futures::join::join;
11use embassy_stm32::usart::{Config, Uart}; 11use embassy_stm32::usart::{Config, Uart};
12use embassy_stm32::{bind_interrupts, peripherals, usart};
13
14#[cfg(any(
15 feature = "stm32f103c8",
16 feature = "stm32g491re",
17 feature = "stm32g071rb",
18 feature = "stm32h755zi",
19 feature = "stm32c031c6",
20))]
21bind_interrupts!(struct Irqs {
22 USART1 => usart::InterruptHandler<peripherals::USART1>;
23});
24
25#[cfg(feature = "stm32u585ai")]
26bind_interrupts!(struct Irqs {
27 USART3 => usart::InterruptHandler<peripherals::USART3>;
28});
29
30#[cfg(feature = "stm32f429zi")]
31bind_interrupts!(struct Irqs {
32 USART6 => usart::InterruptHandler<peripherals::USART6>;
33});
34
35#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
36bind_interrupts!(struct Irqs {
37 LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
38});
39 12
40#[embassy_executor::main] 13#[embassy_executor::main]
41async fn main(_spawner: Spawner) { 14async fn main(_spawner: Spawner) {
@@ -44,24 +17,12 @@ async fn main(_spawner: Spawner) {
44 17
45 // Arduino pins D0 and D1 18 // Arduino pins D0 and D1
46 // They're connected together with a 1K resistor. 19 // They're connected together with a 1K resistor.
47 #[cfg(feature = "stm32f103c8")] 20 let usart = peri!(p, UART);
48 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5); 21 let rx = peri!(p, UART_RX);
49 #[cfg(feature = "stm32g491re")] 22 let tx = peri!(p, UART_TX);
50 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2); 23 let rx_dma = peri!(p, UART_RX_DMA);
51 #[cfg(feature = "stm32g071rb")] 24 let tx_dma = peri!(p, UART_TX_DMA);
52 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2); 25 let irq = irqs!(UART);
53 #[cfg(feature = "stm32f429zi")]
54 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
55 #[cfg(feature = "stm32wb55rg")]
56 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
57 #[cfg(feature = "stm32h755zi")]
58 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
59 #[cfg(feature = "stm32u585ai")]
60 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
61 #[cfg(feature = "stm32h563zi")]
62 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
63 #[cfg(feature = "stm32c031c6")]
64 let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
65 26
66 let config = Config::default(); 27 let config = Config::default();
67 let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); 28 let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
index c8dd2643b..fdbeb9f6a 100644
--- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs
+++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
@@ -10,87 +10,10 @@ use common::*;
10use defmt::{assert_eq, panic}; 10use defmt::{assert_eq, panic};
11use embassy_executor::Spawner; 11use embassy_executor::Spawner;
12use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx}; 12use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
13use embassy_stm32::{bind_interrupts, peripherals, usart};
14use embassy_time::{Duration, Timer}; 13use embassy_time::{Duration, Timer};
15use rand_chacha::ChaCha8Rng; 14use rand_chacha::ChaCha8Rng;
16use rand_core::{RngCore, SeedableRng}; 15use rand_core::{RngCore, SeedableRng};
17 16
18#[cfg(any(
19 feature = "stm32f103c8",
20 feature = "stm32g491re",
21 feature = "stm32g071rb",
22 feature = "stm32h755zi",
23 feature = "stm32c031c6",
24))]
25bind_interrupts!(struct Irqs {
26 USART1 => usart::InterruptHandler<peripherals::USART1>;
27});
28
29#[cfg(feature = "stm32u585ai")]
30bind_interrupts!(struct Irqs {
31 USART3 => usart::InterruptHandler<peripherals::USART3>;
32});
33
34#[cfg(feature = "stm32f429zi")]
35bind_interrupts!(struct Irqs {
36 USART1 => usart::InterruptHandler<peripherals::USART1>;
37 USART6 => usart::InterruptHandler<peripherals::USART6>;
38});
39
40#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
41bind_interrupts!(struct Irqs {
42 LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
43});
44
45#[cfg(feature = "stm32f103c8")]
46mod board {
47 pub type Uart = embassy_stm32::peripherals::USART1;
48 pub type TxDma = embassy_stm32::peripherals::DMA1_CH4;
49 pub type RxDma = embassy_stm32::peripherals::DMA1_CH5;
50}
51#[cfg(feature = "stm32g491re")]
52mod board {
53 pub type Uart = embassy_stm32::peripherals::USART1;
54 pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
55 pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
56}
57#[cfg(feature = "stm32g071rb")]
58mod board {
59 pub type Uart = embassy_stm32::peripherals::USART1;
60 pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
61 pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
62}
63#[cfg(feature = "stm32f429zi")]
64mod board {
65 pub type Uart = embassy_stm32::peripherals::USART6;
66 pub type TxDma = embassy_stm32::peripherals::DMA2_CH6;
67 pub type RxDma = embassy_stm32::peripherals::DMA2_CH1;
68}
69#[cfg(feature = "stm32wb55rg")]
70mod board {
71 pub type Uart = embassy_stm32::peripherals::LPUART1;
72 pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
73 pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
74}
75#[cfg(feature = "stm32h755zi")]
76mod board {
77 pub type Uart = embassy_stm32::peripherals::USART1;
78 pub type TxDma = embassy_stm32::peripherals::DMA1_CH0;
79 pub type RxDma = embassy_stm32::peripherals::DMA1_CH1;
80}
81#[cfg(feature = "stm32u585ai")]
82mod board {
83 pub type Uart = embassy_stm32::peripherals::USART3;
84 pub type TxDma = embassy_stm32::peripherals::GPDMA1_CH0;
85 pub type RxDma = embassy_stm32::peripherals::GPDMA1_CH1;
86}
87#[cfg(feature = "stm32c031c6")]
88mod board {
89 pub type Uart = embassy_stm32::peripherals::USART1;
90 pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
91 pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
92}
93
94const DMA_BUF_SIZE: usize = 256; 17const DMA_BUF_SIZE: usize = 256;
95 18
96#[embassy_executor::main] 19#[embassy_executor::main]
@@ -100,22 +23,12 @@ async fn main(spawner: Spawner) {
100 23
101 // Arduino pins D0 and D1 24 // Arduino pins D0 and D1
102 // They're connected together with a 1K resistor. 25 // They're connected together with a 1K resistor.
103 #[cfg(feature = "stm32f103c8")] 26 let usart = peri!(p, UART);
104 let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5); 27 let rx = peri!(p, UART_RX);
105 #[cfg(feature = "stm32g491re")] 28 let tx = peri!(p, UART_TX);
106 let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2); 29 let rx_dma = peri!(p, UART_RX_DMA);
107 #[cfg(feature = "stm32g071rb")] 30 let tx_dma = peri!(p, UART_TX_DMA);
108 let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2); 31 let irq = irqs!(UART);
109 #[cfg(feature = "stm32f429zi")]
110 let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
111 #[cfg(feature = "stm32wb55rg")]
112 let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
113 #[cfg(feature = "stm32h755zi")]
114 let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
115 #[cfg(feature = "stm32u585ai")]
116 let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
117 #[cfg(feature = "stm32c031c6")]
118 let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
119 32
120 // To run this test, use the saturating_serial test utility to saturate the serial port 33 // To run this test, use the saturating_serial test utility to saturate the serial port
121 34
@@ -127,7 +40,7 @@ async fn main(spawner: Spawner) {
127 config.stop_bits = StopBits::STOP1; 40 config.stop_bits = StopBits::STOP1;
128 config.parity = Parity::ParityNone; 41 config.parity = Parity::ParityNone;
129 42
130 let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config); 43 let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
131 let (tx, rx) = usart.split(); 44 let (tx, rx) = usart.split();
132 static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE]; 45 static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE];
133 let dma_buf = unsafe { DMA_BUF.as_mut() }; 46 let dma_buf = unsafe { DMA_BUF.as_mut() };
@@ -139,7 +52,7 @@ async fn main(spawner: Spawner) {
139} 52}
140 53
141#[embassy_executor::task] 54#[embassy_executor::task]
142async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) { 55async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>) {
143 // workaround https://github.com/embassy-rs/embassy/issues/1426 56 // workaround https://github.com/embassy-rs/embassy/issues/1426
144 Timer::after(Duration::from_millis(100) as _).await; 57 Timer::after(Duration::from_millis(100) as _).await;
145 58
@@ -162,7 +75,7 @@ async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
162} 75}
163 76
164#[embassy_executor::task] 77#[embassy_executor::task]
165async fn receive_task(mut rx: RingBufferedUartRx<'static, board::Uart, board::RxDma>) { 78async fn receive_task(mut rx: RingBufferedUartRx<'static, peris::UART, peris::UART_RX_DMA>) {
166 info!("Ready to receive..."); 79 info!("Ready to receive...");
167 80
168 let mut rng = ChaCha8Rng::seed_from_u64(1337); 81 let mut rng = ChaCha8Rng::seed_from_u64(1337);
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 3a1b5c3ec..055eade6b 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -25,6 +25,91 @@ teleprobe_meta::target!(b"nucleo-stm32h563zi");
25#[cfg(feature = "stm32c031c6")] 25#[cfg(feature = "stm32c031c6")]
26teleprobe_meta::target!(b"nucleo-stm32c031c6"); 26teleprobe_meta::target!(b"nucleo-stm32c031c6");
27 27
28macro_rules! define_peris {
29 ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => {
30 #[allow(unused_macros)]
31 macro_rules! peri {
32 $(
33 ($p:expr, $name) => {
34 $p.$peri
35 };
36 )*
37 }
38 #[allow(unused_macros)]
39 macro_rules! irqs {
40 $(
41 ($irq_name) => {{
42 embassy_stm32::bind_interrupts!(struct Irqs $irq_code);
43 Irqs
44 }};
45 )*
46 }
47
48 #[allow(unused)]
49 #[allow(non_camel_case_types)]
50 pub mod peris {
51 $(
52 pub type $name = embassy_stm32::peripherals::$peri;
53 )*
54 }
55 };
56}
57
58#[cfg(feature = "stm32f103c8")]
59define_peris!(
60 UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA1_CH4, UART_RX_DMA = DMA1_CH5,
61 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
62 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
63);
64#[cfg(feature = "stm32g491re")]
65define_peris!(
66 UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
67 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
68 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
69);
70#[cfg(feature = "stm32g071rb")]
71define_peris!(
72 UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
73 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
74 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
75);
76#[cfg(feature = "stm32f429zi")]
77define_peris!(
78 UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1,
79 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2,
80 @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART6>;},
81);
82#[cfg(feature = "stm32wb55rg")]
83define_peris!(
84 UART = LPUART1, UART_TX = PA2, UART_RX = PA3, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
85 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
86 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
87);
88#[cfg(feature = "stm32h755zi")]
89define_peris!(
90 UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1,
91 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1,
92 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
93);
94#[cfg(feature = "stm32u585ai")]
95define_peris!(
96 UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
97 SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
98 @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
99);
100#[cfg(feature = "stm32h563zi")]
101define_peris!(
102 UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
103 SPI = SPI4, SPI_SCK = PE12, SPI_MOSI = PE14, SPI_MISO = PE13, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
104 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
105);
106#[cfg(feature = "stm32c031c6")]
107define_peris!(
108 UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
109 SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
110 @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
111);
112
28pub fn config() -> Config { 113pub fn config() -> Config {
29 #[allow(unused_mut)] 114 #[allow(unused_mut)]
30 let mut config = Config::default(); 115 let mut config = Config::default();
generated by cgit (git 2.34.1) at 2026-04-05 23:08:29 +0000