60 files changed, 4133 insertions, 137 deletions

diff --git a/tests/nrf/.cargo/config.toml b/tests/nrf/.cargo/config.toml
new file mode 100644
index 000000000..03995f963
--- /dev/null
+++ b/tests/nrf/.cargo/config.toml
@@ -0,0 +1,9 @@
+[target.'cfg(all(target_arch = "arm", target_os = "none"))']
+#runner = "teleprobe local run --chip nRF52840_xxAA --elf"
+runner = "teleprobe client run"
+
+[build]
+target = "thumbv7em-none-eabi"
+
+[env]
+DEFMT_LOG = "trace"
diff --git a/tests/nrf/Cargo.toml b/tests/nrf/Cargo.toml
new file mode 100644
index 000000000..7ce51aa5e
--- /dev/null
+++ b/tests/nrf/Cargo.toml
@@ -0,0 +1,26 @@
+[package]
+edition = "2021"
+name = "embassy-nrf-examples"
+version = "0.1.0"
+license = "MIT OR Apache-2.0"
+
+[dependencies]
+teleprobe-meta = "1"
+
+embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
+embassy-sync = { version = "0.2.0", path = "../../embassy-sync", features = ["defmt", "nightly"] }
+embassy-executor = { version = "0.2.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "nightly", "integrated-timers"] }
+embassy-time = { version = "0.1.2", path = "../../embassy-time", features = ["defmt", "nightly", "unstable-traits", "defmt-timestamp-uptime"] }
+embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nightly", "unstable-traits", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] }
+embedded-io = { version = "0.4.0", features = ["async"] }
+embassy-net = { version = "0.1.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "nightly"] }
+embassy-net-esp-hosted = { version = "0.1.0", path = "../../embassy-net-esp-hosted", features = ["defmt"] }
+embedded-hal-async = { version = "0.2.0-alpha.2" }
+static_cell = { version = "1.1", features = [ "nightly" ] }
+
+defmt = "0.3"
+defmt-rtt = "0.4"
+
+cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
+cortex-m-rt = "0.7.0"
+panic-probe = { version = "0.3", features = ["print-defmt"] }
\ No newline at end of file
diff --git a/tests/nrf/build.rs b/tests/nrf/build.rs
new file mode 100644
index 000000000..93e2a28cf
--- /dev/null
+++ b/tests/nrf/build.rs
@@ -0,0 +1,17 @@
+use std::error::Error;
+use std::path::PathBuf;
+use std::{env, fs};
+
+fn main() -> Result<(), Box<dyn Error>> {
+    let out = PathBuf::from(env::var("OUT_DIR").unwrap());
+    fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap();
+    println!("cargo:rustc-link-search={}", out.display());
+    println!("cargo:rerun-if-changed=link_ram.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+    println!("cargo:rustc-link-arg-bins=-Tteleprobe.x");
+
+    Ok(())
+}
diff --git a/tests/nrf/link_ram.x b/tests/nrf/link_ram.x
new file mode 100644
index 000000000..26da86baa
--- /dev/null
+++ b/tests/nrf/link_ram.x
@@ -0,0 +1,254 @@
+/* ##### EMBASSY NOTE
+    Originally from https://github.com/rust-embedded/cortex-m-rt/blob/master/link.x.in
+    Adjusted to put everything in RAM
+*/
+
+/* # Developer notes
+
+- Symbols that start with a double underscore (__) are considered "private"
+
+- Symbols that start with a single underscore (_) are considered "semi-public"; they can be
+  overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" {
+  static mut __sbss }`).
+
+- `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a
+  symbol if not dropped if it appears in or near the front of the linker arguments and "it's not
+  needed" by any of the preceding objects (linker arguments)
+
+- `PROVIDE` is used to provide default values that can be overridden by a user linker script
+
+- On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and*
+  the LMA of .data are all 4-byte aligned. These alignments are assumed by the RAM initialization
+  routine. There's also a second benefit: 4-byte aligned boundaries means that you won't see
+  "Address (..) is out of bounds" in the disassembly produced by `objdump`.
+*/
+
+/* Provides information about the memory layout of the device */
+/* This will be provided by the user (see `memory.x`) or by a Board Support Crate */
+INCLUDE memory.x
+
+/* # Entry point = reset vector */
+EXTERN(__RESET_VECTOR);
+EXTERN(Reset);
+ENTRY(Reset);
+
+/* # Exception vectors */
+/* This is effectively weak aliasing at the linker level */
+/* The user can override any of these aliases by defining the corresponding symbol themselves (cf.
+   the `exception!` macro) */
+EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */
+
+EXTERN(DefaultHandler);
+
+PROVIDE(NonMaskableInt = DefaultHandler);
+EXTERN(HardFaultTrampoline);
+PROVIDE(MemoryManagement = DefaultHandler);
+PROVIDE(BusFault = DefaultHandler);
+PROVIDE(UsageFault = DefaultHandler);
+PROVIDE(SecureFault = DefaultHandler);
+PROVIDE(SVCall = DefaultHandler);
+PROVIDE(DebugMonitor = DefaultHandler);
+PROVIDE(PendSV = DefaultHandler);
+PROVIDE(SysTick = DefaultHandler);
+
+PROVIDE(DefaultHandler = DefaultHandler_);
+PROVIDE(HardFault = HardFault_);
+
+/* # Interrupt vectors */
+EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */
+
+/* # Pre-initialization function */
+/* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function,
+   then the function this points to will be called before the RAM is initialized. */
+PROVIDE(__pre_init = DefaultPreInit);
+
+/* # Sections */
+SECTIONS
+{
+  PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM));
+
+  /* ## Sections in RAM */
+  /* ### Vector table */
+  .vector_table ORIGIN(RAM) :
+  {
+    /* Initial Stack Pointer (SP) value */
+    LONG(_stack_start);
+
+    /* Reset vector */
+    KEEP(*(.vector_table.reset_vector)); /* this is the `__RESET_VECTOR` symbol */
+    __reset_vector = .;
+
+    /* Exceptions */
+    KEEP(*(.vector_table.exceptions)); /* this is the `__EXCEPTIONS` symbol */
+    __eexceptions = .;
+
+    /* Device specific interrupts */
+    KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */
+  } > RAM
+
+  PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table));
+
+  /* ### .text */
+  .text _stext :
+  {
+    __stext = .;
+    *(.Reset);
+
+    *(.text .text.*);
+
+    /* The HardFaultTrampoline uses the `b` instruction to enter `HardFault`,
+       so must be placed close to it. */
+    *(.HardFaultTrampoline);
+    *(.HardFault.*);
+
+    . = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */
+    __etext = .;
+  } > RAM
+
+  /* ### .rodata */
+  .rodata : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __srodata = .;
+    *(.rodata .rodata.*);
+
+    /* 4-byte align the end (VMA) of this section.
+       This is required by LLD to ensure the LMA of the following .data
+       section will have the correct alignment. */
+    . = ALIGN(4);
+    __erodata = .;
+  } > RAM
+
+  /* ## Sections in RAM */
+  /* ### .data */
+  .data : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __sdata = .;
+    __edata = .;
+    *(.data .data.*);
+    . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
+  } > RAM
+  /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
+   * use the .data loading mechanism by pushing __edata. Note: do not change
+   * output region or load region in those user sections! */
+  . = ALIGN(4);
+
+  /* LMA of .data */
+  __sidata = LOADADDR(.data);
+
+  /* ### .gnu.sgstubs
+     This section contains the TrustZone-M veneers put there by the Arm GNU linker. */
+  /* Security Attribution Unit blocks must be 32 bytes aligned. */
+  /* Note that this pads the RAM usage to 32 byte alignment. */
+  .gnu.sgstubs : ALIGN(32)
+  {
+    . = ALIGN(32);
+    __veneer_base = .;
+    *(.gnu.sgstubs*)
+    . = ALIGN(32);
+    __veneer_limit = .;
+  } > RAM
+
+  /* ### .bss */
+  .bss (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __sbss = .;
+    *(.bss .bss.*);
+    *(COMMON); /* Uninitialized C statics */
+    . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
+  } > RAM
+  /* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to
+   * use the .bss zeroing mechanism by pushing __ebss. Note: do not change
+   * output region or load region in those user sections! */
+  . = ALIGN(4);
+  __ebss = .;
+
+  /* ### .uninit */
+  .uninit (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __suninit = .;
+    *(.uninit .uninit.*);
+    . = ALIGN(4);
+    __euninit = .;
+  } > RAM
+
+  /* Place the heap right after `.uninit` in RAM */
+  PROVIDE(__sheap = __euninit);
+
+  /* ## .got */
+  /* Dynamic relocations are unsupported. This section is only used to detect relocatable code in
+     the input files and raise an error if relocatable code is found */
+  .got (NOLOAD) :
+  {
+    KEEP(*(.got .got.*));
+  }
+
+  /* ## Discarded sections */
+  /DISCARD/ :
+  {
+    /* Unused exception related info that only wastes space */
+    *(.ARM.exidx);
+    *(.ARM.exidx.*);
+    *(.ARM.extab.*);
+  }
+}
+
+/* Do not exceed this mark in the error messages below                                    | */
+/* # Alignment checks */
+ASSERT(ORIGIN(RAM) % 4 == 0, "
+ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned");
+
+ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, "
+BUG(cortex-m-rt): .data is not 4-byte aligned");
+
+ASSERT(__sidata % 4 == 0, "
+BUG(cortex-m-rt): the LMA of .data is not 4-byte aligned");
+
+ASSERT(__sbss % 4 == 0 && __ebss % 4 == 0, "
+BUG(cortex-m-rt): .bss is not 4-byte aligned");
+
+ASSERT(__sheap % 4 == 0, "
+BUG(cortex-m-rt): start of .heap is not 4-byte aligned");
+
+/* # Position checks */
+
+/* ## .vector_table */
+ASSERT(__reset_vector == ADDR(.vector_table) + 0x8, "
+BUG(cortex-m-rt): the reset vector is missing");
+
+ASSERT(__eexceptions == ADDR(.vector_table) + 0x40, "
+BUG(cortex-m-rt): the exception vectors are missing");
+
+ASSERT(SIZEOF(.vector_table) > 0x40, "
+ERROR(cortex-m-rt): The interrupt vectors are missing.
+Possible solutions, from most likely to less likely:
+- Link to a svd2rust generated device crate
+- Check that you actually use the device/hal/bsp crate in your code
+- Disable the 'device' feature of cortex-m-rt to build a generic application (a dependency
+may be enabling it)
+- Supply the interrupt handlers yourself. Check the documentation for details.");
+
+/* ## .text */
+ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, "
+ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section
+Set _stext to an address greater than the end of .vector_table (See output of `nm`)");
+
+ASSERT(_stext + SIZEOF(.text) < ORIGIN(RAM) + LENGTH(RAM), "
+ERROR(cortex-m-rt): The .text section must be placed inside the RAM memory.
+Set _stext to an address smaller than 'ORIGIN(RAM) + LENGTH(RAM)'");
+
+/* # Other checks */
+ASSERT(SIZEOF(.got) == 0, "
+ERROR(cortex-m-rt): .got section detected in the input object files
+Dynamic relocations are not supported. If you are linking to C code compiled using
+the 'cc' crate then modify your build script to compile the C code _without_
+the -fPIC flag. See the documentation of the `cc::Build.pic` method for details.");
+/* Do not exceed this mark in the error messages above                                    | */
+
+
+/* Provides weak aliases (cf. PROVIDED) for device specific interrupt handlers */
+/* This will usually be provided by a device crate generated using svd2rust (see `device.x`) */
+INCLUDE device.x
\ No newline at end of file
diff --git a/tests/nrf/memory.x b/tests/nrf/memory.x
new file mode 100644
index 000000000..58900a7bd
--- /dev/null
+++ b/tests/nrf/memory.x
@@ -0,0 +1,5 @@
+MEMORY
+{
+  FLASH : ORIGIN = 0x00000000, LENGTH = 1024K
+  RAM : ORIGIN = 0x20000000, LENGTH = 256K
+}
diff --git a/tests/nrf/src/bin/buffered_uart.rs b/tests/nrf/src/bin/buffered_uart.rs
new file mode 100644
index 000000000..72a4cb4ef
--- /dev/null
+++ b/tests/nrf/src/bin/buffered_uart.rs
@@ -0,0 +1,80 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_futures::join::join;
+use embassy_nrf::buffered_uarte::{self, BufferedUarte};
+use embassy_nrf::{bind_interrupts, peripherals, uarte};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    UARTE0_UART0 => buffered_uarte::InterruptHandler<peripherals::UARTE0>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_nrf::init(Default::default());
+    let mut config = uarte::Config::default();
+    config.parity = uarte::Parity::EXCLUDED;
+    config.baudrate = uarte::Baudrate::BAUD1M;
+
+    let mut tx_buffer = [0u8; 1024];
+    let mut rx_buffer = [0u8; 1024];
+
+    let mut u = BufferedUarte::new(
+        p.UARTE0,
+        p.TIMER0,
+        p.PPI_CH0,
+        p.PPI_CH1,
+        p.PPI_GROUP0,
+        Irqs,
+        p.P1_03,
+        p.P1_02,
+        config.clone(),
+        &mut rx_buffer,
+        &mut tx_buffer,
+    );
+
+    info!("uarte initialized!");
+
+    let (mut rx, mut tx) = u.split();
+
+    const COUNT: usize = 40_000;
+
+    let tx_fut = async {
+        let mut tx_buf = [0; 215];
+        let mut i = 0;
+        while i < COUNT {
+            let n = tx_buf.len().min(COUNT - i);
+            let tx_buf = &mut tx_buf[..n];
+            for (j, b) in tx_buf.iter_mut().enumerate() {
+                *b = (i + j) as u8;
+            }
+            let n = unwrap!(tx.write(tx_buf).await);
+            i += n;
+        }
+    };
+    let rx_fut = async {
+        let mut i = 0;
+        while i < COUNT {
+            let buf = unwrap!(rx.fill_buf().await);
+
+            for &b in buf {
+                assert_eq!(b, i as u8);
+                i = i + 1;
+            }
+
+            let n = buf.len();
+            rx.consume(n);
+        }
+    };
+
+    join(rx_fut, tx_fut).await;
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/nrf/src/bin/buffered_uart_spam.rs b/tests/nrf/src/bin/buffered_uart_spam.rs
new file mode 100644
index 000000000..50960206f
--- /dev/null
+++ b/tests/nrf/src/bin/buffered_uart_spam.rs
@@ -0,0 +1,93 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use core::mem;
+use core::ptr::NonNull;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_nrf::buffered_uarte::{self, BufferedUarte};
+use embassy_nrf::gpio::{Level, Output, OutputDrive};
+use embassy_nrf::ppi::{Event, Ppi, Task};
+use embassy_nrf::uarte::Uarte;
+use embassy_nrf::{bind_interrupts, pac, peripherals, uarte};
+use embassy_time::{Duration, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    UARTE0_UART0 => buffered_uarte::InterruptHandler<peripherals::UARTE0>;
+    UARTE1 => uarte::InterruptHandler<peripherals::UARTE1>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut p = embassy_nrf::init(Default::default());
+    let mut config = uarte::Config::default();
+    config.parity = uarte::Parity::EXCLUDED;
+    config.baudrate = uarte::Baudrate::BAUD1M;
+
+    let mut tx_buffer = [0u8; 1024];
+    let mut rx_buffer = [0u8; 1024];
+
+    mem::forget(Output::new(&mut p.P1_02, Level::High, OutputDrive::Standard));
+
+    let mut u = BufferedUarte::new(
+        p.UARTE0,
+        p.TIMER0,
+        p.PPI_CH0,
+        p.PPI_CH1,
+        p.PPI_GROUP0,
+        Irqs,
+        p.P1_03,
+        p.P1_04,
+        config.clone(),
+        &mut rx_buffer,
+        &mut tx_buffer,
+    );
+
+    info!("uarte initialized!");
+
+    // uarte needs some quiet time to start rxing properly.
+    Timer::after(Duration::from_millis(10)).await;
+
+    // Tx spam in a loop.
+    const NSPAM: usize = 17;
+    static mut TX_BUF: [u8; NSPAM] = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
+    let _spam = Uarte::new(p.UARTE1, Irqs, p.P1_01, p.P1_02, config.clone());
+    let spam_peri: pac::UARTE1 = unsafe { mem::transmute(()) };
+    let event = unsafe { Event::new_unchecked(NonNull::new_unchecked(&spam_peri.events_endtx as *const _ as _)) };
+    let task = unsafe { Task::new_unchecked(NonNull::new_unchecked(&spam_peri.tasks_starttx as *const _ as _)) };
+    let mut spam_ppi = Ppi::new_one_to_one(p.PPI_CH2, event, task);
+    spam_ppi.enable();
+    let p = unsafe { TX_BUF.as_mut_ptr() };
+    spam_peri.txd.ptr.write(|w| unsafe { w.ptr().bits(p as u32) });
+    spam_peri.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(NSPAM as _) });
+    spam_peri.tasks_starttx.write(|w| unsafe { w.bits(1) });
+
+    let mut i = 0;
+    let mut total = 0;
+    while total < 256 * 1024 {
+        let buf = unwrap!(u.fill_buf().await);
+        //info!("rx {}", buf);
+
+        for &b in buf {
+            assert_eq!(b, unsafe { TX_BUF[i] });
+
+            i = i + 1;
+            if i == NSPAM {
+                i = 0;
+            }
+        }
+
+        // Read bytes have to be explicitly consumed, otherwise fill_buf() will return them again
+        let n = buf.len();
+        u.consume(n);
+        total += n;
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/nrf/src/bin/timer.rs b/tests/nrf/src/bin/timer.rs
new file mode 100644
index 000000000..607c5bbf1
--- /dev/null
+++ b/tests/nrf/src/bin/timer.rs
@@ -0,0 +1,27 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert, info};
+use embassy_executor::Spawner;
+use embassy_time::{Duration, Instant, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let _p = embassy_nrf::init(Default::default());
+    info!("Hello World!");
+
+    let start = Instant::now();
+    Timer::after(Duration::from_millis(100)).await;
+    let end = Instant::now();
+    let ms = (end - start).as_millis();
+    info!("slept for {} ms", ms);
+    assert!(ms >= 99);
+    assert!(ms < 110);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/nrf/src/bin/wifi_esp_hosted_perf.rs b/tests/nrf/src/bin/wifi_esp_hosted_perf.rs
new file mode 100644
index 000000000..398ab9d27
--- /dev/null
+++ b/tests/nrf/src/bin/wifi_esp_hosted_perf.rs
@@ -0,0 +1,270 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{error, info, unwrap};
+use embassy_executor::Spawner;
+use embassy_futures::join::join;
+use embassy_net::tcp::TcpSocket;
+use embassy_net::{Config, Ipv4Address, Stack, StackResources};
+use embassy_nrf::gpio::{AnyPin, Input, Level, Output, OutputDrive, Pin, Pull};
+use embassy_nrf::rng::Rng;
+use embassy_nrf::spim::{self, Spim};
+use embassy_nrf::{bind_interrupts, peripherals};
+use embassy_time::{with_timeout, Delay, Duration, Timer};
+use embedded_hal_async::spi::ExclusiveDevice;
+use static_cell::make_static;
+use {defmt_rtt as _, embassy_net_esp_hosted as hosted, panic_probe as _};
+
+teleprobe_meta::timeout!(120);
+
+bind_interrupts!(struct Irqs {
+    SPIM3 => spim::InterruptHandler<peripherals::SPI3>;
+    RNG => embassy_nrf::rng::InterruptHandler<peripherals::RNG>;
+});
+
+#[embassy_executor::task]
+async fn wifi_task(
+    runner: hosted::Runner<
+        'static,
+        ExclusiveDevice<Spim<'static, peripherals::SPI3>, Output<'static, peripherals::P0_31>, Delay>,
+        Input<'static, AnyPin>,
+        Output<'static, peripherals::P1_05>,
+    >,
+) -> ! {
+    runner.run().await
+}
+
+type MyDriver = hosted::NetDriver<'static>;
+
+#[embassy_executor::task]
+async fn net_task(stack: &'static Stack<MyDriver>) -> ! {
+    stack.run().await
+}
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    info!("Hello World!");
+
+    let p = embassy_nrf::init(Default::default());
+
+    let miso = p.P0_28;
+    let sck = p.P0_29;
+    let mosi = p.P0_30;
+    let cs = Output::new(p.P0_31, Level::High, OutputDrive::HighDrive);
+    let handshake = Input::new(p.P1_01.degrade(), Pull::Up);
+    let ready = Input::new(p.P1_04.degrade(), Pull::None);
+    let reset = Output::new(p.P1_05, Level::Low, OutputDrive::Standard);
+
+    let mut config = spim::Config::default();
+    config.frequency = spim::Frequency::M32;
+    config.mode = spim::MODE_2; // !!!
+    let spi = spim::Spim::new(p.SPI3, Irqs, sck, miso, mosi, config);
+    let spi = ExclusiveDevice::new(spi, cs, Delay);
+
+    let (device, mut control, runner) = embassy_net_esp_hosted::new(
+        make_static!(embassy_net_esp_hosted::State::new()),
+        spi,
+        handshake,
+        ready,
+        reset,
+    )
+    .await;
+
+    unwrap!(spawner.spawn(wifi_task(runner)));
+
+    control.init().await;
+    control.join(WIFI_NETWORK, WIFI_PASSWORD).await;
+
+    // Generate random seed
+    let mut rng = Rng::new(p.RNG, Irqs);
+    let mut seed = [0; 8];
+    rng.blocking_fill_bytes(&mut seed);
+    let seed = u64::from_le_bytes(seed);
+
+    // Init network stack
+    let stack = &*make_static!(Stack::new(
+        device,
+        Config::dhcpv4(Default::default()),
+        make_static!(StackResources::<2>::new()),
+        seed
+    ));
+
+    unwrap!(spawner.spawn(net_task(stack)));
+
+    info!("Waiting for DHCP up...");
+    while stack.config_v4().is_none() {
+        Timer::after(Duration::from_millis(100)).await;
+    }
+    info!("IP addressing up!");
+
+    let down = test_download(stack).await;
+    let up = test_upload(stack).await;
+    let updown = test_upload_download(stack).await;
+
+    assert!(down > TEST_EXPECTED_DOWNLOAD_KBPS);
+    assert!(up > TEST_EXPECTED_UPLOAD_KBPS);
+    assert!(updown > TEST_EXPECTED_UPLOAD_DOWNLOAD_KBPS);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+// Test-only wifi network, no internet access!
+const WIFI_NETWORK: &str = "EmbassyTest";
+const WIFI_PASSWORD: &str = "V8YxhKt5CdIAJFud";
+
+const TEST_DURATION: usize = 10;
+const TEST_EXPECTED_DOWNLOAD_KBPS: usize = 150;
+const TEST_EXPECTED_UPLOAD_KBPS: usize = 150;
+const TEST_EXPECTED_UPLOAD_DOWNLOAD_KBPS: usize = 150;
+const RX_BUFFER_SIZE: usize = 4096;
+const TX_BUFFER_SIZE: usize = 4096;
+const SERVER_ADDRESS: Ipv4Address = Ipv4Address::new(192, 168, 2, 2);
+const DOWNLOAD_PORT: u16 = 4321;
+const UPLOAD_PORT: u16 = 4322;
+const UPLOAD_DOWNLOAD_PORT: u16 = 4323;
+
+async fn test_download(stack: &'static Stack<MyDriver>) -> usize {
+    info!("Testing download...");
+
+    let mut rx_buffer = [0; RX_BUFFER_SIZE];
+    let mut tx_buffer = [0; TX_BUFFER_SIZE];
+    let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
+    socket.set_timeout(Some(Duration::from_secs(10)));
+
+    info!("connecting to {:?}:{}...", SERVER_ADDRESS, DOWNLOAD_PORT);
+    if let Err(e) = socket.connect((SERVER_ADDRESS, DOWNLOAD_PORT)).await {
+        error!("connect error: {:?}", e);
+        return 0;
+    }
+    info!("connected, testing...");
+
+    let mut rx_buf = [0; 4096];
+    let mut total: usize = 0;
+    with_timeout(Duration::from_secs(TEST_DURATION as _), async {
+        loop {
+            match socket.read(&mut rx_buf).await {
+                Ok(0) => {
+                    error!("read EOF");
+                    return 0;
+                }
+                Ok(n) => total += n,
+                Err(e) => {
+                    error!("read error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    })
+    .await
+    .ok();
+
+    let kbps = (total + 512) / 1024 / TEST_DURATION;
+    info!("download: {} kB/s", kbps);
+    kbps
+}
+
+async fn test_upload(stack: &'static Stack<MyDriver>) -> usize {
+    info!("Testing upload...");
+
+    let mut rx_buffer = [0; RX_BUFFER_SIZE];
+    let mut tx_buffer = [0; TX_BUFFER_SIZE];
+    let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
+    socket.set_timeout(Some(Duration::from_secs(10)));
+
+    info!("connecting to {:?}:{}...", SERVER_ADDRESS, UPLOAD_PORT);
+    if let Err(e) = socket.connect((SERVER_ADDRESS, UPLOAD_PORT)).await {
+        error!("connect error: {:?}", e);
+        return 0;
+    }
+    info!("connected, testing...");
+
+    let buf = [0; 4096];
+    let mut total: usize = 0;
+    with_timeout(Duration::from_secs(TEST_DURATION as _), async {
+        loop {
+            match socket.write(&buf).await {
+                Ok(0) => {
+                    error!("write zero?!??!?!");
+                    return 0;
+                }
+                Ok(n) => total += n,
+                Err(e) => {
+                    error!("write error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    })
+    .await
+    .ok();
+
+    let kbps = (total + 512) / 1024 / TEST_DURATION;
+    info!("upload: {} kB/s", kbps);
+    kbps
+}
+
+async fn test_upload_download(stack: &'static Stack<MyDriver>) -> usize {
+    info!("Testing upload+download...");
+
+    let mut rx_buffer = [0; RX_BUFFER_SIZE];
+    let mut tx_buffer = [0; TX_BUFFER_SIZE];
+    let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
+    socket.set_timeout(Some(Duration::from_secs(10)));
+
+    info!("connecting to {:?}:{}...", SERVER_ADDRESS, UPLOAD_DOWNLOAD_PORT);
+    if let Err(e) = socket.connect((SERVER_ADDRESS, UPLOAD_DOWNLOAD_PORT)).await {
+        error!("connect error: {:?}", e);
+        return 0;
+    }
+    info!("connected, testing...");
+
+    let (mut reader, mut writer) = socket.split();
+
+    let tx_buf = [0; 4096];
+    let mut rx_buf = [0; 4096];
+    let mut total: usize = 0;
+    let tx_fut = async {
+        loop {
+            match writer.write(&tx_buf).await {
+                Ok(0) => {
+                    error!("write zero?!??!?!");
+                    return 0;
+                }
+                Ok(_) => {}
+                Err(e) => {
+                    error!("write error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    };
+
+    let rx_fut = async {
+        loop {
+            match reader.read(&mut rx_buf).await {
+                Ok(0) => {
+                    error!("read EOF");
+                    return 0;
+                }
+                Ok(n) => total += n,
+                Err(e) => {
+                    error!("read error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    };
+
+    with_timeout(Duration::from_secs(TEST_DURATION as _), join(tx_fut, rx_fut))
+        .await
+        .ok();
+
+    let kbps = (total + 512) / 1024 / TEST_DURATION;
+    info!("upload+download: {} kB/s", kbps);
+    kbps
+}
diff --git a/tests/nrf/src/common.rs b/tests/nrf/src/common.rs
new file mode 100644
index 000000000..1a05ac1c5
--- /dev/null
+++ b/tests/nrf/src/common.rs
@@ -0,0 +1 @@
+teleprobe_meta::target!(b"nrf52840-dk");
diff --git a/tests/perf-server/Cargo.toml b/tests/perf-server/Cargo.toml
new file mode 100644
index 000000000..532039050
--- /dev/null
+++ b/tests/perf-server/Cargo.toml
@@ -0,0 +1,8 @@
+[package]
+name = "perf-server"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+log = "0.4.17"
+pretty_env_logger = "0.4.0"
diff --git a/tests/perf-server/deploy.sh b/tests/perf-server/deploy.sh
new file mode 100755
index 000000000..032e99c30
--- /dev/null
+++ b/tests/perf-server/deploy.sh
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+set -euxo pipefail
+
+[email protected]
+
+cargo build --release
+ssh $HOST -- systemctl stop perf-server
+scp target/release/perf-server $HOST:/root
+scp perf-server.service $HOST:/etc/systemd/system/
+ssh $HOST -- 'systemctl daemon-reload; systemctl restart perf-server'
\ No newline at end of file
diff --git a/tests/perf-server/perf-server.service b/tests/perf-server/perf-server.service
new file mode 100644
index 000000000..c14c5d16f
--- /dev/null
+++ b/tests/perf-server/perf-server.service
@@ -0,0 +1,16 @@
+[Unit]
+Description=perf-server
+After=network.target
+StartLimitIntervalSec=0
+
+[Service]
+Type=simple
+Restart=always
+RestartSec=1
+User=root
+ExecStart=/root/perf-server
+Environment=RUST_BACKTRACE=1
+Environment=RUST_LOG=info
+
+[Install]
+WantedBy=multi-user.target
diff --git a/tests/perf-server/src/main.rs b/tests/perf-server/src/main.rs
new file mode 100644
index 000000000..f6e7efc59
--- /dev/null
+++ b/tests/perf-server/src/main.rs
@@ -0,0 +1,90 @@
+use std::io::{Read, Write};
+use std::net::{TcpListener, TcpStream};
+use std::thread::spawn;
+use std::time::Duration;
+
+use log::info;
+
+fn main() {
+    pretty_env_logger::init();
+    spawn(|| rx_listen());
+    spawn(|| rxtx_listen());
+    tx_listen();
+}
+
+fn tx_listen() {
+    info!("tx: listening on 0.0.0.0:4321");
+    let listener = TcpListener::bind("0.0.0.0:4321").unwrap();
+    loop {
+        let (socket, addr) = listener.accept().unwrap();
+        info!("tx: received connection from: {}", addr);
+        spawn(|| tx_conn(socket));
+    }
+}
+
+fn tx_conn(mut socket: TcpStream) {
+    socket.set_read_timeout(Some(Duration::from_secs(30))).unwrap();
+    socket.set_write_timeout(Some(Duration::from_secs(30))).unwrap();
+
+    let buf = [0; 1024];
+    loop {
+        if let Err(e) = socket.write_all(&buf) {
+            info!("tx: failed to write to socket; err = {:?}", e);
+            return;
+        }
+    }
+}
+
+fn rx_listen() {
+    info!("rx: listening on 0.0.0.0:4322");
+    let listener = TcpListener::bind("0.0.0.0:4322").unwrap();
+    loop {
+        let (socket, addr) = listener.accept().unwrap();
+        info!("rx: received connection from: {}", addr);
+        spawn(|| rx_conn(socket));
+    }
+}
+
+fn rx_conn(mut socket: TcpStream) {
+    socket.set_read_timeout(Some(Duration::from_secs(30))).unwrap();
+    socket.set_write_timeout(Some(Duration::from_secs(30))).unwrap();
+
+    let mut buf = [0; 1024];
+    loop {
+        if let Err(e) = socket.read_exact(&mut buf) {
+            info!("rx: failed to read from socket; err = {:?}", e);
+            return;
+        }
+    }
+}
+
+fn rxtx_listen() {
+    info!("rxtx: listening on 0.0.0.0:4323");
+    let listener = TcpListener::bind("0.0.0.0:4323").unwrap();
+    loop {
+        let (socket, addr) = listener.accept().unwrap();
+        info!("rxtx: received connection from: {}", addr);
+        spawn(|| rxtx_conn(socket));
+    }
+}
+
+fn rxtx_conn(mut socket: TcpStream) {
+    socket.set_read_timeout(Some(Duration::from_secs(30))).unwrap();
+    socket.set_write_timeout(Some(Duration::from_secs(30))).unwrap();
+
+    let mut buf = [0; 1024];
+    loop {
+        match socket.read(&mut buf) {
+            Ok(n) => {
+                if let Err(e) = socket.write_all(&buf[..n]) {
+                    info!("rxtx: failed to write to socket; err = {:?}", e);
+                    return;
+                }
+            }
+            Err(e) => {
+                info!("rxtx: failed to read from socket; err = {:?}", e);
+                return;
+            }
+        }
+    }
+}
diff --git a/tests/riscv32/.cargo/config.toml b/tests/riscv32/.cargo/config.toml
new file mode 100644
index 000000000..58299b54e
--- /dev/null
+++ b/tests/riscv32/.cargo/config.toml
@@ -0,0 +1,5 @@
+[target.riscv32imac-unknown-none-elf]
+runner = "true"
+
+[build]
+target = "riscv32imac-unknown-none-elf"
diff --git a/tests/riscv32/Cargo.toml b/tests/riscv32/Cargo.toml
new file mode 100644
index 000000000..61f886c0c
--- /dev/null
+++ b/tests/riscv32/Cargo.toml
@@ -0,0 +1,46 @@
+[package]
+edition = "2021"
+name = "embassy-riscv-tests"
+version = "0.1.0"
+license = "MIT OR Apache-2.0"
+
+[dependencies]
+critical-section = { version = "1.1.1", features = ["restore-state-bool"] }
+embassy-sync = { version = "0.2.0", path = "../../embassy-sync" }
+embassy-executor = { version = "0.2.0", path = "../../embassy-executor", features = ["arch-riscv32", "nightly", "executor-thread"] }
+embassy-time = { version = "0.1.2", path = "../../embassy-time" }
+embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
+
+riscv-rt = "0.11"
+riscv = { version = "0.10", features = ["critical-section-single-hart"] }
+
+
+[profile.dev]
+debug = 2
+debug-assertions = true
+opt-level = 's'
+overflow-checks = true
+
+[profile.release]
+codegen-units = 1
+debug = 2
+debug-assertions = false
+incremental = false
+lto = "fat"
+opt-level = 's'
+overflow-checks = false
+
+# do not optimize proc-macro crates = faster builds from scratch
+[profile.dev.build-override]
+codegen-units = 8
+debug = false
+debug-assertions = false
+opt-level = 0
+overflow-checks = false
+
+[profile.release.build-override]
+codegen-units = 8
+debug = false
+debug-assertions = false
+opt-level = 0
+overflow-checks = false
diff --git a/tests/riscv32/build.rs b/tests/riscv32/build.rs
new file mode 100644
index 000000000..e4a26c4a1
--- /dev/null
+++ b/tests/riscv32/build.rs
@@ -0,0 +1,8 @@
+use std::error::Error;
+
+fn main() -> Result<(), Box<dyn Error>> {
+    println!("cargo:rustc-link-arg-bins=-Tmemory.x");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+
+    Ok(())
+}
diff --git a/tests/riscv32/memory.x b/tests/riscv32/memory.x
new file mode 100644
index 000000000..316d577d4
--- /dev/null
+++ b/tests/riscv32/memory.x
@@ -0,0 +1,14 @@
+MEMORY
+{
+  ROM : ORIGIN = 0x80000000, LENGTH = 0x00020000
+  RAM : ORIGIN = 0x84000000, LENGTH = 0x00008000
+}
+
+REGION_ALIAS("REGION_TEXT", ROM);
+REGION_ALIAS("REGION_RODATA", ROM);
+REGION_ALIAS("REGION_DATA", RAM);
+REGION_ALIAS("REGION_BSS", RAM);
+REGION_ALIAS("REGION_HEAP", RAM);
+REGION_ALIAS("REGION_STACK", RAM);
+
+_stack_start = ORIGIN(RAM) + LENGTH(RAM) - 4;
diff --git a/tests/riscv32/src/bin/empty.rs b/tests/riscv32/src/bin/empty.rs
new file mode 100644
index 000000000..1874caec4
--- /dev/null
+++ b/tests/riscv32/src/bin/empty.rs
@@ -0,0 +1,16 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+use embassy_executor::Spawner;
+
+#[panic_handler]
+fn panic(_info: &core::panic::PanicInfo) -> ! {
+    loop {}
+}
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    // Don't do anything, just make sure it compiles.
+    loop {}
+}
diff --git a/tests/rp/.cargo/config.toml b/tests/rp/.cargo/config.toml
index 0330025e4..bc92e788b 100644
--- a/tests/rp/.cargo/config.toml
+++ b/tests/rp/.cargo/config.toml
@@ -1,10 +1,12 @@
 [unstable]
-build-std = ["core"]
-build-std-features = ["panic_immediate_abort"]
+# enabling these breaks the float tests during linking, with intrinsics
+# duplicated between embassy-rp and compilter_builtins
+#build-std = ["core"]
+#build-std-features = ["panic_immediate_abort"]
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-#runner = "teleprobe client run --target bluepill-stm32f103c8 --elf"
-runner = "teleprobe local run --chip RP2040 --elf"
+runner = "teleprobe client run"
+#runner = "teleprobe local run --chip RP2040 --elf"
 
 rustflags = [
   # Code-size optimizations.
diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml
index 4d6877ccd..f2c902787 100644
--- a/tests/rp/Cargo.toml
+++ b/tests/rp/Cargo.toml
@@ -2,23 +2,35 @@
 edition = "2021"
 name = "embassy-rp-tests"
 version = "0.1.0"
+license = "MIT OR Apache-2.0"
 
 [dependencies]
-embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["defmt", "integrated-timers"] }
-embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt"] }
-embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["nightly", "defmt", "unstable-pac", "unstable-traits"]  }
+teleprobe-meta = "1.1"
+
+embassy-sync = { version = "0.2.0", path = "../../embassy-sync", features = ["defmt"] }
+embassy-executor = { version = "0.2.0", path = "../../embassy-executor", features = ["nightly", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
+embassy-time = { version = "0.1.2", path = "../../embassy-time", features = ["defmt"] }
+embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["nightly", "defmt", "unstable-pac", "unstable-traits", "time-driver", "critical-section-impl", "intrinsics", "rom-v2-intrinsics", "run-from-ram"]  }
+embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
+embassy-net = { version = "0.1.0", path = "../../embassy-net", features = ["defmt", "nightly", "tcp", "udp", "dhcpv4", "medium-ethernet"] }
+cyw43 = { path = "../../cyw43", features = ["defmt", "firmware-logs"] }
+cyw43-pio = { path = "../../cyw43-pio", features = ["defmt", "overclock"] }
 
 defmt = "0.3.0"
-defmt-rtt = "0.3.0"
+defmt-rtt = "0.4"
 
-cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
+cortex-m = { version = "0.7.6" }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" }
-embedded-hal-async = { version = "0.1.0-alpha.1" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.11" }
+embedded-hal-async = { version = "=0.2.0-alpha.2" }
 panic-probe = { version = "0.3.0", features = ["print-defmt"] }
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
+embedded-io = { version = "0.4.0", features = ["async"] }
+embedded-storage = { version = "0.3" }
+static_cell = { version = "1.1", features = ["nightly"]}
+pio = "0.2"
+pio-proc = "0.2"
 
 [profile.dev]
 debug = 2
diff --git a/tests/rp/build.rs b/tests/rp/build.rs
index 6f4872249..93e2a28cf 100644
--- a/tests/rp/build.rs
+++ b/tests/rp/build.rs
@@ -11,6 +11,7 @@ fn main() -> Result<(), Box<dyn Error>> {
     println!("cargo:rustc-link-arg-bins=--nmagic");
     println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
     println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+    println!("cargo:rustc-link-arg-bins=-Tteleprobe.x");
 
     Ok(())
 }
diff --git a/tests/rp/src/bin/adc.rs b/tests/rp/src/bin/adc.rs
new file mode 100644
index 000000000..e659844ae
--- /dev/null
+++ b/tests/rp/src/bin/adc.rs
@@ -0,0 +1,86 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_rp::adc::{Adc, Config, InterruptHandler, Pin};
+use embassy_rp::bind_interrupts;
+use embassy_rp::gpio::Pull;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    ADC_IRQ_FIFO => InterruptHandler;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut p = embassy_rp::init(Default::default());
+    let mut adc = Adc::new(p.ADC, Irqs, Config::default());
+
+    {
+        {
+            let mut p = Pin::new(&mut p.PIN_26, Pull::Down);
+            defmt::assert!(adc.blocking_read(&mut p).unwrap() < 0b01_0000_0000);
+            defmt::assert!(adc.read(&mut p).await.unwrap() < 0b01_0000_0000);
+        }
+        {
+            let mut p = Pin::new(&mut p.PIN_26, Pull::Up);
+            defmt::assert!(adc.blocking_read(&mut p).unwrap() > 0b11_0000_0000);
+            defmt::assert!(adc.read(&mut p).await.unwrap() > 0b11_0000_0000);
+        }
+    }
+    // not bothering with async reads from now on
+    {
+        {
+            let mut p = Pin::new(&mut p.PIN_27, Pull::Down);
+            defmt::assert!(adc.blocking_read(&mut p).unwrap() < 0b01_0000_0000);
+        }
+        {
+            let mut p = Pin::new(&mut p.PIN_27, Pull::Up);
+            defmt::assert!(adc.blocking_read(&mut p).unwrap() > 0b11_0000_0000);
+        }
+    }
+    {
+        {
+            let mut p = Pin::new(&mut p.PIN_28, Pull::Down);
+            defmt::assert!(adc.blocking_read(&mut p).unwrap() < 0b01_0000_0000);
+        }
+        {
+            let mut p = Pin::new(&mut p.PIN_28, Pull::Up);
+            defmt::assert!(adc.blocking_read(&mut p).unwrap() > 0b11_0000_0000);
+        }
+    }
+    {
+        // gp29 is connected to vsys through a 200k/100k divider,
+        // adding pulls should change the value
+        let low = {
+            let mut p = Pin::new(&mut p.PIN_29, Pull::Down);
+            adc.blocking_read(&mut p).unwrap()
+        };
+        let none = {
+            let mut p = Pin::new(&mut p.PIN_29, Pull::None);
+            adc.blocking_read(&mut p).unwrap()
+        };
+        let up = {
+            let mut p = Pin::new(&mut p.PIN_29, Pull::Up);
+            adc.blocking_read(&mut p).unwrap()
+        };
+        defmt::assert!(low < none);
+        defmt::assert!(none < up);
+    }
+
+    let temp = convert_to_celsius(adc.read_temperature().await.unwrap());
+    defmt::assert!(temp > 0.0);
+    defmt::assert!(temp < 60.0);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+fn convert_to_celsius(raw_temp: u16) -> f32 {
+    // According to chapter 4.9.5. Temperature Sensor in RP2040 datasheet
+    27.0 - (raw_temp as f32 * 3.3 / 4096.0 - 0.706) / 0.001721 as f32
+}
diff --git a/tests/rp/src/bin/cyw43-perf.rs b/tests/rp/src/bin/cyw43-perf.rs
new file mode 100644
index 000000000..bc127e2e5
--- /dev/null
+++ b/tests/rp/src/bin/cyw43-perf.rs
@@ -0,0 +1,264 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use cyw43_pio::PioSpi;
+use defmt::{assert, panic, *};
+use embassy_executor::Spawner;
+use embassy_futures::join::join;
+use embassy_net::tcp::TcpSocket;
+use embassy_net::{Config, Ipv4Address, Stack, StackResources};
+use embassy_rp::gpio::{Level, Output};
+use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25, PIO0};
+use embassy_rp::pio::{InterruptHandler, Pio};
+use embassy_rp::{bind_interrupts, rom_data};
+use embassy_time::{with_timeout, Duration, Timer};
+use static_cell::make_static;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    PIO0_IRQ_0 => InterruptHandler<PIO0>;
+});
+
+teleprobe_meta::timeout!(120);
+
+#[embassy_executor::task]
+async fn wifi_task(
+    runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>,
+) -> ! {
+    runner.run().await
+}
+
+#[embassy_executor::task]
+async fn net_task(stack: &'static Stack<cyw43::NetDriver<'static>>) -> ! {
+    stack.run().await
+}
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    info!("Hello World!");
+    let p = embassy_rp::init(Default::default());
+
+    // needed for reading the firmware from flash via XIP.
+    unsafe {
+        rom_data::flash_exit_xip();
+        rom_data::flash_enter_cmd_xip();
+    }
+
+    // cyw43 firmware needs to be flashed manually:
+    //     probe-rs download 43439A0.bin     --format bin --chip RP2040 --base-address 0x101c0000
+    //     probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000
+    let fw = unsafe { core::slice::from_raw_parts(0x101c0000 as *const u8, 224190) };
+    let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) };
+
+    let pwr = Output::new(p.PIN_23, Level::Low);
+    let cs = Output::new(p.PIN_25, Level::High);
+    let mut pio = Pio::new(p.PIO0, Irqs);
+    let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0);
+
+    let state = make_static!(cyw43::State::new());
+    let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await;
+    unwrap!(spawner.spawn(wifi_task(runner)));
+
+    control.init(clm).await;
+    control
+        .set_power_management(cyw43::PowerManagementMode::PowerSave)
+        .await;
+
+    // Generate random seed
+    let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random.
+
+    // Init network stack
+    let stack = &*make_static!(Stack::new(
+        net_device,
+        Config::dhcpv4(Default::default()),
+        make_static!(StackResources::<2>::new()),
+        seed
+    ));
+
+    unwrap!(spawner.spawn(net_task(stack)));
+
+    loop {
+        match control.join_wpa2(WIFI_NETWORK, WIFI_PASSWORD).await {
+            Ok(_) => break,
+            Err(err) => {
+                panic!("join failed with status={}", err.status);
+            }
+        }
+    }
+
+    info!("Waiting for DHCP up...");
+    while stack.config_v4().is_none() {
+        Timer::after(Duration::from_millis(100)).await;
+    }
+    info!("IP addressing up!");
+
+    let down = test_download(stack).await;
+    let up = test_upload(stack).await;
+    let updown = test_upload_download(stack).await;
+
+    assert!(down > TEST_EXPECTED_DOWNLOAD_KBPS);
+    assert!(up > TEST_EXPECTED_UPLOAD_KBPS);
+    assert!(updown > TEST_EXPECTED_UPLOAD_DOWNLOAD_KBPS);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+// Test-only wifi network, no internet access!
+const WIFI_NETWORK: &str = "EmbassyTest";
+const WIFI_PASSWORD: &str = "V8YxhKt5CdIAJFud";
+
+const TEST_DURATION: usize = 10;
+const TEST_EXPECTED_DOWNLOAD_KBPS: usize = 300;
+const TEST_EXPECTED_UPLOAD_KBPS: usize = 300;
+const TEST_EXPECTED_UPLOAD_DOWNLOAD_KBPS: usize = 300;
+const RX_BUFFER_SIZE: usize = 4096;
+const TX_BUFFER_SIZE: usize = 4096;
+const SERVER_ADDRESS: Ipv4Address = Ipv4Address::new(192, 168, 2, 2);
+const DOWNLOAD_PORT: u16 = 4321;
+const UPLOAD_PORT: u16 = 4322;
+const UPLOAD_DOWNLOAD_PORT: u16 = 4323;
+
+async fn test_download(stack: &'static Stack<cyw43::NetDriver<'static>>) -> usize {
+    info!("Testing download...");
+
+    let mut rx_buffer = [0; RX_BUFFER_SIZE];
+    let mut tx_buffer = [0; TX_BUFFER_SIZE];
+    let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
+    socket.set_timeout(Some(Duration::from_secs(10)));
+
+    info!("connecting to {:?}:{}...", SERVER_ADDRESS, DOWNLOAD_PORT);
+    if let Err(e) = socket.connect((SERVER_ADDRESS, DOWNLOAD_PORT)).await {
+        error!("connect error: {:?}", e);
+        return 0;
+    }
+    info!("connected, testing...");
+
+    let mut rx_buf = [0; 4096];
+    let mut total: usize = 0;
+    with_timeout(Duration::from_secs(TEST_DURATION as _), async {
+        loop {
+            match socket.read(&mut rx_buf).await {
+                Ok(0) => {
+                    error!("read EOF");
+                    return 0;
+                }
+                Ok(n) => total += n,
+                Err(e) => {
+                    error!("read error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    })
+    .await
+    .ok();
+
+    let kbps = (total + 512) / 1024 / TEST_DURATION;
+    info!("download: {} kB/s", kbps);
+    kbps
+}
+
+async fn test_upload(stack: &'static Stack<cyw43::NetDriver<'static>>) -> usize {
+    info!("Testing upload...");
+
+    let mut rx_buffer = [0; RX_BUFFER_SIZE];
+    let mut tx_buffer = [0; TX_BUFFER_SIZE];
+    let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
+    socket.set_timeout(Some(Duration::from_secs(10)));
+
+    info!("connecting to {:?}:{}...", SERVER_ADDRESS, UPLOAD_PORT);
+    if let Err(e) = socket.connect((SERVER_ADDRESS, UPLOAD_PORT)).await {
+        error!("connect error: {:?}", e);
+        return 0;
+    }
+    info!("connected, testing...");
+
+    let buf = [0; 4096];
+    let mut total: usize = 0;
+    with_timeout(Duration::from_secs(TEST_DURATION as _), async {
+        loop {
+            match socket.write(&buf).await {
+                Ok(0) => {
+                    error!("write zero?!??!?!");
+                    return 0;
+                }
+                Ok(n) => total += n,
+                Err(e) => {
+                    error!("write error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    })
+    .await
+    .ok();
+
+    let kbps = (total + 512) / 1024 / TEST_DURATION;
+    info!("upload: {} kB/s", kbps);
+    kbps
+}
+
+async fn test_upload_download(stack: &'static Stack<cyw43::NetDriver<'static>>) -> usize {
+    info!("Testing upload+download...");
+
+    let mut rx_buffer = [0; RX_BUFFER_SIZE];
+    let mut tx_buffer = [0; TX_BUFFER_SIZE];
+    let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
+    socket.set_timeout(Some(Duration::from_secs(10)));
+
+    info!("connecting to {:?}:{}...", SERVER_ADDRESS, UPLOAD_DOWNLOAD_PORT);
+    if let Err(e) = socket.connect((SERVER_ADDRESS, UPLOAD_DOWNLOAD_PORT)).await {
+        error!("connect error: {:?}", e);
+        return 0;
+    }
+    info!("connected, testing...");
+
+    let (mut reader, mut writer) = socket.split();
+
+    let tx_buf = [0; 4096];
+    let mut rx_buf = [0; 4096];
+    let mut total: usize = 0;
+    let tx_fut = async {
+        loop {
+            match writer.write(&tx_buf).await {
+                Ok(0) => {
+                    error!("write zero?!??!?!");
+                    return 0;
+                }
+                Ok(_) => {}
+                Err(e) => {
+                    error!("write error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    };
+
+    let rx_fut = async {
+        loop {
+            match reader.read(&mut rx_buf).await {
+                Ok(0) => {
+                    error!("read EOF");
+                    return 0;
+                }
+                Ok(n) => total += n,
+                Err(e) => {
+                    error!("read error: {:?}", e);
+                    return 0;
+                }
+            }
+        }
+    };
+
+    with_timeout(Duration::from_secs(TEST_DURATION as _), join(tx_fut, rx_fut))
+        .await
+        .ok();
+
+    let kbps = (total + 512) / 1024 / TEST_DURATION;
+    info!("upload+download: {} kB/s", kbps);
+    kbps
+}
diff --git a/tests/rp/src/bin/dma_copy_async.rs b/tests/rp/src/bin/dma_copy_async.rs
new file mode 100644
index 000000000..2c0b559a9
--- /dev/null
+++ b/tests/rp/src/bin/dma_copy_async.rs
@@ -0,0 +1,43 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::dma::copy;
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    // Check `u8` copy
+    {
+        let data: [u8; 2] = [0xC0, 0xDE];
+        let mut buf = [0; 2];
+        unsafe { copy(p.DMA_CH0, &data, &mut buf).await };
+        assert_eq!(buf, data);
+    }
+
+    // Check `u16` copy
+    {
+        let data: [u16; 2] = [0xC0BE, 0xDEAD];
+        let mut buf = [0; 2];
+        unsafe { copy(p.DMA_CH1, &data, &mut buf).await };
+        assert_eq!(buf, data);
+    }
+
+    // Check `u32` copy
+    {
+        let data: [u32; 2] = [0xC0BEDEAD, 0xDEADAAFF];
+        let mut buf = [0; 2];
+        unsafe { copy(p.DMA_CH2, &data, &mut buf).await };
+        assert_eq!(buf, data);
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/flash.rs b/tests/rp/src/bin/flash.rs
new file mode 100644
index 000000000..cf9b86df5
--- /dev/null
+++ b/tests/rp/src/bin/flash.rs
@@ -0,0 +1,65 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_rp::flash::{ERASE_SIZE, FLASH_BASE};
+use embassy_time::{Duration, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+const ADDR_OFFSET: u32 = 0x4000;
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    // add some delay to give an attached debug probe time to parse the
+    // defmt RTT header. Reading that header might touch flash memory, which
+    // interferes with flash write operations.
+    // https://github.com/knurling-rs/defmt/pull/683
+    Timer::after(Duration::from_millis(10)).await;
+
+    let mut flash = embassy_rp::flash::Flash::<_, { 2 * 1024 * 1024 }>::new(p.FLASH);
+
+    // Get JEDEC id
+    let jedec = defmt::unwrap!(flash.jedec_id());
+    info!("jedec id: 0x{:x}", jedec);
+
+    // Get unique id
+    let mut uid = [0; 8];
+    defmt::unwrap!(flash.unique_id(&mut uid));
+    info!("unique id: {:?}", uid);
+
+    let mut buf = [0u8; ERASE_SIZE];
+    defmt::unwrap!(flash.read(ADDR_OFFSET, &mut buf));
+
+    info!("Addr of flash block is {:x}", ADDR_OFFSET + FLASH_BASE as u32);
+    info!("Contents start with {=[u8]}", buf[0..4]);
+
+    defmt::unwrap!(flash.erase(ADDR_OFFSET, ADDR_OFFSET + ERASE_SIZE as u32));
+
+    defmt::unwrap!(flash.read(ADDR_OFFSET, &mut buf));
+    info!("Contents after erase starts with {=[u8]}", buf[0..4]);
+    if buf.iter().any(|x| *x != 0xFF) {
+        defmt::panic!("unexpected");
+    }
+
+    for b in buf.iter_mut() {
+        *b = 0xDA;
+    }
+
+    defmt::unwrap!(flash.write(ADDR_OFFSET, &mut buf));
+
+    defmt::unwrap!(flash.read(ADDR_OFFSET, &mut buf));
+    info!("Contents after write starts with {=[u8]}", buf[0..4]);
+    if buf.iter().any(|x| *x != 0xDA) {
+        defmt::panic!("unexpected");
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/float.rs b/tests/rp/src/bin/float.rs
new file mode 100644
index 000000000..0e0de85fa
--- /dev/null
+++ b/tests/rp/src/bin/float.rs
@@ -0,0 +1,53 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_rp::pac;
+use embassy_time::{Duration, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    const PI_F: f32 = 3.1415926535f32;
+    const PI_D: f64 = 3.14159265358979323846f64;
+
+    pac::BUSCTRL
+        .perfsel(0)
+        .write(|r| r.set_perfsel(pac::busctrl::vals::Perfsel::ROM));
+
+    for i in 0..=360 {
+        let rad_f = (i as f32) * PI_F / 180.0;
+        info!(
+            "{}° float: {=f32} / {=f32} / {=f32} / {=f32}",
+            i,
+            rad_f,
+            rad_f - PI_F,
+            rad_f + PI_F,
+            rad_f % PI_F
+        );
+        let rad_d = (i as f64) * PI_D / 180.0;
+        info!(
+            "{}° double: {=f64} / {=f64} / {=f64} / {=f64}",
+            i,
+            rad_d,
+            rad_d - PI_D,
+            rad_d + PI_D,
+            rad_d % PI_D
+        );
+        Timer::after(Duration::from_millis(10)).await;
+    }
+
+    let rom_accesses = pac::BUSCTRL.perfctr(0).read().perfctr();
+    // every float operation used here uses at least 10 cycles
+    defmt::assert!(rom_accesses >= 360 * 12 * 10);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/gpio.rs b/tests/rp/src/bin/gpio.rs
index af22fe27d..946b7dc88 100644
--- a/tests/rp/src/bin/gpio.rs
+++ b/tests/rp/src/bin/gpio.rs
@@ -1,6 +1,8 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
 use defmt::{assert, *};
 use embassy_executor::Spawner;
@@ -19,14 +21,46 @@ async fn main(_spawner: Spawner) {
         let b = Input::new(&mut b, Pull::None);
 
         {
-            let _a = Output::new(&mut a, Level::Low);
+            let a = Output::new(&mut a, Level::Low);
             delay();
             assert!(b.is_low());
+            assert!(!b.is_high());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
         }
         {
-            let _a = Output::new(&mut a, Level::High);
+            let mut a = Output::new(&mut a, Level::High);
             delay();
+            assert!(!b.is_low());
             assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
+
+            // Test is_set_low / is_set_high
+            a.set_low();
+            delay();
+            assert!(b.is_low());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
+
+            a.set_high();
+            delay();
+            assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
+
+            // Test toggle
+            a.toggle();
+            delay();
+            assert!(b.is_low());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
+
+            a.toggle();
+            delay();
+            assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
         }
     }
 
@@ -78,6 +112,7 @@ async fn main(_spawner: Spawner) {
         a.set_as_input();
 
         // When an OutputOpenDrain is high, it doesn't drive the pin.
+        b.set_high();
         a.set_pull(Pull::Up);
         delay();
         assert!(a.is_high());
@@ -85,9 +120,8 @@ async fn main(_spawner: Spawner) {
         delay();
         assert!(a.is_low());
 
-        b.set_low();
-
         // When an OutputOpenDrain is low, it drives the pin low.
+        b.set_low();
         a.set_pull(Pull::Up);
         delay();
         assert!(a.is_low());
@@ -95,14 +129,36 @@ async fn main(_spawner: Spawner) {
         delay();
         assert!(a.is_low());
 
+        // Check high again
         b.set_high();
-
         a.set_pull(Pull::Up);
         delay();
         assert!(a.is_high());
         a.set_pull(Pull::Down);
         delay();
         assert!(a.is_low());
+
+        // When an OutputOpenDrain is high, it reads the input value in the pin.
+        b.set_high();
+        a.set_as_input();
+        a.set_pull(Pull::Up);
+        delay();
+        assert!(b.is_high());
+        a.set_as_output();
+        a.set_low();
+        delay();
+        assert!(b.is_low());
+
+        // When an OutputOpenDrain is low, it always reads low.
+        b.set_low();
+        a.set_as_input();
+        a.set_pull(Pull::Up);
+        delay();
+        assert!(b.is_low());
+        a.set_as_output();
+        a.set_low();
+        delay();
+        assert!(b.is_low());
     }
 
     // FLEX
diff --git a/tests/rp/src/bin/gpio_async.rs b/tests/rp/src/bin/gpio_async.rs
index 1eeaac1f6..532494de5 100644
--- a/tests/rp/src/bin/gpio_async.rs
+++ b/tests/rp/src/bin/gpio_async.rs
@@ -1,12 +1,14 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
 use defmt::{assert, *};
 use embassy_executor::Spawner;
+use embassy_futures::join::join;
 use embassy_rp::gpio::{Input, Level, Output, Pull};
 use embassy_time::{Duration, Instant, Timer};
-use futures::future::join;
 use {defmt_rtt as _, panic_probe as _};
 
 #[embassy_executor::main]
diff --git a/tests/rp/src/bin/gpio_multicore.rs b/tests/rp/src/bin/gpio_multicore.rs
new file mode 100644
index 000000000..780112bc1
--- /dev/null
+++ b/tests/rp/src/bin/gpio_multicore.rs
@@ -0,0 +1,65 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{info, unwrap};
+use embassy_executor::Executor;
+use embassy_executor::_export::StaticCell;
+use embassy_rp::gpio::{Input, Level, Output, Pull};
+use embassy_rp::multicore::{spawn_core1, Stack};
+use embassy_rp::peripherals::{PIN_0, PIN_1};
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
+use embassy_sync::channel::Channel;
+use {defmt_rtt as _, panic_probe as _};
+
+static mut CORE1_STACK: Stack<1024> = Stack::new();
+static EXECUTOR0: StaticCell<Executor> = StaticCell::new();
+static EXECUTOR1: StaticCell<Executor> = StaticCell::new();
+static CHANNEL0: Channel<CriticalSectionRawMutex, (), 1> = Channel::new();
+static CHANNEL1: Channel<CriticalSectionRawMutex, (), 1> = Channel::new();
+
+#[cortex_m_rt::entry]
+fn main() -> ! {
+    let p = embassy_rp::init(Default::default());
+    spawn_core1(p.CORE1, unsafe { &mut CORE1_STACK }, move || {
+        let executor1 = EXECUTOR1.init(Executor::new());
+        executor1.run(|spawner| unwrap!(spawner.spawn(core1_task(p.PIN_1))));
+    });
+    let executor0 = EXECUTOR0.init(Executor::new());
+    executor0.run(|spawner| unwrap!(spawner.spawn(core0_task(p.PIN_0))));
+}
+
+#[embassy_executor::task]
+async fn core0_task(p: PIN_0) {
+    info!("CORE0 is running");
+
+    let mut pin = Output::new(p, Level::Low);
+
+    CHANNEL0.send(()).await;
+    CHANNEL1.recv().await;
+
+    pin.set_high();
+
+    CHANNEL1.recv().await;
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+#[embassy_executor::task]
+async fn core1_task(p: PIN_1) {
+    info!("CORE1 is running");
+
+    CHANNEL0.recv().await;
+
+    let mut pin = Input::new(p, Pull::Down);
+    let wait = pin.wait_for_rising_edge();
+
+    CHANNEL1.send(()).await;
+
+    wait.await;
+
+    CHANNEL1.send(()).await;
+}
diff --git a/tests/rp/src/bin/multicore.rs b/tests/rp/src/bin/multicore.rs
new file mode 100644
index 000000000..114889dec
--- /dev/null
+++ b/tests/rp/src/bin/multicore.rs
@@ -0,0 +1,49 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{info, unwrap};
+use embassy_executor::Executor;
+use embassy_executor::_export::StaticCell;
+use embassy_rp::multicore::{spawn_core1, Stack};
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
+use embassy_sync::channel::Channel;
+use {defmt_rtt as _, panic_probe as _};
+
+static mut CORE1_STACK: Stack<1024> = Stack::new();
+static EXECUTOR0: StaticCell<Executor> = StaticCell::new();
+static EXECUTOR1: StaticCell<Executor> = StaticCell::new();
+static CHANNEL0: Channel<CriticalSectionRawMutex, bool, 1> = Channel::new();
+static CHANNEL1: Channel<CriticalSectionRawMutex, bool, 1> = Channel::new();
+
+#[cortex_m_rt::entry]
+fn main() -> ! {
+    let p = embassy_rp::init(Default::default());
+    spawn_core1(p.CORE1, unsafe { &mut CORE1_STACK }, move || {
+        let executor1 = EXECUTOR1.init(Executor::new());
+        executor1.run(|spawner| unwrap!(spawner.spawn(core1_task())));
+    });
+    let executor0 = EXECUTOR0.init(Executor::new());
+    executor0.run(|spawner| unwrap!(spawner.spawn(core0_task())));
+}
+
+#[embassy_executor::task]
+async fn core0_task() {
+    info!("CORE0 is running");
+    let ping = true;
+    CHANNEL0.send(ping).await;
+    let pong = CHANNEL1.recv().await;
+    assert_eq!(ping, pong);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+#[embassy_executor::task]
+async fn core1_task() {
+    info!("CORE1 is running");
+    let ping = CHANNEL0.recv().await;
+    CHANNEL1.send(ping).await;
+}
diff --git a/tests/rp/src/bin/pio_irq.rs b/tests/rp/src/bin/pio_irq.rs
new file mode 100644
index 000000000..45004424a
--- /dev/null
+++ b/tests/rp/src/bin/pio_irq.rs
@@ -0,0 +1,55 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_rp::bind_interrupts;
+use embassy_rp::peripherals::PIO0;
+use embassy_rp::pio::{Config, InterruptHandler, Pio};
+use embassy_rp::relocate::RelocatedProgram;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    PIO0_IRQ_0 => InterruptHandler<PIO0>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    let pio = p.PIO0;
+    let Pio {
+        mut common,
+        sm0: mut sm,
+        irq_flags,
+        ..
+    } = Pio::new(pio, Irqs);
+
+    let prg = pio_proc::pio_asm!(
+        "irq set 0",
+        "irq wait 0",
+        "irq set 1",
+        // pause execution here
+        "irq wait 1",
+    );
+
+    let relocated = RelocatedProgram::new(&prg.program);
+    let mut cfg = Config::default();
+    cfg.use_program(&common.load_program(&relocated), &[]);
+    sm.set_config(&cfg);
+    sm.set_enable(true);
+
+    // not using the wait futures on purpose because they clear the irq bits,
+    // and we want to see in which order they are set.
+    while !irq_flags.check(0) {}
+    cortex_m::asm::nop();
+    assert!(!irq_flags.check(1));
+    irq_flags.clear(0);
+    cortex_m::asm::nop();
+    assert!(irq_flags.check(1));
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/pwm.rs b/tests/rp/src/bin/pwm.rs
new file mode 100644
index 000000000..c71d21ef9
--- /dev/null
+++ b/tests/rp/src/bin/pwm.rs
@@ -0,0 +1,144 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert, assert_eq, assert_ne, *};
+use embassy_executor::Spawner;
+use embassy_rp::gpio::{Input, Level, Output, Pull};
+use embassy_rp::pwm::{Config, InputMode, Pwm};
+use embassy_time::{Duration, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    // Connections on CI device: 6 -> 9, 7 -> 11
+    let (mut p6, mut p7, mut p9, mut p11) = (p.PIN_6, p.PIN_7, p.PIN_9, p.PIN_11);
+
+    let cfg = {
+        let mut c = Config::default();
+        c.divider = 125.into();
+        c.top = 10000;
+        c.compare_a = 5000;
+        c.compare_b = 5000;
+        c
+    };
+
+    // Test free-running clock
+    {
+        let pwm = Pwm::new_free(&mut p.PWM_CH3, cfg.clone());
+        cortex_m::asm::delay(125);
+        let ctr = pwm.counter();
+        assert!(ctr > 0);
+        assert!(ctr < 100);
+        cortex_m::asm::delay(125);
+        assert!(ctr < pwm.counter());
+    }
+
+    for invert_a in [false, true] {
+        info!("free-running, invert A: {}", invert_a);
+        let mut cfg = cfg.clone();
+        cfg.invert_a = invert_a;
+        cfg.invert_b = !invert_a;
+
+        // Test output from A
+        {
+            let pin1 = Input::new(&mut p9, Pull::None);
+            let _pwm = Pwm::new_output_a(&mut p.PWM_CH3, &mut p6, cfg.clone());
+            Timer::after(Duration::from_millis(1)).await;
+            assert_eq!(pin1.is_low(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_eq!(pin1.is_high(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_eq!(pin1.is_low(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_eq!(pin1.is_high(), invert_a);
+        }
+
+        // Test output from B
+        {
+            let pin2 = Input::new(&mut p11, Pull::None);
+            let _pwm = Pwm::new_output_b(&mut p.PWM_CH3, &mut p7, cfg.clone());
+            Timer::after(Duration::from_millis(1)).await;
+            assert_ne!(pin2.is_low(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_ne!(pin2.is_high(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_ne!(pin2.is_low(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_ne!(pin2.is_high(), invert_a);
+        }
+
+        // Test output from A+B
+        {
+            let pin1 = Input::new(&mut p9, Pull::None);
+            let pin2 = Input::new(&mut p11, Pull::None);
+            let _pwm = Pwm::new_output_ab(&mut p.PWM_CH3, &mut p6, &mut p7, cfg.clone());
+            Timer::after(Duration::from_millis(1)).await;
+            assert_eq!(pin1.is_low(), invert_a);
+            assert_ne!(pin2.is_low(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_eq!(pin1.is_high(), invert_a);
+            assert_ne!(pin2.is_high(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_eq!(pin1.is_low(), invert_a);
+            assert_ne!(pin2.is_low(), invert_a);
+            Timer::after(Duration::from_millis(5)).await;
+            assert_eq!(pin1.is_high(), invert_a);
+            assert_ne!(pin2.is_high(), invert_a);
+        }
+    }
+
+    // Test level-gated
+    {
+        let mut pin2 = Output::new(&mut p11, Level::Low);
+        let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::Level, cfg.clone());
+        assert_eq!(pwm.counter(), 0);
+        Timer::after(Duration::from_millis(5)).await;
+        assert_eq!(pwm.counter(), 0);
+        pin2.set_high();
+        Timer::after(Duration::from_millis(1)).await;
+        pin2.set_low();
+        let ctr = pwm.counter();
+        assert!(ctr >= 1000);
+        Timer::after(Duration::from_millis(1)).await;
+        assert_eq!(pwm.counter(), ctr);
+    }
+
+    // Test rising-gated
+    {
+        let mut pin2 = Output::new(&mut p11, Level::Low);
+        let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::RisingEdge, cfg.clone());
+        assert_eq!(pwm.counter(), 0);
+        Timer::after(Duration::from_millis(5)).await;
+        assert_eq!(pwm.counter(), 0);
+        pin2.set_high();
+        Timer::after(Duration::from_millis(1)).await;
+        pin2.set_low();
+        assert_eq!(pwm.counter(), 1);
+        Timer::after(Duration::from_millis(1)).await;
+        assert_eq!(pwm.counter(), 1);
+    }
+
+    // Test falling-gated
+    {
+        let mut pin2 = Output::new(&mut p11, Level::High);
+        let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::FallingEdge, cfg.clone());
+        assert_eq!(pwm.counter(), 0);
+        Timer::after(Duration::from_millis(5)).await;
+        assert_eq!(pwm.counter(), 0);
+        pin2.set_low();
+        Timer::after(Duration::from_millis(1)).await;
+        pin2.set_high();
+        assert_eq!(pwm.counter(), 1);
+        Timer::after(Duration::from_millis(1)).await;
+        assert_eq!(pwm.counter(), 1);
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/spi.rs b/tests/rp/src/bin/spi.rs
new file mode 100644
index 000000000..84dfa5a2c
--- /dev/null
+++ b/tests/rp/src/bin/spi.rs
@@ -0,0 +1,30 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::spi::{Config, Spi};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let clk = p.PIN_2;
+    let mosi = p.PIN_3;
+    let miso = p.PIN_4;
+
+    let mut spi = Spi::new_blocking(p.SPI0, clk, mosi, miso, Config::default());
+
+    let tx_buf = [1_u8, 2, 3, 4, 5, 6];
+    let mut rx_buf = [0_u8; 6];
+    spi.blocking_transfer(&mut rx_buf, &tx_buf).unwrap();
+    assert_eq!(rx_buf, tx_buf);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/spi_async.rs b/tests/rp/src/bin/spi_async.rs
new file mode 100644
index 000000000..a4080b03d
--- /dev/null
+++ b/tests/rp/src/bin/spi_async.rs
@@ -0,0 +1,86 @@
+//! Make sure to connect GPIO pins 3 (`PIN_3`) and 4 (`PIN_4`) together
+//! to run this test.
+//!
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::spi::{Config, Spi};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let clk = p.PIN_2;
+    let mosi = p.PIN_3;
+    let miso = p.PIN_4;
+
+    let mut spi = Spi::new(p.SPI0, clk, mosi, miso, p.DMA_CH0, p.DMA_CH1, Config::default());
+
+    // equal rx & tx buffers
+    {
+        let tx_buf = [1_u8, 2, 3, 4, 5, 6];
+        let mut rx_buf = [0_u8; 6];
+        spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
+        assert_eq!(rx_buf, tx_buf);
+    }
+
+    // tx > rx buffer
+    {
+        let tx_buf = [7_u8, 8, 9, 10, 11, 12];
+
+        let mut rx_buf = [0_u8; 3];
+        spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
+        assert_eq!(rx_buf, tx_buf[..3]);
+
+        defmt::info!("tx > rx buffer - OK");
+    }
+
+    // we make sure to that clearing FIFO works after the uneven buffers
+
+    // equal rx & tx buffers
+    {
+        let tx_buf = [13_u8, 14, 15, 16, 17, 18];
+        let mut rx_buf = [0_u8; 6];
+        spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
+        assert_eq!(rx_buf, tx_buf);
+
+        defmt::info!("buffer rx length == tx length - OK");
+    }
+
+    // rx > tx buffer
+    {
+        let tx_buf = [19_u8, 20, 21];
+        let mut rx_buf = [0_u8; 6];
+
+        // we should have written dummy data to tx buffer to sync clock.
+        spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
+
+        assert_eq!(
+            rx_buf[..3],
+            tx_buf,
+            "only the first 3 TX bytes should have been received in the RX buffer"
+        );
+        assert_eq!(rx_buf[3..], [0, 0, 0], "the rest of the RX bytes should be empty");
+        defmt::info!("buffer rx length > tx length - OK");
+    }
+
+    // equal rx & tx buffers
+    {
+        let tx_buf = [22_u8, 23, 24, 25, 26, 27];
+        let mut rx_buf = [0_u8; 6];
+        spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
+
+        assert_eq!(rx_buf, tx_buf);
+        defmt::info!("buffer rx length = tx length - OK");
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/uart.rs b/tests/rp/src/bin/uart.rs
new file mode 100644
index 000000000..2331c7d36
--- /dev/null
+++ b/tests/rp/src/bin/uart.rs
@@ -0,0 +1,171 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::gpio::{Level, Output};
+use embassy_rp::uart::{Blocking, Config, Error, Instance, Parity, Uart, UartRx};
+use embassy_time::{Duration, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+fn read<const N: usize>(uart: &mut Uart<'_, impl Instance, Blocking>) -> Result<[u8; N], Error> {
+    let mut buf = [255; N];
+    uart.blocking_read(&mut buf)?;
+    Ok(buf)
+}
+
+fn read1<const N: usize>(uart: &mut UartRx<'_, impl Instance, Blocking>) -> Result<[u8; N], Error> {
+    let mut buf = [255; N];
+    uart.blocking_read(&mut buf)?;
+    Ok(buf)
+}
+
+async fn send(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: Option<bool>) {
+    pin.set_low();
+    Timer::after(Duration::from_millis(1)).await;
+    for i in 0..8 {
+        if v & (1 << i) == 0 {
+            pin.set_low();
+        } else {
+            pin.set_high();
+        }
+        Timer::after(Duration::from_millis(1)).await;
+    }
+    if let Some(b) = parity {
+        if b {
+            pin.set_high();
+        } else {
+            pin.set_low();
+        }
+        Timer::after(Duration::from_millis(1)).await;
+    }
+    pin.set_high();
+    Timer::after(Duration::from_millis(1)).await;
+}
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let (mut tx, mut rx, mut uart) = (p.PIN_0, p.PIN_1, p.UART0);
+
+    {
+        let config = Config::default();
+        let mut uart = Uart::new_blocking(&mut uart, &mut tx, &mut rx, config);
+
+        // We can't send too many bytes, they have to fit in the FIFO.
+        // This is because we aren't sending+receiving at the same time.
+
+        let data = [0xC0, 0xDE];
+        uart.blocking_write(&data).unwrap();
+        assert_eq!(read(&mut uart).unwrap(), data);
+    }
+
+    info!("test overflow detection");
+    {
+        let config = Config::default();
+        let mut uart = Uart::new_blocking(&mut uart, &mut tx, &mut rx, config);
+
+        let data = [
+            1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
+            30, 31, 32,
+        ];
+        let overflow = [
+            101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116,
+        ];
+        uart.blocking_write(&data).unwrap();
+        uart.blocking_write(&overflow).unwrap();
+        while uart.busy() {}
+
+        // prefix in fifo is valid
+        assert_eq!(read(&mut uart).unwrap(), data);
+        // next received character causes overrun error and is discarded
+        uart.blocking_write(&[1, 2, 3]).unwrap();
+        assert_eq!(read::<1>(&mut uart).unwrap_err(), Error::Overrun);
+        assert_eq!(read(&mut uart).unwrap(), [2, 3]);
+    }
+
+    info!("test break detection");
+    {
+        let config = Config::default();
+        let mut uart = Uart::new_blocking(&mut uart, &mut tx, &mut rx, config);
+
+        // break on empty fifo
+        uart.send_break(20).await;
+        uart.blocking_write(&[64]).unwrap();
+        assert_eq!(read::<1>(&mut uart).unwrap_err(), Error::Break);
+        assert_eq!(read(&mut uart).unwrap(), [64]);
+
+        // break on partially filled fifo
+        uart.blocking_write(&[65; 2]).unwrap();
+        uart.send_break(20).await;
+        uart.blocking_write(&[66]).unwrap();
+        assert_eq!(read(&mut uart).unwrap(), [65; 2]);
+        assert_eq!(read::<1>(&mut uart).unwrap_err(), Error::Break);
+        assert_eq!(read(&mut uart).unwrap(), [66]);
+    }
+
+    // parity detection. here we bitbang to not require two uarts.
+    info!("test parity error detection");
+    {
+        let mut pin = Output::new(&mut tx, Level::High);
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        config.parity = Parity::ParityEven;
+        let mut uart = UartRx::new_blocking(&mut uart, &mut rx, config);
+
+        async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: u8) {
+            send(pin, v, Some(parity != 0)).await;
+        }
+
+        // first check that we can send correctly
+        chr(&mut pin, 64, 1).await;
+        assert_eq!(read1(&mut uart).unwrap(), [64]);
+
+        // all good, check real errors
+        chr(&mut pin, 2, 1).await;
+        chr(&mut pin, 3, 0).await;
+        chr(&mut pin, 4, 0).await;
+        chr(&mut pin, 5, 0).await;
+        assert_eq!(read1(&mut uart).unwrap(), [2, 3]);
+        assert_eq!(read1::<1>(&mut uart).unwrap_err(), Error::Parity);
+        assert_eq!(read1(&mut uart).unwrap(), [5]);
+    }
+
+    // framing error detection. here we bitbang because there's no other way.
+    info!("test framing error detection");
+    {
+        let mut pin = Output::new(&mut tx, Level::High);
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        let mut uart = UartRx::new_blocking(&mut uart, &mut rx, config);
+
+        async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, good: bool) {
+            if good {
+                send(pin, v, None).await;
+            } else {
+                send(pin, v, Some(false)).await;
+            }
+        }
+
+        // first check that we can send correctly
+        chr(&mut pin, 64, true).await;
+        assert_eq!(read1(&mut uart).unwrap(), [64]);
+
+        // all good, check real errors
+        chr(&mut pin, 2, true).await;
+        chr(&mut pin, 3, true).await;
+        chr(&mut pin, 4, false).await;
+        chr(&mut pin, 5, true).await;
+        assert_eq!(read1(&mut uart).unwrap(), [2, 3]);
+        assert_eq!(read1::<1>(&mut uart).unwrap_err(), Error::Framing);
+        assert_eq!(read1(&mut uart).unwrap(), [5]);
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/uart_buffered.rs b/tests/rp/src/bin/uart_buffered.rs
new file mode 100644
index 000000000..e74e9986c
--- /dev/null
+++ b/tests/rp/src/bin/uart_buffered.rs
@@ -0,0 +1,256 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, panic, *};
+use embassy_executor::Spawner;
+use embassy_rp::bind_interrupts;
+use embassy_rp::gpio::{Level, Output};
+use embassy_rp::peripherals::UART0;
+use embassy_rp::uart::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, Config, Error, Instance, Parity};
+use embassy_time::{Duration, Timer};
+use embedded_io::asynch::{Read, ReadExactError, Write};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    UART0_IRQ => BufferedInterruptHandler<UART0>;
+});
+
+async fn read<const N: usize>(uart: &mut BufferedUart<'_, impl Instance>) -> Result<[u8; N], Error> {
+    let mut buf = [255; N];
+    match uart.read_exact(&mut buf).await {
+        Ok(()) => Ok(buf),
+        // we should not ever produce an Eof condition
+        Err(ReadExactError::UnexpectedEof) => panic!(),
+        Err(ReadExactError::Other(e)) => Err(e),
+    }
+}
+
+async fn read1<const N: usize>(uart: &mut BufferedUartRx<'_, impl Instance>) -> Result<[u8; N], Error> {
+    let mut buf = [255; N];
+    match uart.read_exact(&mut buf).await {
+        Ok(()) => Ok(buf),
+        // we should not ever produce an Eof condition
+        Err(ReadExactError::UnexpectedEof) => panic!(),
+        Err(ReadExactError::Other(e)) => Err(e),
+    }
+}
+
+async fn send(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: Option<bool>) {
+    pin.set_low();
+    Timer::after(Duration::from_millis(1)).await;
+    for i in 0..8 {
+        if v & (1 << i) == 0 {
+            pin.set_low();
+        } else {
+            pin.set_high();
+        }
+        Timer::after(Duration::from_millis(1)).await;
+    }
+    if let Some(b) = parity {
+        if b {
+            pin.set_high();
+        } else {
+            pin.set_low();
+        }
+        Timer::after(Duration::from_millis(1)).await;
+    }
+    pin.set_high();
+    Timer::after(Duration::from_millis(1)).await;
+}
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let (mut tx, mut rx, mut uart) = (p.PIN_0, p.PIN_1, p.UART0);
+
+    {
+        let config = Config::default();
+        let tx_buf = &mut [0u8; 16];
+        let rx_buf = &mut [0u8; 16];
+        let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
+
+        // Make sure we send more bytes than fits in the FIFO, to test the actual
+        // bufferedUart.
+
+        let data = [
+            1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
+            30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
+        ];
+        uart.write_all(&data).await.unwrap();
+        info!("Done writing");
+
+        assert_eq!(read(&mut uart).await.unwrap(), data);
+    }
+
+    info!("test overflow detection");
+    {
+        let config = Config::default();
+        let tx_buf = &mut [0u8; 16];
+        let rx_buf = &mut [0u8; 16];
+        let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
+
+        // Make sure we send more bytes than fits in the FIFO, to test the actual
+        // bufferedUart.
+
+        let data = [
+            1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
+            30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
+        ];
+        let overflow = [
+            101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116,
+        ];
+        // give each block time to settle into the fifo. we want the overrun to occur at a well-defined point.
+        uart.write_all(&data).await.unwrap();
+        uart.blocking_flush().unwrap();
+        while uart.busy() {}
+        uart.write_all(&overflow).await.unwrap();
+        uart.blocking_flush().unwrap();
+        while uart.busy() {}
+
+        // already buffered/fifod prefix is valid
+        assert_eq!(read(&mut uart).await.unwrap(), data);
+        // next received character causes overrun error and is discarded
+        uart.write_all(&[1, 2, 3]).await.unwrap();
+        uart.blocking_flush().unwrap();
+        assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Overrun);
+        assert_eq!(read(&mut uart).await.unwrap(), [2, 3]);
+    }
+
+    info!("test break detection");
+    {
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        let tx_buf = &mut [0u8; 16];
+        let rx_buf = &mut [0u8; 16];
+        let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
+
+        // break on empty buffer
+        uart.send_break(20).await;
+        assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Break);
+        uart.write_all(&[64]).await.unwrap();
+        assert_eq!(read(&mut uart).await.unwrap(), [64]);
+
+        // break on partially filled buffer
+        uart.write_all(&[65; 2]).await.unwrap();
+        uart.send_break(20).await;
+        uart.write_all(&[66]).await.unwrap();
+        assert_eq!(read(&mut uart).await.unwrap(), [65; 2]);
+        assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Break);
+        assert_eq!(read(&mut uart).await.unwrap(), [66]);
+
+        // break on full buffer
+        uart.write_all(&[64; 16]).await.unwrap();
+        uart.send_break(20).await;
+        uart.write_all(&[65]).await.unwrap();
+        assert_eq!(read(&mut uart).await.unwrap(), [64; 16]);
+        assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Break);
+        assert_eq!(read(&mut uart).await.unwrap(), [65]);
+    }
+
+    // parity detection. here we bitbang to not require two uarts.
+    info!("test parity error detection");
+    {
+        let mut pin = Output::new(&mut tx, Level::High);
+        // choose a very slow baud rate to make tests reliable even with O0
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        config.parity = Parity::ParityEven;
+        let rx_buf = &mut [0u8; 16];
+        let mut uart = BufferedUartRx::new(&mut uart, Irqs, &mut rx, rx_buf, config);
+
+        async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: u32) {
+            send(pin, v, Some(parity != 0)).await;
+        }
+
+        // first check that we can send correctly
+        chr(&mut pin, 64, 1).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [64]);
+
+        // parity on empty buffer
+        chr(&mut pin, 64, 0).await;
+        chr(&mut pin, 4, 1).await;
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
+        assert_eq!(read1(&mut uart).await.unwrap(), [4]);
+
+        // parity on partially filled buffer
+        chr(&mut pin, 64, 1).await;
+        chr(&mut pin, 32, 1).await;
+        chr(&mut pin, 64, 0).await;
+        chr(&mut pin, 65, 0).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [64, 32]);
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
+        assert_eq!(read1(&mut uart).await.unwrap(), [65]);
+
+        // parity on full buffer
+        for i in 0..16 {
+            chr(&mut pin, i, i.count_ones() % 2).await;
+        }
+        chr(&mut pin, 64, 0).await;
+        chr(&mut pin, 65, 0).await;
+        assert_eq!(
+            read1(&mut uart).await.unwrap(),
+            [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        );
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
+        assert_eq!(read1(&mut uart).await.unwrap(), [65]);
+    }
+
+    // framing error detection. here we bitbang because there's no other way.
+    info!("test framing error detection");
+    {
+        let mut pin = Output::new(&mut tx, Level::High);
+        // choose a very slow baud rate to make tests reliable even with O0
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        let rx_buf = &mut [0u8; 16];
+        let mut uart = BufferedUartRx::new(&mut uart, Irqs, &mut rx, rx_buf, config);
+
+        async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, good: bool) {
+            if good {
+                send(pin, v, None).await;
+            } else {
+                send(pin, v, Some(false)).await;
+            }
+        }
+
+        // first check that we can send correctly
+        chr(&mut pin, 64, true).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [64]);
+
+        // framing on empty buffer
+        chr(&mut pin, 64, false).await;
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
+        chr(&mut pin, 65, true).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [65]);
+
+        // framing on partially filled buffer
+        chr(&mut pin, 64, true).await;
+        chr(&mut pin, 32, true).await;
+        chr(&mut pin, 64, false).await;
+        chr(&mut pin, 65, true).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [64, 32]);
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
+        assert_eq!(read1(&mut uart).await.unwrap(), [65]);
+
+        // framing on full buffer
+        for i in 0..16 {
+            chr(&mut pin, i, true).await;
+        }
+        chr(&mut pin, 64, false).await;
+        chr(&mut pin, 65, true).await;
+        assert_eq!(
+            read1(&mut uart).await.unwrap(),
+            [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        );
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
+        assert_eq!(read1(&mut uart).await.unwrap(), [65]);
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/uart_dma.rs b/tests/rp/src/bin/uart_dma.rs
new file mode 100644
index 000000000..fee6c825d
--- /dev/null
+++ b/tests/rp/src/bin/uart_dma.rs
@@ -0,0 +1,252 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::bind_interrupts;
+use embassy_rp::gpio::{Level, Output};
+use embassy_rp::peripherals::UART0;
+use embassy_rp::uart::{Async, Config, Error, Instance, InterruptHandler, Parity, Uart, UartRx};
+use embassy_time::{Duration, Timer};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    UART0_IRQ => InterruptHandler<UART0>;
+});
+
+async fn read<const N: usize>(uart: &mut Uart<'_, impl Instance, Async>) -> Result<[u8; N], Error> {
+    let mut buf = [255; N];
+    uart.read(&mut buf).await?;
+    Ok(buf)
+}
+
+async fn read1<const N: usize>(uart: &mut UartRx<'_, impl Instance, Async>) -> Result<[u8; N], Error> {
+    let mut buf = [255; N];
+    uart.read(&mut buf).await?;
+    Ok(buf)
+}
+
+async fn send(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: Option<bool>) {
+    pin.set_low();
+    Timer::after(Duration::from_millis(1)).await;
+    for i in 0..8 {
+        if v & (1 << i) == 0 {
+            pin.set_low();
+        } else {
+            pin.set_high();
+        }
+        Timer::after(Duration::from_millis(1)).await;
+    }
+    if let Some(b) = parity {
+        if b {
+            pin.set_high();
+        } else {
+            pin.set_low();
+        }
+        Timer::after(Duration::from_millis(1)).await;
+    }
+    pin.set_high();
+    Timer::after(Duration::from_millis(1)).await;
+}
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let (mut tx, mut rx, mut uart) = (p.PIN_0, p.PIN_1, p.UART0);
+
+    // We can't send too many bytes, they have to fit in the FIFO.
+    // This is because we aren't sending+receiving at the same time.
+    {
+        let config = Config::default();
+        let mut uart = Uart::new(
+            &mut uart,
+            &mut tx,
+            &mut rx,
+            Irqs,
+            &mut p.DMA_CH0,
+            &mut p.DMA_CH1,
+            config,
+        );
+
+        let data = [0xC0, 0xDE];
+        uart.write(&data).await.unwrap();
+
+        let mut buf = [0; 2];
+        uart.read(&mut buf).await.unwrap();
+        assert_eq!(buf, data);
+    }
+
+    info!("test overflow detection");
+    {
+        let config = Config::default();
+        let mut uart = Uart::new(
+            &mut uart,
+            &mut tx,
+            &mut rx,
+            Irqs,
+            &mut p.DMA_CH0,
+            &mut p.DMA_CH1,
+            config,
+        );
+
+        uart.blocking_write(&[42; 32]).unwrap();
+        uart.blocking_write(&[1, 2, 3]).unwrap();
+        uart.blocking_flush().unwrap();
+
+        // can receive regular fifo contents
+        assert_eq!(read(&mut uart).await, Ok([42; 16]));
+        assert_eq!(read(&mut uart).await, Ok([42; 16]));
+        // receiving the rest fails with overrun
+        assert_eq!(read::<16>(&mut uart).await, Err(Error::Overrun));
+        // new data is accepted, latest overrunning byte first
+        assert_eq!(read(&mut uart).await, Ok([3]));
+        uart.blocking_write(&[8, 9]).unwrap();
+        Timer::after(Duration::from_millis(1)).await;
+        assert_eq!(read(&mut uart).await, Ok([8, 9]));
+    }
+
+    info!("test break detection");
+    {
+        let config = Config::default();
+        let (mut tx, mut rx) = Uart::new(
+            &mut uart,
+            &mut tx,
+            &mut rx,
+            Irqs,
+            &mut p.DMA_CH0,
+            &mut p.DMA_CH1,
+            config,
+        )
+        .split();
+
+        // break before read
+        tx.send_break(20).await;
+        tx.write(&[64]).await.unwrap();
+        assert_eq!(read1::<1>(&mut rx).await.unwrap_err(), Error::Break);
+        assert_eq!(read1(&mut rx).await.unwrap(), [64]);
+
+        // break during read
+        {
+            let r = read1::<2>(&mut rx);
+            tx.write(&[2]).await.unwrap();
+            tx.send_break(20).await;
+            tx.write(&[3]).await.unwrap();
+            assert_eq!(r.await.unwrap_err(), Error::Break);
+            assert_eq!(read1(&mut rx).await.unwrap(), [3]);
+        }
+
+        // break after read
+        {
+            let r = read1(&mut rx);
+            tx.write(&[2]).await.unwrap();
+            tx.send_break(20).await;
+            tx.write(&[3]).await.unwrap();
+            assert_eq!(r.await.unwrap(), [2]);
+            assert_eq!(read1::<1>(&mut rx).await.unwrap_err(), Error::Break);
+            assert_eq!(read1(&mut rx).await.unwrap(), [3]);
+        }
+    }
+
+    // parity detection. here we bitbang to not require two uarts.
+    info!("test parity error detection");
+    {
+        let mut pin = Output::new(&mut tx, Level::High);
+        // choose a very slow baud rate to make tests reliable even with O0
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        config.parity = Parity::ParityEven;
+        let mut uart = UartRx::new(&mut uart, &mut rx, Irqs, &mut p.DMA_CH0, config);
+
+        async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: u32) {
+            send(pin, v, Some(parity != 0)).await;
+        }
+
+        // first check that we can send correctly
+        chr(&mut pin, 32, 1).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [32]);
+
+        // parity error before read
+        chr(&mut pin, 32, 0).await;
+        chr(&mut pin, 31, 1).await;
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
+        assert_eq!(read1(&mut uart).await.unwrap(), [31]);
+
+        // parity error during read
+        {
+            let r = read1::<2>(&mut uart);
+            chr(&mut pin, 2, 1).await;
+            chr(&mut pin, 32, 0).await;
+            chr(&mut pin, 3, 0).await;
+            assert_eq!(r.await.unwrap_err(), Error::Parity);
+            assert_eq!(read1(&mut uart).await.unwrap(), [3]);
+        }
+
+        // parity error after read
+        {
+            let r = read1(&mut uart);
+            chr(&mut pin, 2, 1).await;
+            chr(&mut pin, 32, 0).await;
+            chr(&mut pin, 3, 0).await;
+            assert_eq!(r.await.unwrap(), [2]);
+            assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
+            assert_eq!(read1(&mut uart).await.unwrap(), [3]);
+        }
+    }
+
+    // framing error detection. here we bitbang because there's no other way.
+    info!("test framing error detection");
+    {
+        let mut pin = Output::new(&mut tx, Level::High);
+        // choose a very slow baud rate to make tests reliable even with O0
+        let mut config = Config::default();
+        config.baudrate = 1000;
+        let mut uart = UartRx::new(&mut uart, &mut rx, Irqs, &mut p.DMA_CH0, config);
+
+        async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, good: bool) {
+            if good {
+                send(pin, v, None).await;
+            } else {
+                send(pin, v, Some(false)).await;
+            }
+        }
+
+        // first check that we can send correctly
+        chr(&mut pin, 32, true).await;
+        assert_eq!(read1(&mut uart).await.unwrap(), [32]);
+
+        // parity error before read
+        chr(&mut pin, 32, false).await;
+        chr(&mut pin, 31, true).await;
+        assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
+        assert_eq!(read1(&mut uart).await.unwrap(), [31]);
+
+        // parity error during read
+        {
+            let r = read1::<2>(&mut uart);
+            chr(&mut pin, 2, true).await;
+            chr(&mut pin, 32, false).await;
+            chr(&mut pin, 3, true).await;
+            assert_eq!(r.await.unwrap_err(), Error::Framing);
+            assert_eq!(read1(&mut uart).await.unwrap(), [3]);
+        }
+
+        // parity error after read
+        {
+            let r = read1(&mut uart);
+            chr(&mut pin, 2, true).await;
+            chr(&mut pin, 32, false).await;
+            chr(&mut pin, 3, true).await;
+            assert_eq!(r.await.unwrap(), [2]);
+            assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
+            assert_eq!(read1(&mut uart).await.unwrap(), [3]);
+        }
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/uart_upgrade.rs b/tests/rp/src/bin/uart_upgrade.rs
new file mode 100644
index 000000000..760e53954
--- /dev/null
+++ b/tests/rp/src/bin/uart_upgrade.rs
@@ -0,0 +1,60 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::bind_interrupts;
+use embassy_rp::peripherals::UART0;
+use embassy_rp::uart::{BufferedInterruptHandler, Config, Uart};
+use embedded_io::asynch::{Read, Write};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    UART0_IRQ => BufferedInterruptHandler<UART0>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let (tx, rx, uart) = (p.PIN_0, p.PIN_1, p.UART0);
+
+    let config = Config::default();
+    let mut uart = Uart::new_blocking(uart, tx, rx, config);
+
+    // We can't send too many bytes, they have to fit in the FIFO.
+    // This is because we aren't sending+receiving at the same time.
+
+    let data = [0xC0, 0xDE];
+    uart.blocking_write(&data).unwrap();
+
+    let mut buf = [0; 2];
+    uart.blocking_read(&mut buf).unwrap();
+    assert_eq!(buf, data);
+
+    let tx_buf = &mut [0u8; 16];
+    let rx_buf = &mut [0u8; 16];
+
+    let mut uart = uart.into_buffered(Irqs, tx_buf, rx_buf);
+
+    // Make sure we send more bytes than fits in the FIFO, to test the actual
+    // bufferedUart.
+
+    let data = [
+        1u8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
+        30, 31,
+    ];
+    uart.write_all(&data).await.unwrap();
+    info!("Done writing");
+
+    let mut buf = [0; 31];
+    uart.read_exact(&mut buf).await.unwrap();
+    assert_eq!(buf, data);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/common.rs b/tests/rp/src/common.rs
new file mode 100644
index 000000000..955674f27
--- /dev/null
+++ b/tests/rp/src/common.rs
@@ -0,0 +1 @@
+teleprobe_meta::target!(b"rpi-pico");
diff --git a/tests/stm32/.cargo/config.toml b/tests/stm32/.cargo/config.toml
index 29c4799a1..07761b01c 100644
--- a/tests/stm32/.cargo/config.toml
+++ b/tests/stm32/.cargo/config.toml
@@ -3,7 +3,7 @@ build-std = ["core"]
 build-std-features = ["panic_immediate_abort"]
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-runner = "teleprobe client run --target bluepill-stm32f103c8 --elf"
+runner = "teleprobe client run"
 #runner = "teleprobe local run --chip STM32F103C8 --elf"
 
 rustflags = [
@@ -17,4 +17,4 @@ rustflags = [
 target = "thumbv7m-none-eabi"
 
 [env]
-DEFMT_LOG = "trace"
+DEFMT_LOG = "trace"
\ No newline at end of file
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index f1441d00c..3007cd1e6 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -2,31 +2,115 @@
 edition = "2021"
 name = "embassy-stm32-tests"
 version = "0.1.0"
+license = "MIT OR Apache-2.0"
+autobins = false
 
 [features]
-stm32f103c8 = ["embassy-stm32/stm32f103c8"]     # Blue Pill
-stm32f429zi = ["embassy-stm32/stm32f429zi"]     # Nucleo
-stm32g071rb = ["embassy-stm32/stm32g071rb"]     # Nucleo
-stm32g491re = ["embassy-stm32/stm32g491re"]     # Nucleo
-stm32h755zi = ["embassy-stm32/stm32h755zi-cm7"] # Nucleo
-stm32wb55rg = ["embassy-stm32/stm32wb55rg"]     # Nucleo
+stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"]     # Blue Pill
+stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "can", "not-gpdma"]     # Nucleo "sdmmc"
+stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma"]     # Nucleo
+stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"]     # Nucleo
+stm32g491re = ["embassy-stm32/stm32g491re", "not-gpdma"]     # Nucleo
+stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "not-gpdma"] # Nucleo
+stm32wb55rg = ["embassy-stm32/stm32wb55rg", "not-gpdma", "ble", "mac" ]     # Nucleo
+stm32h563zi = ["embassy-stm32/stm32h563zi"]     # Nucleo
 stm32u585ai = ["embassy-stm32/stm32u585ai"]     # IoT board
 
+sdmmc = []
+chrono = ["embassy-stm32/chrono", "dep:chrono"]
+can = []
+ble = ["dep:embassy-stm32-wpan", "embassy-stm32-wpan/ble"]
+mac = ["dep:embassy-stm32-wpan", "embassy-stm32-wpan/mac"]
+embassy-stm32-wpan = []
+not-gpdma = []
+
 [dependencies]
-embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
-embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["defmt", "integrated-timers"] }
-embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "tick-32768hz"] }
-embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "unstable-pac", "memory-x", "time-driver-tim2"]  }
+teleprobe-meta = "1"
+
+embassy-sync = { version = "0.2.0", path = "../../embassy-sync", features = ["defmt"] }
+embassy-executor = { version = "0.2.0", path = "../../embassy-executor", features = ["nightly", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
+embassy-time = { version = "0.1.2", path = "../../embassy-time", features = ["defmt", "tick-hz-32_768", "defmt-timestamp-uptime"] }
+embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "unstable-pac", "memory-x", "time-driver-any"]  }
+embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
+embassy-stm32-wpan = { version = "0.1.0", path = "../../embassy-stm32-wpan", optional = true, features = ["defmt", "stm32wb55rg", "ble"] }
 
 defmt = "0.3.0"
-defmt-rtt = "0.3.0"
+defmt-rtt = "0.4"
 
 cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" }
-embedded-hal-async = { version = "0.1.0-alpha.1" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.11" }
+embedded-hal-async = { version = "=0.2.0-alpha.2" }
 panic-probe = { version = "0.3.0", features = ["print-defmt"] }
+rand_core = { version = "0.6", default-features = false }
+rand_chacha = { version = "0.3", default-features = false }
+
+chrono = { version = "^0.4", default-features = false, optional = true}
+
+# BEGIN TESTS
+# Generated by gen_test.py. DO NOT EDIT.
+[[bin]]
+name = "can"
+path = "src/bin/can.rs"
+required-features = [ "can",]
+
+[[bin]]
+name = "gpio"
+path = "src/bin/gpio.rs"
+required-features = []
+
+[[bin]]
+name = "rtc"
+path = "src/bin/rtc.rs"
+required-features = [ "chrono",]
+
+[[bin]]
+name = "sdmmc"
+path = "src/bin/sdmmc.rs"
+required-features = [ "sdmmc",]
+
+[[bin]]
+name = "spi"
+path = "src/bin/spi.rs"
+required-features = []
+
+[[bin]]
+name = "spi_dma"
+path = "src/bin/spi_dma.rs"
+required-features = []
+
+[[bin]]
+name = "timer"
+path = "src/bin/timer.rs"
+required-features = []
+
+[[bin]]
+name = "usart"
+path = "src/bin/usart.rs"
+required-features = []
+
+[[bin]]
+name = "usart_dma"
+path = "src/bin/usart_dma.rs"
+required-features = []
+
+[[bin]]
+name = "usart_rx_ringbuffered"
+path = "src/bin/usart_rx_ringbuffered.rs"
+required-features = [ "not-gpdma",]
+
+[[bin]]
+name = "wpan_ble"
+path = "src/bin/wpan_ble.rs"
+required-features = [ "ble",]
+
+[[bin]]
+name = "wpan_mac"
+path = "src/bin/wpan_mac.rs"
+required-features = [ "mac",]
+
+# END TESTS
 
 [profile.dev]
 debug = 2
diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs
index 6f4872249..2e71954d7 100644
--- a/tests/stm32/build.rs
+++ b/tests/stm32/build.rs
@@ -6,11 +6,27 @@ fn main() -> Result<(), Box<dyn Error>> {
     let out = PathBuf::from(env::var("OUT_DIR").unwrap());
     fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap();
     println!("cargo:rustc-link-search={}", out.display());
-    println!("cargo:rerun-if-changed=link_ram.x");
-
     println!("cargo:rustc-link-arg-bins=--nmagic");
-    println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
+
+    // too little RAM to run from RAM.
+    if cfg!(any(
+        feature = "stm32f103c8",
+        feature = "stm32c031c6",
+        feature = "stm32wb55rg"
+    )) {
+        println!("cargo:rustc-link-arg-bins=-Tlink.x");
+        println!("cargo:rerun-if-changed=link.x");
+    } else {
+        println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
+        println!("cargo:rerun-if-changed=link_ram.x");
+    }
+
+    if cfg!(feature = "stm32wb55rg") {
+        println!("cargo:rustc-link-arg-bins=-Ttl_mbox.x");
+    }
+
     println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+    println!("cargo:rustc-link-arg-bins=-Tteleprobe.x");
 
     Ok(())
 }
diff --git a/tests/stm32/gen_test.py b/tests/stm32/gen_test.py
new file mode 100644
index 000000000..8ff156c0e
--- /dev/null
+++ b/tests/stm32/gen_test.py
@@ -0,0 +1,44 @@
+import os
+import toml
+from glob import glob
+
+abspath = os.path.abspath(__file__)
+dname = os.path.dirname(abspath)
+os.chdir(dname)
+
+# ======= load test list
+tests = {}
+for f in sorted(glob('./src/bin/*.rs')):
+    name = os.path.splitext(os.path.basename(f))[0]
+    features = []
+    with open(f, 'r') as f:
+        for line in f:
+            if line.startswith('// required-features:'):
+                features = line.split(':', 2)[1].strip().split(',')
+
+    tests[name] = features
+
+# ========= Update Cargo.toml
+
+things = {
+    'bin': [
+        {
+            'name': f'{name}',
+            'path': f'src/bin/{name}.rs',
+            'required-features': features,
+        }
+        for name, features in tests.items()
+    ]
+}
+
+SEPARATOR_START = '# BEGIN TESTS\n'
+SEPARATOR_END = '# END TESTS\n'
+HELP = '# Generated by gen_test.py. DO NOT EDIT.\n'
+with open('Cargo.toml', 'r') as f:
+    data = f.read()
+before, data = data.split(SEPARATOR_START, maxsplit=1)
+_, after = data.split(SEPARATOR_END, maxsplit=1)
+data = before + SEPARATOR_START + HELP + \
+    toml.dumps(things) + SEPARATOR_END + after
+with open('Cargo.toml', 'w') as f:
+    f.write(data)
diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs
new file mode 100644
index 000000000..8bdd3c24f
--- /dev/null
+++ b/tests/stm32/src/bin/can.rs
@@ -0,0 +1,81 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+// required-features: can
+
+#[path = "../common.rs"]
+mod common;
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::can::bxcan::filter::Mask32;
+use embassy_stm32::can::bxcan::{Fifo, Frame, StandardId};
+use embassy_stm32::can::{Can, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler};
+use embassy_stm32::gpio::{Input, Pull};
+use embassy_stm32::peripherals::CAN1;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    CAN1_RX0 => Rx0InterruptHandler<CAN1>;
+    CAN1_RX1 => Rx1InterruptHandler<CAN1>;
+    CAN1_SCE => SceInterruptHandler<CAN1>;
+    CAN1_TX => TxInterruptHandler<CAN1>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    // HW is connected as follows:
+    // PB13 -> PD0
+    // PB12 -> PD1
+
+    // The next two lines are a workaround for testing without transceiver.
+    // To synchronise to the bus the RX input needs to see a high level.
+    // Use `mem::forget()` to release the borrow on the pin but keep the
+    // pull-up resistor enabled.
+    let rx_pin = Input::new(&mut p.PD0, Pull::Up);
+    core::mem::forget(rx_pin);
+
+    let mut can = Can::new(p.CAN1, p.PD0, p.PD1, Irqs);
+
+    info!("Configuring can...");
+
+    can.as_mut()
+        .modify_filters()
+        .enable_bank(0, Fifo::Fifo0, Mask32::accept_all());
+
+    can.set_bitrate(1_000_000);
+    can.as_mut()
+        .modify_config()
+        .set_loopback(true) // Receive own frames
+        .set_silent(true)
+        // .set_bit_timing(0x001c0003)
+        .enable();
+
+    info!("Can configured");
+
+    let mut i: u8 = 0;
+    loop {
+        let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), [i]);
+
+        info!("Transmitting frame...");
+        can.write(&tx_frame).await;
+
+        info!("Receiving frame...");
+        let (time, rx_frame) = can.read().await.unwrap();
+
+        info!("loopback time {}", time);
+        info!("loopback frame {=u8}", rx_frame.data().unwrap()[0]);
+
+        i += 1;
+        if i > 10 {
+            break;
+        }
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs
index 18fd85d44..aad174431 100644
--- a/tests/stm32/src/bin/gpio.rs
+++ b/tests/stm32/src/bin/gpio.rs
@@ -1,13 +1,13 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert;
 use embassy_executor::Spawner;
 use embassy_stm32::gpio::{Flex, Input, Level, Output, OutputOpenDrain, Pull, Speed};
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -30,20 +30,56 @@ async fn main(_spawner: Spawner) {
     let (mut a, mut b) = (p.PB6, p.PB7);
     #[cfg(feature = "stm32u585ai")]
     let (mut a, mut b) = (p.PD9, p.PD8);
+    #[cfg(feature = "stm32h563zi")]
+    let (mut a, mut b) = (p.PB6, p.PB7);
+    #[cfg(feature = "stm32c031c6")]
+    let (mut a, mut b) = (p.PB6, p.PB7);
 
     // Test initial output
     {
         let b = Input::new(&mut b, Pull::None);
 
         {
-            let _a = Output::new(&mut a, Level::Low, Speed::Low);
+            let a = Output::new(&mut a, Level::Low, Speed::Low);
             delay();
             assert!(b.is_low());
+            assert!(!b.is_high());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
         }
         {
-            let _a = Output::new(&mut a, Level::High, Speed::Low);
+            let mut a = Output::new(&mut a, Level::High, Speed::Low);
+            delay();
+            assert!(!b.is_low());
+            assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
+
+            // Test is_set_low / is_set_high
+            a.set_low();
+            delay();
+            assert!(b.is_low());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
+
+            a.set_high();
+            delay();
+            assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
+
+            // Test toggle
+            a.toggle();
+            delay();
+            assert!(b.is_low());
+            assert!(a.is_set_low());
+            assert!(!a.is_set_high());
+
+            a.toggle();
             delay();
             assert!(b.is_high());
+            assert!(!a.is_set_low());
+            assert!(a.is_set_high());
         }
     }
 
diff --git a/tests/stm32/src/bin/rtc.rs b/tests/stm32/src/bin/rtc.rs
new file mode 100644
index 000000000..194b153d5
--- /dev/null
+++ b/tests/stm32/src/bin/rtc.rs
@@ -0,0 +1,50 @@
+// required-features: chrono
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use chrono::{NaiveDate, NaiveDateTime};
+use common::*;
+use defmt::assert;
+use embassy_executor::Spawner;
+use embassy_stm32::pac;
+use embassy_stm32::rtc::{Rtc, RtcConfig};
+use embassy_time::{Duration, Timer};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    let now = NaiveDate::from_ymd_opt(2020, 5, 15)
+        .unwrap()
+        .and_hms_opt(10, 30, 15)
+        .unwrap();
+
+    info!("Starting LSI");
+
+    pac::RCC.csr().modify(|w| w.set_lsion(true));
+    while !pac::RCC.csr().read().lsirdy() {}
+
+    info!("Started LSI");
+
+    let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
+
+    rtc.set_datetime(now.into()).expect("datetime not set");
+
+    info!("Waiting 5 seconds");
+    Timer::after(Duration::from_millis(5000)).await;
+
+    let then: NaiveDateTime = rtc.now().unwrap().into();
+    let seconds = (then - now).num_seconds();
+
+    defmt::info!("measured = {}", seconds);
+
+    assert!(seconds > 3 && seconds < 7);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/bin/sdmmc.rs b/tests/stm32/src/bin/sdmmc.rs
new file mode 100644
index 000000000..515025386
--- /dev/null
+++ b/tests/stm32/src/bin/sdmmc.rs
@@ -0,0 +1,145 @@
+// required-features: sdmmc
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_stm32::sdmmc::{DataBlock, Sdmmc};
+use embassy_stm32::time::mhz;
+use embassy_stm32::{bind_interrupts, peripherals, sdmmc, Config};
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    SDIO => sdmmc::InterruptHandler<peripherals::SDIO>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    info!("Hello World!");
+
+    let mut config = Config::default();
+    config.rcc.sys_ck = Some(mhz(48));
+    config.rcc.pll48 = true;
+    let p = embassy_stm32::init(config);
+
+    #[cfg(feature = "stm32f429zi")]
+    let (mut sdmmc, mut dma, mut clk, mut cmd, mut d0, mut d1, mut d2, mut d3) =
+        (p.SDIO, p.DMA2_CH3, p.PC12, p.PD2, p.PC8, p.PC9, p.PC10, p.PC11);
+
+    // Arbitrary block index
+    let block_idx = 16;
+
+    let mut pattern1 = DataBlock([0u8; 512]);
+    let mut pattern2 = DataBlock([0u8; 512]);
+    for i in 0..512 {
+        pattern1[i] = i as u8;
+        pattern2[i] = !i as u8;
+    }
+
+    let mut block = DataBlock([0u8; 512]);
+
+    // ======== Try 4bit. ==============
+    info!("initializing in 4-bit mode...");
+    let mut s = Sdmmc::new_4bit(
+        &mut sdmmc,
+        Irqs,
+        &mut dma,
+        &mut clk,
+        &mut cmd,
+        &mut d0,
+        &mut d1,
+        &mut d2,
+        &mut d3,
+        Default::default(),
+    );
+
+    let mut err = None;
+    loop {
+        match s.init_card(mhz(24)).await {
+            Ok(_) => break,
+            Err(e) => {
+                if err != Some(e) {
+                    info!("waiting for card: {:?}", e);
+                    err = Some(e);
+                }
+            }
+        }
+    }
+
+    let card = unwrap!(s.card());
+
+    info!("Card: {:#?}", Debug2Format(card));
+    info!("Clock: {}", s.clock());
+
+    info!("writing pattern1...");
+    s.write_block(block_idx, &pattern1).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern1);
+
+    info!("writing pattern2...");
+    s.write_block(block_idx, &pattern2).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern2);
+
+    drop(s);
+
+    // ======== Try 1bit. ==============
+    info!("initializing in 1-bit mode...");
+    let mut s = Sdmmc::new_1bit(
+        &mut sdmmc,
+        Irqs,
+        &mut dma,
+        &mut clk,
+        &mut cmd,
+        &mut d0,
+        Default::default(),
+    );
+
+    let mut err = None;
+    loop {
+        match s.init_card(mhz(24)).await {
+            Ok(_) => break,
+            Err(e) => {
+                if err != Some(e) {
+                    info!("waiting for card: {:?}", e);
+                    err = Some(e);
+                }
+            }
+        }
+    }
+
+    let card = unwrap!(s.card());
+
+    info!("Card: {:#?}", Debug2Format(card));
+    info!("Clock: {}", s.clock());
+
+    info!("reading pattern2 written in 4bit mode...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern2);
+
+    info!("writing pattern1...");
+    s.write_block(block_idx, &pattern1).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern1);
+
+    info!("writing pattern2...");
+    s.write_block(block_idx, &pattern2).await.unwrap();
+
+    info!("reading...");
+    s.read_block(block_idx, &mut block).await.unwrap();
+    assert_eq!(block, pattern2);
+
+    drop(s);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs
index 1c5dc87c0..819ecae3c 100644
--- a/tests/stm32/src/bin/spi.rs
+++ b/tests/stm32/src/bin/spi.rs
@@ -1,15 +1,15 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_stm32::dma::NoDma;
 use embassy_stm32::spi::{self, Spi};
 use embassy_stm32::time::Hertz;
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -17,22 +17,26 @@ async fn main(_spawner: Spawner) {
     info!("Hello World!");
 
     #[cfg(feature = "stm32f103c8")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32f429zi")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32h755zi")]
-    let (sck, mosi, miso) = (p.PA5, p.PB5, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PB5, p.PA6);
     #[cfg(feature = "stm32g491re")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32g071rb")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32wb55rg")]
-    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32u585ai")]
-    let (sck, mosi, miso) = (p.PE13, p.PE15, p.PE14);
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
+    #[cfg(feature = "stm32h563zi")]
+    let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
+    #[cfg(feature = "stm32c031c6")]
+    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
 
     let mut spi = Spi::new(
-        p.SPI1,
+        spi,
         sck,  // Arduino D13
         mosi, // Arduino D11
         miso, // Arduino D12
@@ -46,7 +50,7 @@ async fn main(_spawner: Spawner) {
 
     // Arduino pins D11 and D12 (MOSI-MISO) are connected together with a 1K resistor.
     // so we should get the data we sent back.
-    let mut buf = data;
+    let mut buf = [0; 9];
     spi.blocking_transfer(&mut buf, &data).unwrap();
     assert_eq!(buf, data);
 
diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs
index cb2152e0b..78aad24e1 100644
--- a/tests/stm32/src/bin/spi_dma.rs
+++ b/tests/stm32/src/bin/spi_dma.rs
@@ -1,14 +1,14 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_stm32::spi::{self, Spi};
 use embassy_stm32::time::Hertz;
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -16,22 +16,26 @@ async fn main(_spawner: Spawner) {
     info!("Hello World!");
 
     #[cfg(feature = "stm32f103c8")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
     #[cfg(feature = "stm32f429zi")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
     #[cfg(feature = "stm32h755zi")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
     #[cfg(feature = "stm32g491re")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32g071rb")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32wb55rg")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32u585ai")]
-    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32h563zi")]
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32c031c6")]
+    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
 
     let mut spi = Spi::new(
-        p.SPI1,
+        spi,
         sck,  // Arduino D13
         mosi, // Arduino D11
         miso, // Arduino D12
diff --git a/tests/stm32/src/bin/timer.rs b/tests/stm32/src/bin/timer.rs
index e00e43bf1..f8b453cda 100644
--- a/tests/stm32/src/bin/timer.rs
+++ b/tests/stm32/src/bin/timer.rs
@@ -1,13 +1,13 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert;
 use embassy_executor::Spawner;
 use embassy_time::{Duration, Instant, Timer};
-use example_common::*;
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs
index 7673bfe6d..394005b82 100644
--- a/tests/stm32/src/bin/usart.rs
+++ b/tests/stm32/src/bin/usart.rs
@@ -1,14 +1,42 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_stm32::dma::NoDma;
-use embassy_stm32::usart::{Config, Uart};
-use example_common::*;
+use embassy_stm32::usart::{Config, Error, Uart};
+use embassy_stm32::{bind_interrupts, peripherals, usart};
+use embassy_time::{Duration, Instant};
+
+#[cfg(any(
+    feature = "stm32f103c8",
+    feature = "stm32g491re",
+    feature = "stm32g071rb",
+    feature = "stm32h755zi",
+    feature = "stm32c031c6",
+))]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+});
+
+#[cfg(feature = "stm32u585ai")]
+bind_interrupts!(struct Irqs {
+    USART3 => usart::InterruptHandler<peripherals::USART3>;
+});
+
+#[cfg(feature = "stm32f429zi")]
+bind_interrupts!(struct Irqs {
+    USART6 => usart::InterruptHandler<peripherals::USART6>;
+});
+
+#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
+bind_interrupts!(struct Irqs {
+    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
+});
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -18,32 +46,96 @@ async fn main(_spawner: Spawner) {
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
     #[cfg(feature = "stm32f103c8")]
-    let (tx, rx, usart) = (p.PA9, p.PA10, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1);
     #[cfg(feature = "stm32g491re")]
-    let (tx, rx, usart) = (p.PC4, p.PC5, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
     #[cfg(feature = "stm32g071rb")]
-    let (tx, rx, usart) = (p.PC4, p.PC5, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
     #[cfg(feature = "stm32f429zi")]
-    let (tx, rx, usart) = (p.PG14, p.PG9, p.USART6);
+    let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6);
     #[cfg(feature = "stm32wb55rg")]
-    let (tx, rx, usart) = (p.PA2, p.PA3, p.LPUART1);
+    let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1);
     #[cfg(feature = "stm32h755zi")]
-    let (tx, rx, usart) = (p.PB6, p.PB7, p.USART1);
+    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
     #[cfg(feature = "stm32u585ai")]
-    let (tx, rx, usart) = (p.PD8, p.PD9, p.USART3);
+    let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3);
+    #[cfg(feature = "stm32h563zi")]
+    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1);
+    #[cfg(feature = "stm32c031c6")]
+    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
+
+    {
+        let config = Config::default();
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+
+        // We can't send too many bytes, they have to fit in the FIFO.
+        // This is because we aren't sending+receiving at the same time.
+
+        let data = [0xC0, 0xDE];
+        usart.blocking_write(&data).unwrap();
+
+        let mut buf = [0; 2];
+        usart.blocking_read(&mut buf).unwrap();
+        assert_eq!(buf, data);
+    }
+
+    // Test error handling with with an overflow error
+    {
+        let config = Config::default();
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+
+        // Send enough bytes to fill the RX FIFOs off all USART versions.
+        let data = [0xC0, 0xDE, 0x12, 0x23, 0x34];
+        usart.blocking_write(&data).unwrap();
+        usart.blocking_flush().unwrap();
+
+        // The error should be reported first.
+        let mut buf = [0; 1];
+        let err = usart.blocking_read(&mut buf);
+        assert_eq!(err, Err(Error::Overrun));
+
+        // At least the first data byte should still be available on all USART versions.
+        usart.blocking_read(&mut buf).unwrap();
+        assert_eq!(buf[0], data[0]);
+    }
 
-    let config = Config::default();
-    let mut usart = Uart::new(usart, rx, tx, NoDma, NoDma, config);
+    // Test that baudrate divider is calculated correctly.
+    // Do it by comparing the time it takes to send a known number of bytes.
+    for baudrate in [
+        300,
+        9600,
+        115200,
+        250_000,
+        337_934,
+        #[cfg(not(feature = "stm32f103c8"))]
+        1_000_000,
+        #[cfg(not(feature = "stm32f103c8"))]
+        2_000_000,
+    ] {
+        info!("testing baudrate {}", baudrate);
 
-    // We can't send too many bytes, they have to fit in the FIFO.
-    // This is because we aren't sending+receiving at the same time.
+        let mut config = Config::default();
+        config.baudrate = baudrate;
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
 
-    let data = [0xC0, 0xDE];
-    usart.blocking_write(&data).unwrap();
+        let n = (baudrate as usize / 100).max(64);
 
-    let mut buf = [0; 2];
-    usart.blocking_read(&mut buf).unwrap();
-    assert_eq!(buf, data);
+        let start = Instant::now();
+        for _ in 0..n {
+            usart.blocking_write(&[0x00]).unwrap();
+        }
+        let dur = Instant::now() - start;
+        let want_dur = Duration::from_micros(n as u64 * 10 * 1_000_000 / (baudrate as u64));
+        let fuzz = want_dur / 5;
+        if dur < want_dur - fuzz || dur > want_dur + fuzz {
+            defmt::panic!(
+                "bad duration for baudrate {}: got {:?} want {:?}",
+                baudrate,
+                dur,
+                want_dur
+            );
+        }
+    }
 
     info!("Test OK");
     cortex_m::asm::bkpt();
diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs
index e0389446f..c34d9574b 100644
--- a/tests/stm32/src/bin/usart_dma.rs
+++ b/tests/stm32/src/bin/usart_dma.rs
@@ -1,13 +1,41 @@
 #![no_std]
 #![no_main]
 #![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
 
-#[path = "../example_common.rs"]
-mod example_common;
+use common::*;
 use defmt::assert_eq;
 use embassy_executor::Spawner;
+use embassy_futures::join::join;
 use embassy_stm32::usart::{Config, Uart};
-use example_common::*;
+use embassy_stm32::{bind_interrupts, peripherals, usart};
+
+#[cfg(any(
+    feature = "stm32f103c8",
+    feature = "stm32g491re",
+    feature = "stm32g071rb",
+    feature = "stm32h755zi",
+    feature = "stm32c031c6",
+))]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+});
+
+#[cfg(feature = "stm32u585ai")]
+bind_interrupts!(struct Irqs {
+    USART3 => usart::InterruptHandler<peripherals::USART3>;
+});
+
+#[cfg(feature = "stm32f429zi")]
+bind_interrupts!(struct Irqs {
+    USART6 => usart::InterruptHandler<peripherals::USART6>;
+});
+
+#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
+bind_interrupts!(struct Irqs {
+    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
+});
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -17,33 +45,51 @@ async fn main(_spawner: Spawner) {
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
     #[cfg(feature = "stm32f103c8")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5);
     #[cfg(feature = "stm32g491re")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32g071rb")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32f429zi")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
     #[cfg(feature = "stm32wb55rg")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32h755zi")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
     #[cfg(feature = "stm32u585ai")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32h563zi")]
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32c031c6")]
+    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
 
     let config = Config::default();
-    let mut usart = Uart::new(usart, rx, tx, tx_dma, rx_dma, config);
+    let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
+
+    const LEN: usize = 128;
+    let mut tx_buf = [0; LEN];
+    let mut rx_buf = [0; LEN];
+
+    let (mut tx, mut rx) = usart.split();
+
+    for n in 0..42 {
+        for i in 0..LEN {
+            tx_buf[i] = (i ^ n) as u8;
+        }
 
-    // We can't send too many bytes, they have to fit in the FIFO.
-    // This is because we aren't sending+receiving at the same time.
-    // For whatever reason, blocking works with 2 bytes but DMA only with 1??
+        let tx_fut = async {
+            tx.write(&tx_buf).await.unwrap();
+        };
+        let rx_fut = async {
+            rx.read(&mut rx_buf).await.unwrap();
+        };
 
-    let data = [0x42];
-    usart.write(&data).await.unwrap();
+        // note: rx needs to be polled first, to workaround this bug:
+        // https://github.com/embassy-rs/embassy/issues/1426
+        join(rx_fut, tx_fut).await;
 
-    let mut buf = [0; 1];
-    usart.read(&mut buf).await.unwrap();
-    assert_eq!(buf, data);
+        assert_eq!(tx_buf, rx_buf);
+    }
 
     info!("Test OK");
     cortex_m::asm::bkpt();
diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
new file mode 100644
index 000000000..c8dd2643b
--- /dev/null
+++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
@@ -0,0 +1,198 @@
+// required-features: not-gpdma
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use common::*;
+use defmt::{assert_eq, panic};
+use embassy_executor::Spawner;
+use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
+use embassy_stm32::{bind_interrupts, peripherals, usart};
+use embassy_time::{Duration, Timer};
+use rand_chacha::ChaCha8Rng;
+use rand_core::{RngCore, SeedableRng};
+
+#[cfg(any(
+    feature = "stm32f103c8",
+    feature = "stm32g491re",
+    feature = "stm32g071rb",
+    feature = "stm32h755zi",
+    feature = "stm32c031c6",
+))]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+});
+
+#[cfg(feature = "stm32u585ai")]
+bind_interrupts!(struct Irqs {
+    USART3 => usart::InterruptHandler<peripherals::USART3>;
+});
+
+#[cfg(feature = "stm32f429zi")]
+bind_interrupts!(struct Irqs {
+    USART1 => usart::InterruptHandler<peripherals::USART1>;
+    USART6 => usart::InterruptHandler<peripherals::USART6>;
+});
+
+#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
+bind_interrupts!(struct Irqs {
+    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
+});
+
+#[cfg(feature = "stm32f103c8")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH4;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH5;
+}
+#[cfg(feature = "stm32g491re")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+#[cfg(feature = "stm32g071rb")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+#[cfg(feature = "stm32f429zi")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART6;
+    pub type TxDma = embassy_stm32::peripherals::DMA2_CH6;
+    pub type RxDma = embassy_stm32::peripherals::DMA2_CH1;
+}
+#[cfg(feature = "stm32wb55rg")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::LPUART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+#[cfg(feature = "stm32h755zi")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH0;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH1;
+}
+#[cfg(feature = "stm32u585ai")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART3;
+    pub type TxDma = embassy_stm32::peripherals::GPDMA1_CH0;
+    pub type RxDma = embassy_stm32::peripherals::GPDMA1_CH1;
+}
+#[cfg(feature = "stm32c031c6")]
+mod board {
+    pub type Uart = embassy_stm32::peripherals::USART1;
+    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
+    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
+}
+
+const DMA_BUF_SIZE: usize = 256;
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    // Arduino pins D0 and D1
+    // They're connected together with a 1K resistor.
+    #[cfg(feature = "stm32f103c8")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
+    #[cfg(feature = "stm32g491re")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32g071rb")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32f429zi")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
+    #[cfg(feature = "stm32wb55rg")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32h755zi")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
+    #[cfg(feature = "stm32u585ai")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
+    #[cfg(feature = "stm32c031c6")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+
+    // To run this test, use the saturating_serial test utility to saturate the serial port
+
+    let mut config = Config::default();
+    // this is the fastest we can go without tuning RCC
+    // some chips have default pclk=8mhz, and uart can run at max pclk/16
+    config.baudrate = 500_000;
+    config.data_bits = DataBits::DataBits8;
+    config.stop_bits = StopBits::STOP1;
+    config.parity = Parity::ParityNone;
+
+    let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config);
+    let (tx, rx) = usart.split();
+    static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE];
+    let dma_buf = unsafe { DMA_BUF.as_mut() };
+    let rx = rx.into_ring_buffered(dma_buf);
+
+    info!("Spawning tasks");
+    spawner.spawn(transmit_task(tx)).unwrap();
+    spawner.spawn(receive_task(rx)).unwrap();
+}
+
+#[embassy_executor::task]
+async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
+    // workaround https://github.com/embassy-rs/embassy/issues/1426
+    Timer::after(Duration::from_millis(100) as _).await;
+
+    let mut rng = ChaCha8Rng::seed_from_u64(1337);
+
+    info!("Starting random transmissions into void...");
+
+    let mut i: u8 = 0;
+    loop {
+        let mut buf = [0; 256];
+        let len = 1 + (rng.next_u32() as usize % buf.len());
+        for b in &mut buf[..len] {
+            *b = i;
+            i = i.wrapping_add(1);
+        }
+
+        tx.write(&buf[..len]).await.unwrap();
+        Timer::after(Duration::from_micros((rng.next_u32() % 1000) as _)).await;
+    }
+}
+
+#[embassy_executor::task]
+async fn receive_task(mut rx: RingBufferedUartRx<'static, board::Uart, board::RxDma>) {
+    info!("Ready to receive...");
+
+    let mut rng = ChaCha8Rng::seed_from_u64(1337);
+
+    let mut i = 0;
+    let mut expected = 0;
+    loop {
+        let mut buf = [0; 256];
+        let max_len = 1 + (rng.next_u32() as usize % buf.len());
+        let received = match rx.read(&mut buf[..max_len]).await {
+            Ok(r) => r,
+            Err(e) => {
+                panic!("Test fail! read error: {:?}", e);
+            }
+        };
+
+        for byte in &buf[..received] {
+            assert_eq!(*byte, expected);
+            expected = expected.wrapping_add(1);
+        }
+
+        if received < max_len {
+            Timer::after(Duration::from_micros((rng.next_u32() % 1000) as _)).await;
+        }
+
+        i += received;
+
+        if i > 100000 {
+            info!("Test OK!");
+            cortex_m::asm::bkpt();
+        }
+    }
+}
diff --git a/tests/stm32/src/bin/wpan_ble.rs b/tests/stm32/src/bin/wpan_ble.rs
new file mode 100644
index 000000000..3ad8aca4e
--- /dev/null
+++ b/tests/stm32/src/bin/wpan_ble.rs
@@ -0,0 +1,251 @@
+// required-features: ble
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use core::time::Duration;
+
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::ipcc::{Config, ReceiveInterruptHandler, TransmitInterruptHandler};
+use embassy_stm32_wpan::hci::host::uart::UartHci;
+use embassy_stm32_wpan::hci::host::{AdvertisingFilterPolicy, EncryptionKey, HostHci, OwnAddressType};
+use embassy_stm32_wpan::hci::types::AdvertisingType;
+use embassy_stm32_wpan::hci::vendor::stm32wb::command::gap::{
+    AdvertisingDataType, DiscoverableParameters, GapCommands, Role,
+};
+use embassy_stm32_wpan::hci::vendor::stm32wb::command::gatt::GattCommands;
+use embassy_stm32_wpan::hci::vendor::stm32wb::command::hal::{ConfigData, HalCommands, PowerLevel};
+use embassy_stm32_wpan::hci::BdAddr;
+use embassy_stm32_wpan::lhci::LhciC1DeviceInformationCcrp;
+use embassy_stm32_wpan::sub::mm;
+use embassy_stm32_wpan::TlMbox;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs{
+    IPCC_C1_RX => ReceiveInterruptHandler;
+    IPCC_C1_TX => TransmitInterruptHandler;
+});
+
+const BLE_GAP_DEVICE_NAME_LENGTH: u8 = 7;
+
+#[embassy_executor::task]
+async fn run_mm_queue(memory_manager: mm::MemoryManager) {
+    memory_manager.run_queue().await;
+}
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    let config = Config::default();
+    let mut mbox = TlMbox::init(p.IPCC, Irqs, config);
+
+    spawner.spawn(run_mm_queue(mbox.mm_subsystem)).unwrap();
+
+    let sys_event = mbox.sys_subsystem.read().await;
+    info!("sys event: {}", sys_event.payload());
+
+    let fw_info = mbox.sys_subsystem.wireless_fw_info().unwrap();
+    let version_major = fw_info.version_major();
+    let version_minor = fw_info.version_minor();
+    let subversion = fw_info.subversion();
+
+    let sram2a_size = fw_info.sram2a_size();
+    let sram2b_size = fw_info.sram2b_size();
+
+    info!(
+        "version {}.{}.{} - SRAM2a {} - SRAM2b {}",
+        version_major, version_minor, subversion, sram2a_size, sram2b_size
+    );
+
+    let _ = mbox.sys_subsystem.shci_c2_ble_init(Default::default()).await;
+
+    info!("resetting BLE...");
+    mbox.ble_subsystem.reset().await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config public address...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::public_address(get_bd_addr()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config random address...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::random_address(get_random_addr()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config identity root...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::identity_root(&get_irk()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config encryption root...");
+    mbox.ble_subsystem
+        .write_config_data(&ConfigData::encryption_root(&get_erk()).build())
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("config tx power level...");
+    mbox.ble_subsystem.set_tx_power_level(PowerLevel::ZerodBm).await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("GATT init...");
+    mbox.ble_subsystem.init_gatt().await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("GAP init...");
+    mbox.ble_subsystem
+        .init_gap(Role::PERIPHERAL, false, BLE_GAP_DEVICE_NAME_LENGTH)
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    // info!("set scan response...");
+    // mbox.ble_subsystem.le_set_scan_response_data(&[]).await.unwrap();
+    // let response = mbox.ble_subsystem.read().await.unwrap();
+    // info!("{}", response);
+
+    info!("set discoverable...");
+    mbox.ble_subsystem
+        .set_discoverable(&DiscoverableParameters {
+            advertising_type: AdvertisingType::NonConnectableUndirected,
+            advertising_interval: Some((Duration::from_millis(250), Duration::from_millis(250))),
+            address_type: OwnAddressType::Public,
+            filter_policy: AdvertisingFilterPolicy::AllowConnectionAndScan,
+            local_name: None,
+            advertising_data: &[],
+            conn_interval: (None, None),
+        })
+        .await
+        .unwrap();
+
+    let response = mbox.ble_subsystem.read().await;
+    info!("{}", response);
+
+    // remove some advertisement to decrease the packet size
+    info!("delete tx power ad type...");
+    mbox.ble_subsystem
+        .delete_ad_type(AdvertisingDataType::TxPowerLevel)
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("delete conn interval ad type...");
+    mbox.ble_subsystem
+        .delete_ad_type(AdvertisingDataType::PeripheralConnectionInterval)
+        .await;
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("update advertising data...");
+    mbox.ble_subsystem
+        .update_advertising_data(&eddystone_advertising_data())
+        .await
+        .unwrap();
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("update advertising data type...");
+    mbox.ble_subsystem
+        .update_advertising_data(&[3, AdvertisingDataType::UuidCompleteList16 as u8, 0xaa, 0xfe])
+        .await
+        .unwrap();
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("update advertising data flags...");
+    mbox.ble_subsystem
+        .update_advertising_data(&[
+            2,
+            AdvertisingDataType::Flags as u8,
+            (0x02 | 0x04) as u8, // BLE general discoverable, without BR/EDR support
+        ])
+        .await
+        .unwrap();
+    let response = mbox.ble_subsystem.read().await.unwrap();
+    info!("{}", response);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+fn get_bd_addr() -> BdAddr {
+    let mut bytes = [0u8; 6];
+
+    let lhci_info = LhciC1DeviceInformationCcrp::new();
+    bytes[0] = (lhci_info.uid64 & 0xff) as u8;
+    bytes[1] = ((lhci_info.uid64 >> 8) & 0xff) as u8;
+    bytes[2] = ((lhci_info.uid64 >> 16) & 0xff) as u8;
+    bytes[3] = lhci_info.device_type_id;
+    bytes[4] = (lhci_info.st_company_id & 0xff) as u8;
+    bytes[5] = (lhci_info.st_company_id >> 8 & 0xff) as u8;
+
+    BdAddr(bytes)
+}
+
+fn get_random_addr() -> BdAddr {
+    let mut bytes = [0u8; 6];
+
+    let lhci_info = LhciC1DeviceInformationCcrp::new();
+    bytes[0] = (lhci_info.uid64 & 0xff) as u8;
+    bytes[1] = ((lhci_info.uid64 >> 8) & 0xff) as u8;
+    bytes[2] = ((lhci_info.uid64 >> 16) & 0xff) as u8;
+    bytes[3] = 0;
+    bytes[4] = 0x6E;
+    bytes[5] = 0xED;
+
+    BdAddr(bytes)
+}
+
+const BLE_CFG_IRK: [u8; 16] = [
+    0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0,
+];
+const BLE_CFG_ERK: [u8; 16] = [
+    0xfe, 0xdc, 0xba, 0x09, 0x87, 0x65, 0x43, 0x21, 0xfe, 0xdc, 0xba, 0x09, 0x87, 0x65, 0x43, 0x21,
+];
+
+fn get_irk() -> EncryptionKey {
+    EncryptionKey(BLE_CFG_IRK)
+}
+
+fn get_erk() -> EncryptionKey {
+    EncryptionKey(BLE_CFG_ERK)
+}
+
+fn eddystone_advertising_data() -> [u8; 24] {
+    const EDDYSTONE_URL: &[u8] = b"www.rust-lang.com";
+
+    let mut service_data = [0u8; 24];
+    let url_len = EDDYSTONE_URL.len();
+
+    service_data[0] = 6 + url_len as u8;
+    service_data[1] = AdvertisingDataType::ServiceData as u8;
+
+    // 16-bit eddystone uuid
+    service_data[2] = 0xaa;
+    service_data[3] = 0xFE;
+
+    service_data[4] = 0x10; // URL frame type
+    service_data[5] = 22_i8 as u8; // calibrated TX power at 0m
+    service_data[6] = 0x03; // eddystone url prefix = https
+
+    service_data[7..(7 + url_len)].copy_from_slice(EDDYSTONE_URL);
+
+    service_data
+}
diff --git a/tests/stm32/src/bin/wpan_mac.rs b/tests/stm32/src/bin/wpan_mac.rs
new file mode 100644
index 000000000..d64a5ef81
--- /dev/null
+++ b/tests/stm32/src/bin/wpan_mac.rs
@@ -0,0 +1,120 @@
+// required-features: mac
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::bind_interrupts;
+use embassy_stm32::ipcc::{Config, ReceiveInterruptHandler, TransmitInterruptHandler};
+use embassy_stm32_wpan::mac::commands::{AssociateRequest, GetRequest, ResetRequest, SetRequest};
+use embassy_stm32_wpan::mac::event::MacEvent;
+use embassy_stm32_wpan::mac::typedefs::{
+    AddressMode, Capabilities, KeyIdMode, MacAddress, MacChannel, PanId, PibId, SecurityLevel,
+};
+use embassy_stm32_wpan::sub::mm;
+use embassy_stm32_wpan::TlMbox;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs{
+    IPCC_C1_RX => ReceiveInterruptHandler;
+    IPCC_C1_TX => TransmitInterruptHandler;
+});
+
+#[embassy_executor::task]
+async fn run_mm_queue(memory_manager: mm::MemoryManager) {
+    memory_manager.run_queue().await;
+}
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    let p = embassy_stm32::init(config());
+    info!("Hello World!");
+
+    let config = Config::default();
+    let mbox = TlMbox::init(p.IPCC, Irqs, config);
+
+    spawner.spawn(run_mm_queue(mbox.mm_subsystem)).unwrap();
+
+    let sys_event = mbox.sys_subsystem.read().await;
+    info!("sys event: {}", sys_event.payload());
+
+    core::mem::drop(sys_event);
+
+    let result = mbox.sys_subsystem.shci_c2_mac_802_15_4_init().await;
+    info!("initialized mac: {}", result);
+
+    info!("resetting");
+    mbox.mac_subsystem
+        .send_command(&ResetRequest {
+            set_default_pib: true,
+            ..Default::default()
+        })
+        .await
+        .unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+    }
+
+    info!("setting extended address");
+    let extended_address: u64 = 0xACDE480000000002;
+    mbox.mac_subsystem
+        .send_command(&SetRequest {
+            pib_attribute_ptr: &extended_address as *const _ as *const u8,
+            pib_attribute: PibId::ExtendedAddress,
+        })
+        .await
+        .unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+    }
+
+    info!("getting extended address");
+    mbox.mac_subsystem
+        .send_command(&GetRequest {
+            pib_attribute: PibId::ExtendedAddress,
+            ..Default::default()
+        })
+        .await
+        .unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+
+        if let Ok(MacEvent::MlmeGetCnf(evt)) = evt.mac_event() {
+            if evt.pib_attribute_value_len == 8 {
+                let value = unsafe { core::ptr::read_unaligned(evt.pib_attribute_value_ptr as *const u64) };
+
+                info!("value {:#x}", value)
+            }
+        }
+    }
+
+    info!("assocation request");
+    let a = AssociateRequest {
+        channel_number: MacChannel::Channel16,
+        channel_page: 0,
+        coord_addr_mode: AddressMode::Short,
+        coord_address: MacAddress { short: [34, 17] },
+        capability_information: Capabilities::ALLOCATE_ADDRESS,
+        coord_pan_id: PanId([0x1A, 0xAA]),
+        security_level: SecurityLevel::Unsecure,
+        key_id_mode: KeyIdMode::Implicite,
+        key_source: [0; 8],
+        key_index: 152,
+    };
+    info!("{}", a);
+    mbox.mac_subsystem.send_command(&a).await.unwrap();
+    {
+        let evt = mbox.mac_subsystem.read().await;
+        info!("{:#x}", evt.mac_event());
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
new file mode 100644
index 000000000..3d2a9b8ef
--- /dev/null
+++ b/tests/stm32/src/common.rs
@@ -0,0 +1,44 @@
+#![macro_use]
+
+pub use defmt::*;
+#[allow(unused)]
+use embassy_stm32::time::Hertz;
+use embassy_stm32::Config;
+use {defmt_rtt as _, panic_probe as _};
+
+#[cfg(feature = "stm32f103c8")]
+teleprobe_meta::target!(b"bluepill-stm32f103c8");
+#[cfg(feature = "stm32g491re")]
+teleprobe_meta::target!(b"nucleo-stm32g491re");
+#[cfg(feature = "stm32g071rb")]
+teleprobe_meta::target!(b"nucleo-stm32g071rb");
+#[cfg(feature = "stm32f429zi")]
+teleprobe_meta::target!(b"nucleo-stm32f429zi");
+#[cfg(feature = "stm32wb55rg")]
+teleprobe_meta::target!(b"nucleo-stm32wb55rg");
+#[cfg(feature = "stm32h755zi")]
+teleprobe_meta::target!(b"nucleo-stm32h755zi");
+#[cfg(feature = "stm32u585ai")]
+teleprobe_meta::target!(b"iot-stm32u585ai");
+#[cfg(feature = "stm32h563zi")]
+teleprobe_meta::target!(b"nucleo-stm32h563zi");
+#[cfg(feature = "stm32c031c6")]
+teleprobe_meta::target!(b"nucleo-stm32c031c6");
+
+pub fn config() -> Config {
+    #[allow(unused_mut)]
+    let mut config = Config::default();
+
+    #[cfg(feature = "stm32h755zi")]
+    {
+        config.rcc.sys_ck = Some(Hertz(400_000_000));
+        config.rcc.pll1.q_ck = Some(Hertz(100_000_000));
+    }
+
+    #[cfg(feature = "stm32u585ai")]
+    {
+        config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz);
+    }
+
+    config
+}
diff --git a/tests/stm32/src/example_common.rs b/tests/stm32/src/example_common.rs
deleted file mode 100644
index c47ed75c4..000000000
--- a/tests/stm32/src/example_common.rs
+++ /dev/null
@@ -1,31 +0,0 @@
-#![macro_use]
-
-use core::sync::atomic::{AtomicUsize, Ordering};
-
-pub use defmt::*;
-#[allow(unused)]
-use embassy_stm32::time::Hertz;
-use embassy_stm32::Config;
-use {defmt_rtt as _, panic_probe as _};
-
-defmt::timestamp! {"{=u64}", {
-        static COUNT: AtomicUsize = AtomicUsize::new(0);
-        // NOTE(no-CAS) `timestamps` runs with interrupts disabled
-        let n = COUNT.load(Ordering::Relaxed);
-        COUNT.store(n + 1, Ordering::Relaxed);
-        n as u64
-    }
-}
-
-pub fn config() -> Config {
-    #[allow(unused_mut)]
-    let mut config = Config::default();
-
-    #[cfg(feature = "stm32h755zi")]
-    {
-        config.rcc.sys_ck = Some(Hertz(400_000_000));
-        config.rcc.pll1.q_ck = Some(Hertz(100_000_000));
-    }
-
-    config
-}
diff --git a/tests/utils/Cargo.toml b/tests/utils/Cargo.toml
new file mode 100644
index 000000000..7d66fd586
--- /dev/null
+++ b/tests/utils/Cargo.toml
@@ -0,0 +1,10 @@
+[package]
+name = "test-utils"
+version = "0.1.0"
+edition = "2021"
+
+# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
+
+[dependencies]
+rand = "0.8"
+serial = "0.4"
diff --git a/tests/utils/src/bin/saturate_serial.rs b/tests/utils/src/bin/saturate_serial.rs
new file mode 100644
index 000000000..18ca12fb7
--- /dev/null
+++ b/tests/utils/src/bin/saturate_serial.rs
@@ -0,0 +1,53 @@
+use std::path::Path;
+use std::time::Duration;
+use std::{env, io, process, thread};
+
+use rand::random;
+use serial::SerialPort;
+
+pub fn main() {
+    if let Some(port_name) = env::args().nth(1) {
+        let idles = env::args().position(|x| x == "--idles").is_some();
+
+        println!("Saturating port {:?} with 115200 8N1", port_name);
+        println!("Idles: {}", idles);
+        println!("Process ID: {}", process::id());
+        let mut port = serial::open(&port_name).unwrap();
+        if saturate(&mut port, idles).is_err() {
+            eprintln!("Unable to saturate port");
+        }
+    } else {
+        let path = env::args().next().unwrap();
+        let basepath = Path::new(&path).with_extension("");
+        let basename = basepath.file_name().unwrap();
+        eprintln!("USAGE: {} <port-name>", basename.to_string_lossy());
+    }
+}
+
+fn saturate<T: SerialPort>(port: &mut T, idles: bool) -> io::Result<()> {
+    port.reconfigure(&|settings| {
+        settings.set_baud_rate(serial::Baud115200)?;
+        settings.set_char_size(serial::Bits8);
+        settings.set_parity(serial::ParityNone);
+        settings.set_stop_bits(serial::Stop1);
+        Ok(())
+    })?;
+
+    let mut written = 0;
+    loop {
+        let len = random::<usize>() % 0x1000;
+        let buf: Vec<u8> = (written..written + len).map(|x| x as u8).collect();
+
+        port.write_all(&buf)?;
+
+        if idles {
+            let micros = (random::<usize>() % 1000) as u64;
+            println!("Sleeping {}us", micros);
+            port.flush().unwrap();
+            thread::sleep(Duration::from_micros(micros));
+        }
+
+        written += len;
+        println!("Written: {}", written);
+    }
+}