diff options
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/stm32/Cargo.toml | 2 | ||||
| -rw-r--r-- | tests/stm32/src/common.rs | 35 |
2 files changed, 36 insertions, 1 deletions
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 48598ec2d..c6a50e2c5 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml | |||
| @@ -17,6 +17,8 @@ stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng"] | |||
| 17 | stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] | 17 | stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] |
| 18 | stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"] | 18 | stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"] |
| 19 | stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"] | 19 | stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"] |
| 20 | stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng"] | ||
| 21 | stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng"] | ||
| 20 | stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma", "rng"] | 22 | stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma", "rng"] |
| 21 | stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] | 23 | stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] |
| 22 | stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng"] | 24 | stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng"] |
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 693fd067f..0a70e6a7e 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -24,6 +24,8 @@ teleprobe_meta::target!(b"nucleo-stm32h753zi"); | |||
| 24 | teleprobe_meta::target!(b"nucleo-stm32h7a3zi"); | 24 | teleprobe_meta::target!(b"nucleo-stm32h7a3zi"); |
| 25 | #[cfg(feature = "stm32u585ai")] | 25 | #[cfg(feature = "stm32u585ai")] |
| 26 | teleprobe_meta::target!(b"iot-stm32u585ai"); | 26 | teleprobe_meta::target!(b"iot-stm32u585ai"); |
| 27 | #[cfg(feature = "stm32u5a5zj")] | ||
| 28 | teleprobe_meta::target!(b"nucleo-stm32u5a5zj"); | ||
| 27 | #[cfg(feature = "stm32h563zi")] | 29 | #[cfg(feature = "stm32h563zi")] |
| 28 | teleprobe_meta::target!(b"nucleo-stm32h563zi"); | 30 | teleprobe_meta::target!(b"nucleo-stm32h563zi"); |
| 29 | #[cfg(feature = "stm32c031c6")] | 31 | #[cfg(feature = "stm32c031c6")] |
| @@ -48,6 +50,8 @@ teleprobe_meta::target!(b"nucleo-stm32f303ze"); | |||
| 48 | teleprobe_meta::target!(b"nucleo-stm32l496zg"); | 50 | teleprobe_meta::target!(b"nucleo-stm32l496zg"); |
| 49 | #[cfg(feature = "stm32wl55jc")] | 51 | #[cfg(feature = "stm32wl55jc")] |
| 50 | teleprobe_meta::target!(b"nucleo-stm32wl55jc"); | 52 | teleprobe_meta::target!(b"nucleo-stm32wl55jc"); |
| 53 | #[cfg(feature = "stm32wba52cg")] | ||
| 54 | teleprobe_meta::target!(b"nucleo-stm32wba52cg"); | ||
| 51 | 55 | ||
| 52 | macro_rules! define_peris { | 56 | macro_rules! define_peris { |
| 53 | ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { | 57 | ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { |
| @@ -127,6 +131,12 @@ define_peris!( | |||
| 127 | SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, | 131 | SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, |
| 128 | @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;}, | 132 | @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;}, |
| 129 | ); | 133 | ); |
| 134 | #[cfg(feature = "stm32u5a5zj")] | ||
| 135 | define_peris!( | ||
| 136 | UART = LPUART1, UART_TX = PG7, UART_RX = PG8, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, | ||
| 137 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, | ||
| 138 | @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;}, | ||
| 139 | ); | ||
| 130 | #[cfg(feature = "stm32h563zi")] | 140 | #[cfg(feature = "stm32h563zi")] |
| 131 | define_peris!( | 141 | define_peris!( |
| 132 | UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, | 142 | UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, |
| @@ -199,8 +209,21 @@ define_peris!( | |||
| 199 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, | 209 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, |
| 200 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, | 210 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, |
| 201 | ); | 211 | ); |
| 212 | #[cfg(feature = "stm32wba52cg")] | ||
| 213 | define_peris!( | ||
| 214 | UART = LPUART1, UART_TX = PB5, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, | ||
| 215 | SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, | ||
| 216 | @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;}, | ||
| 217 | ); | ||
| 202 | 218 | ||
| 203 | pub fn config() -> Config { | 219 | pub fn config() -> Config { |
| 220 | // Setting this bit is mandatory to use PG[15:2]. | ||
| 221 | #[cfg(feature = "stm32u5a5zj")] | ||
| 222 | embassy_stm32::pac::PWR.svmcr().modify(|w| { | ||
| 223 | w.set_io2sv(true); | ||
| 224 | w.set_io2vmen(true); | ||
| 225 | }); | ||
| 226 | |||
| 204 | #[allow(unused_mut)] | 227 | #[allow(unused_mut)] |
| 205 | let mut config = Config::default(); | 228 | let mut config = Config::default(); |
| 206 | 229 | ||
| @@ -401,12 +424,22 @@ pub fn config() -> Config { | |||
| 401 | }); | 424 | }); |
| 402 | } | 425 | } |
| 403 | 426 | ||
| 404 | #[cfg(feature = "stm32u585ai")] | 427 | #[cfg(any(feature = "stm32u585ai", feature = "stm32u5a5zj"))] |
| 405 | { | 428 | { |
| 406 | use embassy_stm32::rcc::*; | 429 | use embassy_stm32::rcc::*; |
| 407 | config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_48MHZ); | 430 | config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_48MHZ); |
| 408 | } | 431 | } |
| 409 | 432 | ||
| 433 | #[cfg(feature = "stm32wba52cg")] | ||
| 434 | { | ||
| 435 | use embassy_stm32::rcc::*; | ||
| 436 | config.rcc.mux = ClockSrc::HSI; | ||
| 437 | |||
| 438 | embassy_stm32::pac::RCC.ccipr2().write(|w| { | ||
| 439 | w.set_rngsel(embassy_stm32::pac::rcc::vals::Rngsel::HSI); | ||
| 440 | }); | ||
| 441 | } | ||
| 442 | |||
| 410 | #[cfg(feature = "stm32l073rz")] | 443 | #[cfg(feature = "stm32l073rz")] |
| 411 | { | 444 | { |
| 412 | use embassy_stm32::rcc::*; | 445 | use embassy_stm32::rcc::*; |
