diff options
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/stm32/src/common.rs | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 7bc741416..8dde71fb3 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -224,11 +224,23 @@ pub fn config() -> Config { | |||
| 224 | 224 | ||
| 225 | #[cfg(feature = "stm32f429zi")] | 225 | #[cfg(feature = "stm32f429zi")] |
| 226 | { | 226 | { |
| 227 | // TODO: stm32f429zi can do up to 180mhz, but that makes tests fail. | 227 | use embassy_stm32::rcc::*; |
| 228 | // perhaps we have some bug w.r.t overdrive. | 228 | config.rcc.hse = Some(Hse { |
| 229 | config.rcc.sys_ck = Some(Hertz(168_000_000)); | 229 | freq: Hertz(8_000_000), |
| 230 | config.rcc.pclk1 = Some(Hertz(42_000_000)); | 230 | mode: HseMode::Bypass, |
| 231 | config.rcc.pclk2 = Some(Hertz(84_000_000)); | 231 | }); |
| 232 | config.rcc.pll_src = PllSource::HSE; | ||
| 233 | config.rcc.pll = Some(Pll { | ||
| 234 | prediv: PllPreDiv::DIV4, | ||
| 235 | mul: PllMul::MUL180, | ||
| 236 | divp: Some(Pllp::DIV2), // 8mhz / 4 * 180 / 2 = 180Mhz. | ||
| 237 | divq: None, | ||
| 238 | divr: None, | ||
| 239 | }); | ||
| 240 | config.rcc.ahb_pre = AHBPrescaler::DIV1; | ||
| 241 | config.rcc.apb1_pre = APBPrescaler::DIV4; | ||
| 242 | config.rcc.apb2_pre = APBPrescaler::DIV2; | ||
| 243 | config.rcc.sys = Sysclk::PLL1_P; | ||
| 232 | } | 244 | } |
| 233 | 245 | ||
| 234 | #[cfg(feature = "stm32f767zi")] | 246 | #[cfg(feature = "stm32f767zi")] |
