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path: root/embassy-stm32/build.rs
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* stm32: autogenerate clocks struct, enable mux for all chips.Dario Nieuwenhuis2024-02-021-23/+46
* stm32: automatically use refcounting for rcc bits used multiple times.Dario Nieuwenhuis2024-02-011-2/+13
* Merge pull request #2410 from eZioPan/waveform-on-CHxDario Nieuwenhuis2024-02-011-13/+8
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| * refactor with clippyeZio Pan2024-01-061-3/+4
| * impl waveform with TIM ChanneleZio Pan2024-01-061-10/+4
* | Implement MII interfaceSimon B. Gasse2024-02-011-0/+7
* | Add FDCAN clock registers to G4 RCC.Tomasz bla Fortuna2024-01-311-1/+1
* | adds timer-driver for tim21 and tim22 (on L0)shufps2024-01-151-0/+6
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* fix g0 being left out of some clock controlsAdin Ackerman2024-01-021-2/+2
* implement PWM waveform generating with DMAeZio Pan2023-12-281-0/+11
* stm32/sai: deduplicate code for subblocks A/B.Dario Nieuwenhuis2023-12-191-10/+10
* * Add GP TIM9 and TIM11 to be used as time_driverCarlos Barrales Ruiz2023-12-091-1/+7
* Update stm32-metapac.Dario Nieuwenhuis2023-12-081-0/+4
* STM32 DAC: Rework DAC driver, support all families.Adam Greig2023-11-251-2/+2
* STM32: Add cfg to differentiate L4 and L4+ familiesAdam Greig2023-11-251-0/+9
* STM32: Remove vestigal build.rs cfgs, add new flashsize_X and package_X cfgs,...Adam Greig2023-11-251-14/+4
* stm32/i2c: add async, dual interrupt scaffolding.Dario Nieuwenhuis2023-11-241-0/+20
* stm32/sai: fix build on chips with only SAI4 (like stm32h725re), improve sync...Dario Nieuwenhuis2023-11-191-0/+1
* stm32: update metapac and use stop dataxoviat2023-11-051-12/+11
* Merge pull request #2119 from JuliDi/fmc-sram-adcxoviat2023-11-061-1/+1
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| * fix typo in build.rs that caused fmc ClkPin to not be implementedJuliDi2023-10-151-1/+1
* | Remove accidentally leftover printlnAdam Greig2023-11-061-2/+0
* | stm32: support internal output on g4 opampsAdam Greig2023-11-051-9/+17
* | stm32: compute stop mode and workaround rtt test bugxoviat2023-11-041-4/+28
* | stm32/low-power: refactor refcountxoviat2023-10-251-2/+2
* | stm32/build: deterministically generate dataxoviat2023-10-231-16/+21
* | stm32: update metapacxoviat2023-10-161-12/+6
* | rcc: ahb/apb -> hclk/pclkxoviat2023-10-151-2/+8
* | stm32: expand rcc mux to g4 and h7xoviat2023-10-141-25/+18
* | rcc: remove mux_prefix from clocksxoviat2023-10-141-4/+10
* | rcc mux: update metapacxoviat2023-10-131-14/+9
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* stm32: avoid creating many tiny critical sections in init.Dario Nieuwenhuis2023-10-121-16/+12
* Remove critical section for resetpbert2023-10-121-4/+2
* enable clock firstpbert2023-10-121-2/+2
* STM32: combine RccPeripherals reset() and enable() to reset_and_enable()pbert2023-10-121-3/+1
* stm32: add initial rcc mux for h5xoviat2023-10-111-8/+107
* stm32: remove atomic-polyfill.Dario Nieuwenhuis2023-10-121-4/+30
* stm32/rcc: use more PLL etc enums from PAC.Dario Nieuwenhuis2023-10-111-1/+1
* stm32/rcc: use PLL enums from PAC.Dario Nieuwenhuis2023-10-091-0/+99
* stm32: implement MCO for all chips.Dario Nieuwenhuis2023-10-071-1/+5
* Add MCO support for stm32wl familyshakencodes2023-10-061-25/+6
* stm32: add opamp mod and update pacxoviat2023-10-031-0/+14
* remove debug logging in build.rsJuliDi2023-10-021-1/+0
* support QSPI BK2JuliDi2023-10-021-5/+11
* stm32: update set_configxoviat2023-10-011-0/+1
* skip _C pins for pin impls if split_feature not enabled.JuliDi2023-10-011-17/+9
* change split_features from array to VecJuliDi2023-10-011-1/+1
* cleanup, fix pushing to pins_tableJuliDi2023-10-011-60/+62
* check whether split-feature is validJuliDi2023-10-011-8/+43
* handle _C pinsJuliDi2023-10-011-2/+59
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