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path: root/embassy-stm32/src/dma/gpdma/ringbuffered.rs
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* stm32: extract busychannel into common apixoviat2025-11-251-5/+6
* low power: store stop mode for dma channelsxoviat2025-11-211-5/+5
* Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-2/+2
* fix: ping-pong helper DMA directionAdrian Figueroa2025-09-051-3/+4
* refactor: make dma implementations match in interfaceelagil2025-09-051-7/+4
* fix: consolidate namingelagil2025-09-051-5/+5
* fix: buildelagil2025-09-051-86/+14
* fix: renamed simple table as per ST nomenclatureetiennecollin2025-09-051-4/+4
* fix: removed unnecessary mut referenceetiennecollin2025-09-051-3/+3
* feat: add new_with_table() initializer for ring-buffers and removal of Regist...etiennecollin2025-09-051-30/+82
* fix: moved channel configuration from new() to start()etiennecollin2025-09-051-6/+4
* fix: removed functions exposing channel registersetiennecollin2025-09-051-16/+0
* feat: custom dma configuration using RegisterUpdaters structetiennecollin2025-09-051-5/+11
* feat: use provided TransferOptions instead of defaultsetiennecollin2025-09-051-4/+4
* feat: custom DMA channel configurationetiennecollin2025-09-051-6/+22
* fix: modified dma channel state managementetiennecollin2025-09-051-22/+32
* fix: docstringelagil2025-09-051-1/+1
* fix: simplifyelagil2025-09-051-18/+5
* fix: build issueselagil2025-09-051-10/+8
* feat: wip, write buffer in halveselagil2025-09-051-73/+11
* chore: change namingelagil2025-09-051-50/+42
* fix: wip gpdmaelagil2025-09-051-11/+14
* fix: load/store orderingelagil2025-09-051-3/+3
* fix: read transfer optionselagil2025-09-051-12/+7
* chore: clean up transfer optionselagil2025-09-051-18/+4
* fix: transfer optionselagil2025-09-051-1/+5
* fix: disable half-complete interruptelagil2025-09-051-2/+2
* style: formattingelagil2025-09-051-12/+7
* feat: ping-pong bufferselagil2025-09-051-14/+23
* feat: gpdma support (wip)elagil2025-09-051-0/+433