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path: root/embassy-stm32/src/lib.rs
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* Merge #601bors[bot]2022-02-091-2/+0
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| * stm32: change interrupt declarations from macrotables to build.rs.Dario Nieuwenhuis2022-02-091-2/+0
* | Merge #602bors[bot]2022-02-091-0/+2
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| * Merge USB FS and HS peripherals. Add ULPI.chemicstry2022-02-091-4/+2
| * Add stm32 USB OTG peripheralschemicstry2022-02-081-0/+4
* | stm32: Add support for FMCMatous Hybl2022-02-081-0/+2
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* Add low level timer API.Matous Hybl2022-01-131-0/+1
* Make exti an optional featureUlf Lilleengen2022-01-121-2/+2
* stm32: remove Dbgmcu from public API.Dario Nieuwenhuis2022-01-051-3/+7
* stm32/rcc: remove Rcc struct, RccExt trait.Dario Nieuwenhuis2022-01-051-2/+0
* Update rust-toolchainUlf Lilleengen2021-12-161-1/+0
* Add DCMI peripheral support.Matous Hybl2021-12-091-0/+2
* stm32/pwm: small cleanupsDario Nieuwenhuis2021-11-271-2/+1
* stm32/pwm: initial commitBen Gamari2021-11-271-0/+2
* First pass at CRC_V1Joshua Salzedo2021-09-261-2/+2
* Start work on CRC_v1Joshua Salzedo2021-09-261-0/+2
* Merge pull request #381 from lulf/stm32wl55-subghzDario Nieuwenhuis2021-09-061-0/+3
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| * Add HAL for SubGhz peripheral for STM32 WL seriesUlf Lilleengen2021-09-021-0/+3
* | Remove trait_alias, allow(incomplete_features).Dario Nieuwenhuis2021-09-031-1/+0
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* stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.Dario Nieuwenhuis2021-08-191-0/+6
* bxcan: namechange "bxcan_v1" -> "can_bxcan"Timo Kröger2021-08-181-2/+2
* CAN support with bxcan crateTimo Kröger2021-08-181-0/+2
* stm32/time: add Cargo features to choose tim2/tim3Dario Nieuwenhuis2021-08-051-0/+2
* time: replace dyn clock/alarm with a global Driver traitDario Nieuwenhuis2021-08-051-2/+4
* Merge pull request #344 from bobmcwhirter/remove_buildersDario Nieuwenhuis2021-08-041-8/+1
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| * Remove builders from Config(s) and examples.Bob McWhirter2021-08-041-8/+1
* | Update nightly, remove removed features.Dario Nieuwenhuis2021-08-041-2/+0
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* Undo the pwr-guarding cfg.Bob McWhirter2021-08-021-2/+1
* Emit a default memory.x alongside device.x from metapac.Bob McWhirter2021-08-021-1/+3
* Auto-enable all GPIOs during init().Bob McWhirter2021-07-231-0/+1
* Add a `Dbgmcu` struct capable of enabling all relevant DBGMCU.cr fields.Bob McWhirter2021-07-221-0/+2
* stm32/dma: impl all variantsDario Nieuwenhuis2021-07-161-13/+1
* all hals: reexport PAC if `unstable-pac` feature is set.Dario Nieuwenhuis2021-07-141-0/+3
* Mix dmamux into bdma_v1.Bob McWhirter2021-07-131-1/+4
* Checkpoint my DMA for thales.Bob McWhirter2021-07-131-0/+3
* Checkpoint DMAMUX channel setup.Bob McWhirter2021-07-131-0/+2
* STM: Start working on bdma-v1Thales Fragoso2021-07-131-0/+4
* Stub in the DMA bits that aren't yet there.Bob McWhirter2021-07-011-1/+1
* Separate exti into v1 and v2Thales Fragoso2021-06-241-2/+2
* #[cfg] extiThales Fragoso2021-06-241-3/+3
* eth-v2: Make embassy-net optionalThales Fragoso2021-06-161-1/+1
* eth-v2: Start Ethernet peripheral implementationThales Fragoso2021-06-161-0/+2
* ADCv3 and example.Bob McWhirter2021-06-141-0/+2
* General clean-up and removal of dead code.Bob McWhirter2021-06-031-1/+1
* Migrate exti_irq stuff to macro tables.Bob McWhirter2021-06-031-1/+1
* DAC v2 basics.Bob McWhirter2021-06-011-0/+2
* Add stm32-metapac crate, with codegen in rustDario Nieuwenhuis2021-05-311-21/+34
* Merge pull request #207 from lulf/clock-initDario Nieuwenhuis2021-05-271-0/+7
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| * Use builderUlf Lilleengen2021-05-271-2/+3
| * Assume tim2 in macro and remove clock setup in chip specific rcc initUlf Lilleengen2021-05-261-3/+4
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