| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | stm32: disable HSI48 if not in use | Bernát Süli | 2025-12-19 | 1 | -0/+6 |
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| * | feat(stm32-f013): provide a `const` constructor on `rcc::Config` | ROMemories | 2025-05-21 | 1 | -5/+11 |
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| * | stm32: update metapac, cleanup clocks a bit. | Dario Nieuwenhuis | 2025-04-18 | 1 | -6/+0 |
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| * | Move PLL2/3 config to before PLL | Martin Algesten | 2025-01-24 | 1 | -29/+31 |
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| * | Fix init order of set_prediv1src | Martin Algesten | 2025-01-24 | 1 | -10/+9 |
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| * | Review fixes | Martin Algesten | 2025-01-24 | 1 | -49/+28 |
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| * | Full RCC support for STM32F107 | Martin Algesten | 2025-01-16 | 1 | -3/+109 |
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| * | chore: fix build | elagil | 2025-01-03 | 1 | -6/+6 |
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| * | STM32F0 fix using HSI48 as SYSCLK on devices with CRS | Fabian Wolter | 2024-12-14 | 1 | -0/+3 |
| | | | | | Fixes #3651 | ||||
| * | Fix & Revert | Bing Wen | 2024-11-27 | 1 | -0/+1 |
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| * | Add new | Bing Wen | 2024-11-27 | 1 | -18/+11 |
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| * | Add new feature to enable overclocking | Bing Wen | 2024-11-26 | 1 | -6/+12 |
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| * | Fix dma nvic issues on dual core lines | Alexandros Liarokapis | 2024-08-17 | 1 | -0/+1 |
| | | | | | | | This commit addresses #3256 by disabling dma NVIC interrupt enablement at startup. Instead, per-channel NVIC interrupt enablement is now done with the rest of the dma channel configuration. This ensures that each core will only handle the interrupts of the DMA channels that it uses. | ||||
| * | Emit cargo:rustc-check-cfg instructions from build.rs | Jan Špaček | 2024-05-30 | 1 | -4/+4 |
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| * | stm32: remove pointer-to-pointer-to-registers. | Dario Nieuwenhuis | 2024-05-30 | 1 | -1/+1 |
| | | | | | | in chiptool pacs the register block struct is already a pointer, so using pointers to it is redundant. | ||||
| * | stm32: ensure the core runs on HSI clock while setting up rcc | Aurélien Jacobs | 2024-05-27 | 1 | -9/+15 |
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| * | stm32: update metapac. Adds U5 LPDMA, fixes ADC_COMMONs. | Dario Nieuwenhuis | 2024-04-29 | 1 | -36/+48 |
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| * | stm32: autogenerate mux config for all chips. | Dario Nieuwenhuis | 2024-03-01 | 1 | -4/+2 |
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| * | stm32: update metapac. | Dario Nieuwenhuis | 2024-02-26 | 1 | -0/+1 |
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| * | :facepalm: | Eli Orona | 2024-02-25 | 1 | -1/+1 |
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| * | Rust FMT | Eli Orona | 2024-02-25 | 1 | -1/+1 |
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| * | Add `pll1_p_mul_2` clock. | Eli Orona | 2024-02-25 | 1 | -0/+5 |
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| * | Move to internal mod and re-export the enums | Eli Orona | 2024-02-24 | 1 | -8/+6 |
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| * | Move to a single Mux Struct. | Eli Orona | 2024-02-20 | 1 | -6/+6 |
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| * | Move to auto-generated based system. | Eli Orona | 2024-02-16 | 1 | -215/+6 |
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| * | Update f013.rs | Eli Orona | 2024-02-16 | 1 | -5/+5 |
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| * | Fix build | Eli Orona | 2024-02-16 | 1 | -5/+5 |
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| * | Rustfmt | Eli Orona | 2024-02-16 | 1 | -9/+45 |
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| * | Update f013.rs | Eli Orona | 2024-02-16 | 1 | -18/+27 |
| | | | | Add stm32f398 | ||||
| * | Remove extraneous , in cfg | Eli Orona | 2024-02-15 | 1 | -8/+8 |
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| * | rustfmt | Eli Orona | 2024-02-15 | 1 | -14/+21 |
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| * | Clean up register setting | Eli Orona | 2024-02-15 | 1 | -95/+23 |
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| * | Fix cfg lines | Eli Orona | 2024-02-15 | 1 | -2/+3 |
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| * | Rust fmt and fix build. | Eli Orona | 2024-02-15 | 1 | -52/+45 |
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| * | I believe that this enables the PLL clock input to different TIMs for the ↵ | Eli Orona | 2024-02-15 | 1 | -0/+241 |
| | | | | | STM32F3xx Series of chips. | ||||
| * | stm32/rcc: unify f0, f1, f3. | Dario Nieuwenhuis | 2024-02-14 | 1 | -0/+448 |
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