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path: root/embassy-stm32/src/rcc/g0.rs
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* stm32: disable HSI48 if not in useBernát Süli2025-12-191-0/+6
* fixup! feat(stm32-g0): provide a `const` constructor on `rcc::Config`ROMemories2025-05-261-2/+0
* feat(stm32-g0): provide a `const` constructor on `rcc::Config`ROMemories2025-05-211-5/+12
* stm32: update metapac, cleanup clocks a bit.Dario Nieuwenhuis2025-04-181-2/+0
* stm32: run cargo fmttechmccat2025-03-281-1/+4
* stm32: allow using LSI/LSE as SYSCLK on g0/c0techmccat2025-03-281-2/+5
* stm32/rcc: add HSISYS support for g0Markus Kasten2025-01-171-11/+24
* Fix & RevertBing Wen2024-11-271-0/+1
* Add newBing Wen2024-11-271-22/+11
* Add new feature to enable overclockingBing Wen2024-11-261-5/+14
* Fix dma nvic issues on dual core linesAlexandros Liarokapis2024-08-171-0/+2
* stm32: ensure the core runs on HSI clock while setting up rccAurélien Jacobs2024-05-271-9/+16
* stm32/rcc: port g0 to new api.Dario Nieuwenhuis2024-03-041-254/+228
* stm32: autogenerate mux config for all chips.Dario Nieuwenhuis2024-03-011-49/+14
* stm32: update metapac.Dario Nieuwenhuis2024-02-261-0/+1
* stm32/rcc: unify naming sysclk field to `sys`, enum to `Sysclk`.Dario Nieuwenhuis2024-02-261-8/+8
* stm32: autogenerate clocks struct, enable mux for all chips.Dario Nieuwenhuis2024-02-021-8/+7
* stm32: Add G0 USB RCCDerek Hageman2024-01-051-1/+50
* additional chip variants required more clocksAdin Ackerman2024-01-021-0/+5
* fix g0 being left out of some clock controlsAdin Ackerman2024-01-021-4/+23
* stm32/rcc: Add support for HSE Oscillator in stm32g0Carlos Barrales Ruiz2023-12-041-7/+21
* stm32/rcc: consistent casing and naming for PLL enums.Dario Nieuwenhuis2023-11-131-7/+7
* stm32: rename HSI16 -> HSIDario Nieuwenhuis2023-10-221-10/+10
* rcc: ahb/apb -> hclk/pclkxoviat2023-10-151-5/+5
* stm32/rcc: add LSE/LSI to all chips, add RTC to more chips.Dario Nieuwenhuis2023-10-111-4/+6
* stm32/rcc: use more PLL etc enums from PAC.Dario Nieuwenhuis2023-10-111-32/+6
* stm32/rcc: use PLL enums from PAC.Dario Nieuwenhuis2023-10-091-129/+36
* stm32/rcc: convert bus prescalers to pac enumsxoviat2023-09-161-3/+3
* stm32/rcc: rename common to busxoviat2023-08-271-1/+1
* stm32/rcc: cleanup mergexoviat2023-07-301-1/+1
* stm32/rcc: extract and combine ahb/apb prescalersxoviat2023-07-301-69/+7
* Update stm32-metapac, includes chiptool changes to use real Rust enums now.Dario Nieuwenhuis2023-06-291-5/+5
* stm32: update stm32-metapac.Dario Nieuwenhuis2023-06-191-1/+1
* embassy-stm32: Simplify timeGrant Miller2022-07-101-6/+6
* Fix g0 rcc buildchemicstry2022-07-111-1/+1
* Refactor IWDG to use LSI frequency from RCCchemicstry2022-07-101-4/+4
* Run rustfmt.Dario Nieuwenhuis2022-06-121-2/+1
* embassy-stm32: g0: add PLL clock sourceWill Glynn2022-05-271-5/+280
* rustfmtDario Nieuwenhuis2022-03-041-1/+1
* Use new stm32-data registers and fix AHB clock calculationMatthew W. Samsonoff2022-03-041-41/+46
* Update stm32-dataDario Nieuwenhuis2022-02-141-3/+3
* stm32/rcc: remove Rcc struct, RccExt trait.Dario Nieuwenhuis2022-01-051-109/+58
* stm32/rcc: change family-specific code from dirs to single files.Dario Nieuwenhuis2022-01-041-0/+234
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