aboutsummaryrefslogtreecommitdiff
path: root/embassy-stm32/src/rcc
Commit message (Expand)AuthorAgeFilesLines
* low-power: stm32wl5xliebman2025-12-191-2/+2
* rustfmtBernát Süli2025-12-191-2/+2
* stm32: disable HSI48 if not in useBernát Süli2025-12-198-0/+63
* stm32: disable HSI if not usedBernát Süli2025-12-183-0/+15
* allow stm32wb to enter stop2xoviat2025-12-161-2/+2
* Source system clock from MSIS before (de)configuring PLLsgoodhoko2025-12-151-0/+10
* stm32: block stop2 for wle and misc fixesxoviat2025-12-151-2/+26
* wpan: allow setting Rfwkpselxoviat2025-12-131-1/+8
* Enable STM32N6 DMA and I2C clock sourcesLambert Sartory2025-12-111-0/+20
* low-power: use scoped block stopxoviat2025-12-081-0/+10
* low-power: rework stoppableperipheral traitsxoviat2025-12-061-1/+9
* low-power: improve debug logicxoviat2025-12-061-1/+1
* stm32: extract busychannel into common apixoviat2025-11-251-2/+66
* fmtxoviat2025-11-251-0/+4
* stm32: allow granular stop for uartxoviat2025-11-251-6/+33
* low power: store stop mode for dma channelsxoviat2025-11-211-21/+38
* low_power: misc cleanups and allow main macroxoviat2025-11-162-43/+4
* Merge branch 'main' into fix/adc-prescaler-calcxoviat2025-11-159-44/+1242
|\
| * cfg out unused itemseverdrone2025-11-111-2/+6
| * add docs for PinNumbereverdrone2025-11-111-0/+3
| * rustfmteverdrone2025-11-111-3/+9
| * Merge branch main into n6everdrone2025-11-119-29/+137
| |\
| | * stm32: add backup sram modxoviat2025-11-062-0/+29
| | * stm32wlex: init/restore timer config after STOP2liebman2025-11-031-0/+43
| | * rcc::reinit - only need RCC for the length of the callliebman2025-11-031-1/+1
| | * Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-068-18/+27
| * | enable peripherals low power modeeverdrone2025-11-111-0/+185
| * | Calculate RCC frequencieseverdrone2025-09-281-48/+211
| * | Use nicer names in N6 RCCeverdrone2025-09-271-44/+37
| * | Port RCC initialization from CMSIS HALeverdrone2025-09-271-90/+550
| * | Add clock initialization to N6everdrone2025-09-241-3/+219
| * | Add `cfg`s for N6 family in BDeverdrone2025-09-211-20/+82
| * | Use N6 registers for MCOxSEL and MCOxPREeverdrone2025-09-211-1/+3
| * | Add N6 family RCC configeverdrone2025-09-203-2/+25
* | | stm32: Add raw_prescaler function to make it more reusable.Piotr Esden-Tempski2025-10-051-0/+30
| |/ |/|
* | stm32: add config to MCO to control the drive strength.Daniel Nilsson2025-10-011-3/+20
* | stm32: update metapac, add L4+ to CI.Dario Nieuwenhuis2025-09-261-5/+5
* | Add support for USB CRS syncNarottam Royal2025-09-211-2/+12
|/
* stm32/afio: make af_num() unavailable in afio chips.Dario Nieuwenhuis2025-09-061-1/+1
* don't save and reset XSPI clock source; let mux config handle itRogan Morrow2025-08-291-12/+2
* set XSPI clock source to HSI and reset after clock init; dont reset SYSCFGRogan Morrow2025-08-291-1/+18
* Added vrefbuf driver.Gerzain Mata2025-08-101-1/+13
* Cargo fmtGerzain Mata2025-07-271-16/+17
* Merge branch 'main' into feat/stm32wba-rcc-pll-supportleftger2025-07-271-1/+42
|\
| * include proper pll divs/divt initializationRick Rogers2025-07-251-1/+33
| * address rustfmt ci checkRick Rogers2025-07-251-3/+3
| * Merge branch 'main' into h7rs-xspi-fixesRick Rogers2025-07-251-5/+160
| |\
| * | add pll divs/t for h7rsRick Rogers2025-07-241-0/+9
* | | Added changes based on PR reviewGerzain Mata2025-07-271-23/+4
* | | Added support for PLL as a clock source on STM32WBAGerzain Mata2025-07-251-10/+237
| |/ |/|
generated by cgit (git 2.34.1) at 2026-04-05 21:11:35 +0000