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path: root/embassy-stm32/src/timer/input_capture.rs
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* Merge branch 'main' into mainRaul Alimbekov2025-12-161-2/+3
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| * stm32: use typelevel timer typexoviat2025-11-271-1/+1
| * Add separate method for generating update event. Make sure values are loaded ...Jakob2025-11-151-0/+1
| * Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-1/+1
* | style: cargo fmtRaulIQ2025-10-021-1/+2
* | fix: correct DMA configuration and registers in receive_waveformRaulIQ2025-10-021-4/+7
* | add DMA-based input capture for timer channelsRaulIQ2025-09-301-0/+38
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* stm32/afio: make af_num() unavailable in afio chips.Dario Nieuwenhuis2025-09-061-1/+1
* stm32/afio: make the A generic param only appear in chips with AFIO.Dario Nieuwenhuis2025-09-051-9/+9
* stm32/afio: use type inference for timer remaps as well.Dario Nieuwenhuis2025-09-051-16/+9
* Add STM32F1 AFIO remapFabian Wolter2025-09-051-6/+15
* run cargo fmtmelvdl2025-06-271-1/+1
* stm32: rename timer channel trait; replace impls via macro with impls generic...melvdl2025-06-271-23/+18
* stm32: generify timer channelsmelvdl2025-06-261-37/+30
* Merge pull request #4044 from yodaldevoid/stm32-opm-timerDario Nieuwenhuis2025-04-061-9/+1
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| * stm32/timer: Merge channel typestate structsGabriel Smith2025-04-041-9/+1
* | Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-9/+6
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* chore: fix buildelagil2025-01-031-1/+1
* stm32/gpio: refactor AfTypeJan Špaček2024-06-161-5/+3
* undo changes in input_captureBruno Bousquet2024-05-301-6/+6
* create functions in inner to handle register modificationBruno Bousquet2024-05-301-15/+6
* pwm_input is working on F446Bruno Bousquet2024-05-291-25/+8
* undo minor changesBruno Bousquet2024-05-281-4/+10
* use timer LLBruno Bousquet2024-05-281-45/+7
* example is working nowBruno Bousquet2024-05-281-11/+52
* fix fmt for ciBruno Bousquet2024-05-061-2/+4
* add async captureBruno Bousquet2024-05-061-7/+93
* add get_input_interruptBruno Bousquet2024-05-051-0/+5
* formattingBruno Bousquet2024-05-051-1/+0
* create input_captureBruno Bousquet2024-05-051-0/+141