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* feat: Add spi support for STM32F1 variantsTobias Pisani2021-10-111-0/+0
* Bump stm32-dataMariusz Ryndzionek2021-09-281-0/+0
* Fix interface changesJoshua Salzedo2021-09-261-0/+0
* Update stm32-dataJoshua Salzedo2021-09-261-0/+0
* add latest stm32-dataVincent Stakenburg2021-09-241-0/+0
* Add pwr for L1 and update RCC to new reg blockUlf Lilleengen2021-09-231-0/+0
* Support for STM32L1Ulf Lilleengen2021-09-211-0/+0
* Add HAL for SubGhz peripheral for STM32 WL seriesUlf Lilleengen2021-09-021-0/+0
* Add STM32G0 examplesBen Gamari2021-08-201-0/+0
* stm32/metapac: check GPIO RCC regs are always found.Dario Nieuwenhuis2021-08-191-0/+0
* stm32/wl: add stub APB3 to get it to build.Dario Nieuwenhuis2021-08-191-0/+0
* Bump stm32-dataDario Nieuwenhuis2021-08-191-0/+0
* Add example for STM32WL55Ulf Lilleengen2021-08-171-0/+0
* Add H7 exti button example using correct EXTI reg block offsets.Bob McWhirter2021-08-161-0/+0
* Add IRQ-driven buffered USART implementation for STM32 v2 usart (#356)Ulf Lilleengen2021-08-161-0/+0
* Update to latest stm32-data.Bob McWhirter2021-08-021-0/+0
* Emit a default memory.x alongside device.x from metapac.Bob McWhirter2021-08-021-0/+0
* F4: Add PWR configuration to PLLThales Fragoso2021-07-291-0/+0
* Align with -data HEAD.Bob McWhirter2021-07-281-0/+0
* Update to new stm32-data with better multicore NVIC parsing.Bob McWhirter2021-07-271-0/+0
* Update data to include peripheral IRQs.Bob McWhirter2021-07-271-0/+0
* Update stm32-data.Bob McWhirter2021-07-261-0/+0
* stm32: Clear possible set flags after disabling DMAThales Fragoso2021-07-171-0/+0
* stm32/dma: update codegen+macrotables for new stm32-dataDario Nieuwenhuis2021-07-171-0/+0
* Prep for new stm32-data with dmamux differentiation, but not yet using.Bob McWhirter2021-07-161-0/+0
* Get DMA on H7 working, add usart_dma example for H7.Bob McWhirter2021-07-161-0/+0
* stm32/pwr: add initial H7 SMPS supportDario Nieuwenhuis2021-07-161-0/+0
* stm32/usart: merge v2 and v3 (they're identical)Dario Nieuwenhuis2021-07-151-0/+0
* Update data.Bob McWhirter2021-07-141-0/+0
* Update for stm32-data.Bob McWhirter2021-07-131-0/+0
* Adjust to DMA1EN in the rcc for l0.Bob McWhirter2021-07-131-0/+0
* Undo special-casing FOO1 -> FOO in RCC searching.Bob McWhirter2021-07-131-0/+0
* Update stm32-data.Bob McWhirter2021-07-131-0/+0
* Allow some unused lints given that H7 is still in flight with its multitude o...Bob McWhirter2021-07-131-0/+0
* Try to improve H7 clockstuff.Bob McWhirter2021-07-131-0/+0
* Mix dmamux into bdma_v1.Bob McWhirter2021-07-131-0/+0
* F0: Fix missing apb2 clockThales Fragoso2021-07-031-0/+0
* Remove the frequency argument for i2c, move to using RccPeripheral.Bob McWhirter2021-07-011-0/+0
* Update -data.Bob McWhirter2021-07-011-0/+0
* Make UART pins Rx/Tx/etc in addition to USART.Bob McWhirter2021-07-011-0/+0
* Add USARTv3 support.Bob McWhirter2021-07-011-0/+0
* stm32: Adjust some fences around DMAThales Fragoso2021-06-301-0/+0
* Generate dma-related macro tables.Bob McWhirter2021-06-291-0/+0
* Add F0 RCCThales Fragoso2021-06-241-0/+0
* Update stm32-data (adds DBGMCU to all chips)Dario Nieuwenhuis2021-06-211-0/+0
* Update submoduleUlf Lilleengen2021-06-161-0/+0
* Rename from wl55 to wl5x and enable debug wfeUlf Lilleengen2021-06-161-0/+0
* Add support for generating PAC for dual coresUlf Lilleengen2021-06-161-0/+0
* ADCv3 and example.Bob McWhirter2021-06-141-0/+0
* Initial support and example for STM32WB55Dominik Boehi2021-06-121-0/+0
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