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* stm32l1/rcc: set required flash bits for high frequenciesGreg V2022-01-141-0/+0
* Update stm32-data.Matous Hybl2022-01-141-0/+0
* stm32-metapac: remove stm32gbkDario Nieuwenhuis2022-01-131-0/+0
* stm32/rcc: remove Rcc struct, RccExt trait.Dario Nieuwenhuis2022-01-051-0/+0
* stm32/rcc: f4/f7 cleanup and make a bit more consistent.Dario Nieuwenhuis2022-01-041-0/+0
* Update stm32-dataDario Nieuwenhuis2022-01-011-0/+0
* Update stm32-data with f3 Timer reg changesVasanthakumarV2021-12-231-0/+0
* Update stm32-data.Dario Nieuwenhuis2021-12-161-0/+0
* stm32/usart: unify v1 and v2Dario Nieuwenhuis2021-12-081-0/+0
* Update stm32data refUlf Lilleengen2021-12-021-0/+0
* Update stm32-data: rcc regs info comes from yamls now.Dario Nieuwenhuis2021-11-291-0/+0
* stm32: add stm32g4 support.Dario Nieuwenhuis2021-11-271-0/+0
* Update to latest stm32-dataUlf Lilleengen2021-11-221-0/+0
* Update stm32-dataDario Nieuwenhuis2021-11-171-0/+0
* Update U5 to init RCC.Bob McWhirter2021-11-081-0/+0
* Update stm32-dataDario Nieuwenhuis2021-11-051-0/+0
* Fix v2 ethernet pin definitions. Fix ethernet example for H7 nucleos.Matous Hybl2021-11-041-0/+0
* Update stm32-data.Bob McWhirter2021-11-021-0/+0
* Adjust for STM32U5.Bob McWhirter2021-11-021-0/+0
* Update stm32-data to mainUlf Lilleengen2021-10-261-0/+0
* Initial support for STM32F767ZI.Matous Hybl2021-10-261-0/+0
* feat: Add spi support for STM32F1 variantsTobias Pisani2021-10-111-0/+0
* Bump stm32-dataMariusz Ryndzionek2021-09-281-0/+0
* Fix interface changesJoshua Salzedo2021-09-261-0/+0
* Update stm32-dataJoshua Salzedo2021-09-261-0/+0
* add latest stm32-dataVincent Stakenburg2021-09-241-0/+0
* Add pwr for L1 and update RCC to new reg blockUlf Lilleengen2021-09-231-0/+0
* Support for STM32L1Ulf Lilleengen2021-09-211-0/+0
* Add HAL for SubGhz peripheral for STM32 WL seriesUlf Lilleengen2021-09-021-0/+0
* Add STM32G0 examplesBen Gamari2021-08-201-0/+0
* stm32/metapac: check GPIO RCC regs are always found.Dario Nieuwenhuis2021-08-191-0/+0
* stm32/wl: add stub APB3 to get it to build.Dario Nieuwenhuis2021-08-191-0/+0
* Bump stm32-dataDario Nieuwenhuis2021-08-191-0/+0
* Add example for STM32WL55Ulf Lilleengen2021-08-171-0/+0
* Add H7 exti button example using correct EXTI reg block offsets.Bob McWhirter2021-08-161-0/+0
* Add IRQ-driven buffered USART implementation for STM32 v2 usart (#356)Ulf Lilleengen2021-08-161-0/+0
* Update to latest stm32-data.Bob McWhirter2021-08-021-0/+0
* Emit a default memory.x alongside device.x from metapac.Bob McWhirter2021-08-021-0/+0
* F4: Add PWR configuration to PLLThales Fragoso2021-07-291-0/+0
* Align with -data HEAD.Bob McWhirter2021-07-281-0/+0
* Update to new stm32-data with better multicore NVIC parsing.Bob McWhirter2021-07-271-0/+0
* Update data to include peripheral IRQs.Bob McWhirter2021-07-271-0/+0
* Update stm32-data.Bob McWhirter2021-07-261-0/+0
* stm32: Clear possible set flags after disabling DMAThales Fragoso2021-07-171-0/+0
* stm32/dma: update codegen+macrotables for new stm32-dataDario Nieuwenhuis2021-07-171-0/+0
* Prep for new stm32-data with dmamux differentiation, but not yet using.Bob McWhirter2021-07-161-0/+0
* Get DMA on H7 working, add usart_dma example for H7.Bob McWhirter2021-07-161-0/+0
* stm32/pwr: add initial H7 SMPS supportDario Nieuwenhuis2021-07-161-0/+0
* stm32/usart: merge v2 and v3 (they're identical)Dario Nieuwenhuis2021-07-151-0/+0
* Update data.Bob McWhirter2021-07-141-0/+0
generated by cgit (git 2.34.1) at 2026-04-07 21:11:07 +0000