aboutsummaryrefslogtreecommitdiff
path: root/examples/nrf52840/src/bin/qspi_lowpower.rs
blob: 22a5c0c6ddd587cd761afa04246357cb47677b7b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
#![no_std]
#![no_main]
#![feature(type_alias_impl_trait)]

use core::mem;

use defmt::{info, unwrap};
use embassy_executor::Spawner;
use embassy_nrf::qspi::Frequency;
use embassy_nrf::{bind_interrupts, peripherals, qspi};
use embassy_time::{Duration, Timer};
use {defmt_rtt as _, panic_probe as _};

// Workaround for alignment requirements.
// Nicer API will probably come in the future.
#[repr(C, align(4))]
struct AlignedBuf([u8; 64]);

bind_interrupts!(struct Irqs {
    QSPI => qspi::InterruptHandler<peripherals::QSPI>;
});

#[embassy_executor::main]
async fn main(_p: Spawner) {
    let mut p = embassy_nrf::init(Default::default());

    loop {
        // Config for the MX25R64 present in the nRF52840 DK
        let mut config = qspi::Config::default();
        config.capacity = 8 * 1024 * 1024; // 8 MB
        config.frequency = Frequency::M32;
        config.read_opcode = qspi::ReadOpcode::READ4IO;
        config.write_opcode = qspi::WriteOpcode::PP4IO;
        config.write_page_size = qspi::WritePageSize::_256BYTES;
        config.deep_power_down = Some(qspi::DeepPowerDownConfig {
            enter_time: 3, // tDP = 30uS
            exit_time: 3,  // tRDP = 35uS
        });

        let mut q = qspi::Qspi::new(
            &mut p.QSPI,
            Irqs,
            &mut p.P0_19,
            &mut p.P0_17,
            &mut p.P0_20,
            &mut p.P0_21,
            &mut p.P0_22,
            &mut p.P0_23,
            config,
        );

        let mut id = [1; 3];
        unwrap!(q.custom_instruction(0x9F, &[], &mut id).await);
        info!("id: {}", id);

        // Read status register
        let mut status = [4; 1];
        unwrap!(q.custom_instruction(0x05, &[], &mut status).await);

        info!("status: {:?}", status[0]);

        if status[0] & 0x40 == 0 {
            status[0] |= 0x40;

            unwrap!(q.custom_instruction(0x01, &status, &mut []).await);

            info!("enabled quad in status");
        }

        let mut buf = AlignedBuf([0u8; 64]);

        info!("reading...");
        unwrap!(q.read(0, &mut buf.0).await);
        info!("read: {=[u8]:x}", buf.0);

        // Drop the QSPI instance. This disables the peripehral and deconfigures the pins.
        // This clears the borrow on the singletons, so they can now be used again.
        mem::drop(q);

        // Sleep for 1 second. The executor ensures the core sleeps with a WFE when it has nothing to do.
        // During this sleep, the nRF chip should only use ~3uA
        Timer::after(Duration::from_secs(1)).await;
    }
}