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authorThales Fragoso <[email protected]>2021-07-15 13:25:51 -0300
committerThales Fragoso <[email protected]>2021-07-15 13:25:51 -0300
commit2f08c7ced56f855f75bb73cb4775c6379958b3f2 (patch)
tree1804ea1852e4b80526c34d07294a1c69d59103e3
parent8a172ac12325ddc382e5ac0ffa637120a166d057 (diff)
stm32: Allow for RccPeripheral without reset field
This fix build on F0, since it doesn't have DMARST. This change makes RccPeripheral::reset a no-op on peripherals where a reset field couldn't be found
-rw-r--r--embassy-stm32/src/bdma/mod.rs2
-rw-r--r--embassy-stm32/src/rcc/mod.rs29
-rw-r--r--stm32-metapac-gen/src/lib.rs70
3 files changed, 77 insertions, 24 deletions
diff --git a/embassy-stm32/src/bdma/mod.rs b/embassy-stm32/src/bdma/mod.rs
index 39e8bec3b..f57358f68 100644
--- a/embassy-stm32/src/bdma/mod.rs
+++ b/embassy-stm32/src/bdma/mod.rs
@@ -177,7 +177,7 @@ pub(crate) unsafe fn init() {
177 } 177 }
178 pac::peripherals! { 178 pac::peripherals! {
179 (bdma, $peri:ident) => { 179 (bdma, $peri:ident) => {
180 crate::peripherals::$peri::enable(); 180 <crate::peripherals::$peri as RccPeripheral>::enable();
181 }; 181 };
182 } 182 }
183} 183}
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index b7b692f15..c02db58fe 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -123,4 +123,33 @@ crate::pac::peripheral_rcc!(
123 123
124 impl RccPeripheral for peripherals::$inst {} 124 impl RccPeripheral for peripherals::$inst {}
125 }; 125 };
126 ($inst:ident, $clk:ident, $enable:ident, $perien:ident) => {
127 impl sealed::RccPeripheral for peripherals::$inst {
128 fn frequency() -> crate::time::Hertz {
129 critical_section::with(|_| {
130 unsafe {
131 let freqs = get_freqs();
132 freqs.$clk
133 }
134 })
135 }
136 fn enable() {
137 critical_section::with(|_| {
138 unsafe {
139 crate::pac::RCC.$enable().modify(|w| w.$perien(true));
140 }
141 })
142 }
143 fn disable() {
144 critical_section::with(|_| {
145 unsafe {
146 crate::pac::RCC.$enable().modify(|w| w.$perien(false));
147 }
148 })
149 }
150 fn reset() {}
151 }
152
153 impl RccPeripheral for peripherals::$inst {}
154 };
126); 155);
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs
index 37254f6f0..a9ee88002 100644
--- a/stm32-metapac-gen/src/lib.rs
+++ b/stm32-metapac-gen/src/lib.rs
@@ -142,18 +142,17 @@ macro_rules! peripheral_count {{
142} 142}
143 143
144fn make_dma_channel_counts(out: &mut String, data: &HashMap<String, u8>) { 144fn make_dma_channel_counts(out: &mut String, data: &HashMap<String, u8>) {
145 write!(out, 145 write!(
146 "#[macro_export] 146 out,
147 "#[macro_export]
147macro_rules! dma_channels_count {{ 148macro_rules! dma_channels_count {{
148 ").unwrap(); 149 "
150 )
151 .unwrap();
149 for (name, count) in data { 152 for (name, count) in data {
150 write!(out, 153 write!(out, "({}) => ({});\n", name, count,).unwrap();
151 "({}) => ({});\n",
152 name, count,
153 ).unwrap();
154 } 154 }
155 write!(out, 155 write!(out, " }}\n").unwrap();
156 " }}\n").unwrap();
157} 156}
158 157
159fn make_table(out: &mut String, name: &str, data: &Vec<Vec<String>>) { 158fn make_table(out: &mut String, name: &str, data: &Vec<Vec<String>>) {
@@ -409,11 +408,25 @@ pub fn gen(options: Options) {
409 if let Some(clock_prefix) = clock_prefix { 408 if let Some(clock_prefix) = clock_prefix {
410 // Workaround for clock registers being split on some chip families. Assume fields are 409 // Workaround for clock registers being split on some chip families. Assume fields are
411 // named after peripheral and look for first field matching and use that register. 410 // named after peripheral and look for first field matching and use that register.
412 let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); 411 let mut en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name));
413 let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); 412 let mut rst =
413 find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name));
414
415 if en.is_none() && name.ends_with("1") {
416 en = find_reg_for_field(
417 &rcc,
418 clock_prefix,
419 &format!("{}EN", &name[..name.len() - 1]),
420 );
421 rst = find_reg_for_field(
422 &rcc,
423 clock_prefix,
424 &format!("{}RST", &name[..name.len() - 1]),
425 );
426 }
414 427
415 match (en, rst) { 428 match (en, rst) {
416 (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => { 429 (Some((enable_reg, enable_field)), reset_reg_field) => {
417 let clock = if clock_prefix.is_empty() { 430 let clock = if clock_prefix.is_empty() {
418 let re = Regex::new("([A-Z]+\\d*).*").unwrap(); 431 let re = Regex::new("([A-Z]+\\d*).*").unwrap();
419 if !re.is_match(enable_reg) { 432 if !re.is_match(enable_reg) {
@@ -436,22 +449,33 @@ pub fn gen(options: Options) {
436 }; 449 };
437 450
438 if !name.starts_with("GPIO") { 451 if !name.starts_with("GPIO") {
439 peripheral_rcc_table.push(vec![ 452 let mut row = Vec::with_capacity(6);
440 name.clone(), 453 row.push(name.clone());
441 clock, 454 row.push(clock);
442 enable_reg.to_ascii_lowercase(), 455 row.push(enable_reg.to_ascii_lowercase());
443 reset_reg.to_ascii_lowercase(), 456
444 format!("set_{}", enable_field.to_ascii_lowercase()), 457 if let Some((reset_reg, reset_field)) = reset_reg_field {
445 format!("set_{}", reset_field.to_ascii_lowercase()), 458 row.push(reset_reg.to_ascii_lowercase());
446 ]); 459 row.push(format!(
460 "set_{}",
461 enable_field.to_ascii_lowercase()
462 ));
463 row.push(format!(
464 "set_{}",
465 reset_field.to_ascii_lowercase()
466 ));
467 } else {
468 row.push(format!(
469 "set_{}",
470 enable_field.to_ascii_lowercase()
471 ));
472 }
473 peripheral_rcc_table.push(row);
447 } 474 }
448 } 475 }
449 (None, Some(_)) => { 476 (None, Some(_)) => {
450 print!("Unable to find enable register for {}", name) 477 print!("Unable to find enable register for {}", name)
451 } 478 }
452 (Some(_), None) => {
453 print!("Unable to find reset register for {}", name)
454 }
455 (None, None) => { 479 (None, None) => {
456 print!("Unable to find enable and reset register for {}", name) 480 print!("Unable to find enable and reset register for {}", name)
457 } 481 }