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authorxoviat <[email protected]>2023-09-28 15:48:46 -0500
committerxoviat <[email protected]>2023-09-28 15:48:46 -0500
commit322a4a8401480de8d51fa85ac6cedfabd033c743 (patch)
treed34b4d4c516d17f22c72f35ed763ff133cd57df0
parent20ea76c19c709abf652b9a044292eb26fd656223 (diff)
stm32/hrtim: move traits out of macro def'n
Diffstat
-rw-r--r--embassy-stm32/src/hrtim/traits.rs148
1 files changed, 67 insertions, 81 deletions
diff --git a/embassy-stm32/src/hrtim/traits.rs b/embassy-stm32/src/hrtim/traits.rs
index 37cfb9b90..34a363a1f 100644
--- a/embassy-stm32/src/hrtim/traits.rs
+++ b/embassy-stm32/src/hrtim/traits.rs
@@ -78,12 +78,76 @@ pub(crate) mod sealed {
78 pub trait Instance: RccPeripheral { 78 pub trait Instance: RccPeripheral {
79 fn regs() -> crate::pac::hrtim::Hrtim; 79 fn regs() -> crate::pac::hrtim::Hrtim;
80 80
81 fn set_master_frequency(frequency: Hertz); 81 fn set_master_frequency(frequency: Hertz) {
82 let f = frequency.0;
83 #[cfg(not(stm32f334))]
84 let timer_f = Self::frequency().0;
85 #[cfg(stm32f334)]
86 let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(Self::frequency()).0;
87
88 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
89 let psc = if Self::regs().isr().read().dllrdy() {
90 Prescaler::compute_min_high_res(psc_min)
91 } else {
92 Prescaler::compute_min_low_res(psc_min)
93 };
94
95 let timer_f = 32 * (timer_f / psc as u32);
96 let per: u16 = (timer_f / f) as u16;
97
98 let regs = Self::regs();
99
100 regs.mcr().modify(|w| w.set_ckpsc(psc.into()));
101 regs.mper().modify(|w| w.set_mper(per));
102 }
103
104 fn set_channel_frequency(channel: usize, frequency: Hertz) {
105 let f = frequency.0;
106 #[cfg(not(stm32f334))]
107 let timer_f = Self::frequency().0;
108 #[cfg(stm32f334)]
109 let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(Self::frequency()).0;
110
111 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
112 let psc = if Self::regs().isr().read().dllrdy() {
113 Prescaler::compute_min_high_res(psc_min)
114 } else {
115 Prescaler::compute_min_low_res(psc_min)
116 };
82 117
83 fn set_channel_frequency(channnel: usize, frequency: Hertz); 118 let timer_f = 32 * (timer_f / psc as u32);
119 let per: u16 = (timer_f / f) as u16;
120
121 let regs = Self::regs();
122
123 regs.tim(channel).cr().modify(|w| w.set_ckpsc(psc.into()));
124 regs.tim(channel).per().modify(|w| w.set_per(per));
125 }
84 126
85 /// Set the dead time as a proportion of max_duty 127 /// Set the dead time as a proportion of max_duty
86 fn set_channel_dead_time(channnel: usize, dead_time: u16); 128
129 fn set_channel_dead_time(channel: usize, dead_time: u16) {
130 let regs = Self::regs();
131
132 let channel_psc: Prescaler = regs.tim(channel).cr().read().ckpsc().into();
133
134 // The dead-time base clock runs 4 times slower than the hrtim base clock
135 // u9::MAX = 511
136 let psc_min = (channel_psc as u32 * dead_time as u32) / (4 * 511);
137 let psc = if Self::regs().isr().read().dllrdy() {
138 Prescaler::compute_min_high_res(psc_min)
139 } else {
140 Prescaler::compute_min_low_res(psc_min)
141 };
142
143 let dt_val = (psc as u32 * dead_time as u32) / (4 * channel_psc as u32);
144
145 regs.tim(channel).dt().modify(|w| {
146 w.set_dtprsc(psc.into());
147 w.set_dtf(dt_val as u16);
148 w.set_dtr(dt_val as u16);
149 });
150 }
87 151
88 // fn enable_outputs(enable: bool); 152 // fn enable_outputs(enable: bool);
89 // 153 //
@@ -99,84 +163,6 @@ foreach_interrupt! {
99 fn regs() -> crate::pac::hrtim::Hrtim { 163 fn regs() -> crate::pac::hrtim::Hrtim {
100 crate::pac::$inst 164 crate::pac::$inst
101 } 165 }
102
103 fn set_master_frequency(frequency: Hertz) {
104 use crate::rcc::sealed::RccPeripheral;
105
106 let f = frequency.0;
107 #[cfg(not(stm32f334))]
108 let timer_f = Self::frequency().0;
109 #[cfg(stm32f334)]
110 let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(
111 Self::frequency()
112 ).0;
113
114 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
115 let psc = if Self::regs().isr().read().dllrdy() {
116 Prescaler::compute_min_high_res(psc_min)
117 } else {
118 Prescaler::compute_min_low_res(psc_min)
119 };
120
121 let timer_f = 32 * (timer_f / psc as u32);
122 let per: u16 = (timer_f / f) as u16;
123
124 let regs = Self::regs();
125
126 regs.mcr().modify(|w| w.set_ckpsc(psc.into()));
127 regs.mper().modify(|w| w.set_mper(per));
128 }
129
130 fn set_channel_frequency(channel: usize, frequency: Hertz) {
131 use crate::rcc::sealed::RccPeripheral;
132
133 let f = frequency.0;
134 #[cfg(not(stm32f334))]
135 let timer_f = Self::frequency().0;
136 #[cfg(stm32f334)]
137 let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(
138 Self::frequency()
139 ).0;
140
141 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
142 let psc = if Self::regs().isr().read().dllrdy() {
143 Prescaler::compute_min_high_res(psc_min)
144 } else {
145 Prescaler::compute_min_low_res(psc_min)
146 };
147
148 let timer_f = 32 * (timer_f / psc as u32);
149 let per: u16 = (timer_f / f) as u16;
150
151 let regs = Self::regs();
152
153 regs.tim(channel).cr().modify(|w| w.set_ckpsc(psc.into()));
154 regs.tim(channel).per().modify(|w| w.set_per(per));
155 }
156
157 fn set_channel_dead_time(channel: usize, dead_time: u16) {
158
159 let regs = Self::regs();
160
161 let channel_psc: Prescaler = regs.tim(channel).cr().read().ckpsc().into();
162
163 // The dead-time base clock runs 4 times slower than the hrtim base clock
164 // u9::MAX = 511
165 let psc_min = (channel_psc as u32 * dead_time as u32) / (4 * 511);
166 let psc = if Self::regs().isr().read().dllrdy() {
167 Prescaler::compute_min_high_res(psc_min)
168 } else {
169 Prescaler::compute_min_low_res(psc_min)
170 };
171
172 let dt_val = (psc as u32 * dead_time as u32) / (4 * channel_psc as u32);
173
174 regs.tim(channel).dt().modify(|w| {
175 w.set_dtprsc(psc.into());
176 w.set_dtf(dt_val as u16);
177 w.set_dtr(dt_val as u16);
178 });
179 }
180 } 166 }
181 167
182 impl Instance for crate::peripherals::$inst { 168 impl Instance for crate::peripherals::$inst {
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