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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2022-03-09 02:35:56 +0000
committerGitHub <[email protected]>2022-03-09 02:35:56 +0000
commit828cdb295183b8733ec636a80e0d35e6f8e41827 (patch)
treebb62fc47469e89e72e588831bd29ebd614d21f9c
parent13247897b06e4abce8b76b7fa9a545b859cf80b6 (diff)
parent77841a4676bbcee6fde3fe5a3837b027fbfc7003 (diff)
Merge #647
647: Stm32 dma error handling r=Dirbaio a=Dirbaio Co-authored-by: Dario Nieuwenhuis <[email protected]>
-rw-r--r--embassy-stm32/src/dma/bdma.rs6
-rw-r--r--embassy-stm32/src/dma/dma.rs6
2 files changed, 12 insertions, 0 deletions
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index ec557da30..79b114e6a 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -238,6 +238,12 @@ mod low_level_api {
238 let isr = dma.isr().read(); 238 let isr = dma.isr().read();
239 let cr = dma.ch(channel_num).cr(); 239 let cr = dma.ch(channel_num).cr();
240 240
241 if isr.teif(channel_num) {
242 panic!(
243 "DMA: error on BDMA@{:08x} channel {}",
244 dma.0 as u32, channel_num
245 );
246 }
241 if isr.tcif(channel_num) && cr.read().tcie() { 247 if isr.tcif(channel_num) && cr.read().tcie() {
242 cr.write(|_| ()); // Disable channel interrupts with the default value. 248 cr.write(|_| ()); // Disable channel interrupts with the default value.
243 STATE.ch_wakers[index].wake(); 249 STATE.ch_wakers[index].wake();
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 9ef7e4288..9f88c1141 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -239,6 +239,12 @@ mod low_level_api {
239 let cr = dma.st(channel_num).cr(); 239 let cr = dma.st(channel_num).cr();
240 let isr = dma.isr(channel_num / 4).read(); 240 let isr = dma.isr(channel_num / 4).read();
241 241
242 if isr.teif(channel_num % 4) {
243 panic!(
244 "DMA: error on DMA@{:08x} channel {}",
245 dma.0 as u32, channel_num
246 );
247 }
242 if isr.tcif(channel_num % 4) && cr.read().tcie() { 248 if isr.tcif(channel_num % 4) && cr.read().tcie() {
243 cr.write(|_| ()); // Disable channel interrupts with the default value. 249 cr.write(|_| ()); // Disable channel interrupts with the default value.
244 STATE.ch_wakers[index].wake(); 250 STATE.ch_wakers[index].wake();