2 files changed, 12 insertions, 0 deletions

diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index ec557da30..79b114e6a 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -238,6 +238,12 @@ mod low_level_api {
         let isr = dma.isr().read();
         let cr = dma.ch(channel_num).cr();
 
+        if isr.teif(channel_num) {
+            panic!(
+                "DMA: error on BDMA@{:08x} channel {}",
+                dma.0 as u32, channel_num
+            );
+        }
         if isr.tcif(channel_num) && cr.read().tcie() {
             cr.write(|_| ()); // Disable channel interrupts with the default value.
             STATE.ch_wakers[index].wake();
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 9ef7e4288..9f88c1141 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -239,6 +239,12 @@ mod low_level_api {
         let cr = dma.st(channel_num).cr();
         let isr = dma.isr(channel_num / 4).read();
 
+        if isr.teif(channel_num % 4) {
+            panic!(
+                "DMA: error on DMA@{:08x} channel {}",
+                dma.0 as u32, channel_num
+            );
+        }
         if isr.tcif(channel_num % 4) && cr.read().tcie() {
             cr.write(|_| ()); // Disable channel interrupts with the default value.
             STATE.ch_wakers[index].wake();