diff options
| author | David Lenfesty <[email protected]> | 2022-04-25 19:47:40 -0600 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2022-04-30 04:49:24 +0200 |
| commit | 905b40e212e794895824906cffaf9df9b9900dd3 (patch) | |
| tree | e12c8db72d235b5ccb439cf33c28497caf288de5 | |
| parent | 0d2ef1099b67d92586099966450d8f4db19e72a4 (diff) | |
embassy-stm32/eth/v1a: configure pins correctly for f107
v1a works correctly!
| -rw-r--r-- | embassy-stm32/src/eth/v1a/mod.rs | 30 |
1 files changed, 21 insertions, 9 deletions
diff --git a/embassy-stm32/src/eth/v1a/mod.rs b/embassy-stm32/src/eth/v1a/mod.rs index 361a8f0ed..27288d562 100644 --- a/embassy-stm32/src/eth/v1a/mod.rs +++ b/embassy-stm32/src/eth/v1a/mod.rs | |||
| @@ -42,13 +42,24 @@ pub struct Ethernet<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> { | |||
| 42 | mac_addr: [u8; 6], | 42 | mac_addr: [u8; 6], |
| 43 | } | 43 | } |
| 44 | 44 | ||
| 45 | macro_rules! config_pins { | 45 | macro_rules! config_in_pins { |
| 46 | ($($pin:ident),*) => { | 46 | ($($pin:ident),*) => { |
| 47 | // NOTE(unsafe) Exclusive access to the registers | 47 | // NOTE(unsafe) Exclusive access to the registers |
| 48 | critical_section::with(|_| { | 48 | critical_section::with(|_| { |
| 49 | $( | 49 | $( |
| 50 | // TODO double check to ensure speed set *isn't required. This call *seems* to set | 50 | // TODO properly create a set_as_input function |
| 51 | // GPIO to max speed. | 51 | $pin.set_as_af($pin.af_num(), AFType::Input); |
| 52 | )* | ||
| 53 | }) | ||
| 54 | } | ||
| 55 | } | ||
| 56 | |||
| 57 | macro_rules! config_af_pins { | ||
| 58 | ($($pin:ident),*) => { | ||
| 59 | // NOTE(unsafe) Exclusive access to the registers | ||
| 60 | critical_section::with(|_| { | ||
| 61 | $( | ||
| 62 | // We are lucky here, this configures to max speed (50MHz) | ||
| 52 | $pin.set_as_af($pin.af_num(), AFType::OutputPushPull); | 63 | $pin.set_as_af($pin.af_num(), AFType::OutputPushPull); |
| 53 | )* | 64 | )* |
| 54 | }) | 65 | }) |
| @@ -80,19 +91,20 @@ impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Ethernet<'d, T, | |||
| 80 | // NOTE(unsafe) We have exclusive access to the registers | 91 | // NOTE(unsafe) We have exclusive access to the registers |
| 81 | critical_section::with(|_| { | 92 | critical_section::with(|_| { |
| 82 | RCC.apb2enr().modify(|w| w.set_afioen(true)); | 93 | RCC.apb2enr().modify(|w| w.set_afioen(true)); |
| 94 | |||
| 95 | // Select RMII (Reduced Media Independent Interface) | ||
| 96 | // Must be done prior to enabling peripheral clock | ||
| 97 | AFIO.mapr().modify(|w| w.set_mii_rmii_sel(true)); | ||
| 98 | |||
| 83 | RCC.ahbenr().modify(|w| { | 99 | RCC.ahbenr().modify(|w| { |
| 84 | w.set_ethmacen(true); | 100 | w.set_ethmacen(true); |
| 85 | w.set_ethmactxen(true); | 101 | w.set_ethmactxen(true); |
| 86 | w.set_ethmacrxen(true); | 102 | w.set_ethmacrxen(true); |
| 87 | }); | 103 | }); |
| 88 | |||
| 89 | // Select RMII (Reduced Media Independent Interface) | ||
| 90 | AFIO.mapr().modify(|w| w.set_mii_rmii_sel(true)); | ||
| 91 | |||
| 92 | // TODO set MCO to eth clk | ||
| 93 | }); | 104 | }); |
| 94 | 105 | ||
| 95 | config_pins!(ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en); | 106 | config_in_pins!(ref_clk, rx_d0, rx_d1); |
| 107 | config_af_pins!(mdio, mdc, tx_d0, tx_d1, tx_en); | ||
| 96 | 108 | ||
| 97 | // NOTE(unsafe) We are ourselves not leak-safe. | 109 | // NOTE(unsafe) We are ourselves not leak-safe. |
| 98 | let state = PeripheralMutex::new_unchecked(interrupt, &mut state.0, || Inner::new(peri)); | 110 | let state = PeripheralMutex::new_unchecked(interrupt, &mut state.0, || Inner::new(peri)); |
