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authoreverdrone <[email protected]>2025-11-11 17:00:41 +0100
committereverdrone <[email protected]>2025-11-11 17:00:41 +0100
commit94c4cd8500b131bbfb0ed22176c35dc4df5ff009 (patch)
treed42ce0ef8fcca3d654566e6d83eee8978435e664
parent6e7855d84e3bfd724ac0eacc20db34c1eee0761b (diff)
cfg out unused items
-rw-r--r--embassy-stm32/src/dma/gpdma/mod.rs1
-rw-r--r--embassy-stm32/src/dma/mod.rs4
-rw-r--r--embassy-stm32/src/lib.rs2
-rw-r--r--embassy-stm32/src/rcc/bd.rs8
-rw-r--r--embassy-stm32/src/ucpd.rs3
5 files changed, 14 insertions, 4 deletions
diff --git a/embassy-stm32/src/dma/gpdma/mod.rs b/embassy-stm32/src/dma/gpdma/mod.rs
index 3e117c331..106558d20 100644
--- a/embassy-stm32/src/dma/gpdma/mod.rs
+++ b/embassy-stm32/src/dma/gpdma/mod.rs
@@ -136,6 +136,7 @@ pub(crate) unsafe fn init(cs: critical_section::CriticalSection, irq_priority: c
136 136
137impl AnyChannel { 137impl AnyChannel {
138 /// Safety: Must be called with a matching set of parameters for a valid dma channel 138 /// Safety: Must be called with a matching set of parameters for a valid dma channel
139 #[cfg(not(stm32n6))]
139 pub(crate) unsafe fn on_irq(&self) { 140 pub(crate) unsafe fn on_irq(&self) {
140 let info = self.info(); 141 let info = self.info();
141 #[cfg(feature = "_dual-core")] 142 #[cfg(feature = "_dual-core")]
diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs
index 297fa3674..de7a2c175 100644
--- a/embassy-stm32/src/dma/mod.rs
+++ b/embassy-stm32/src/dma/mod.rs
@@ -46,9 +46,11 @@ pub type Request = u8;
46pub type Request = (); 46pub type Request = ();
47 47
48pub(crate) trait SealedChannel { 48pub(crate) trait SealedChannel {
49 #[cfg(not(stm32n6))]
49 fn id(&self) -> u8; 50 fn id(&self) -> u8;
50} 51}
51 52
53#[cfg(not(stm32n6))]
52pub(crate) trait ChannelInterrupt { 54pub(crate) trait ChannelInterrupt {
53 #[cfg_attr(not(feature = "rt"), allow(unused))] 55 #[cfg_attr(not(feature = "rt"), allow(unused))]
54 unsafe fn on_irq(); 56 unsafe fn on_irq();
@@ -58,6 +60,7 @@ pub(crate) trait ChannelInterrupt {
58#[allow(private_bounds)] 60#[allow(private_bounds)]
59pub trait Channel: SealedChannel + PeripheralType + Into<AnyChannel> + 'static {} 61pub trait Channel: SealedChannel + PeripheralType + Into<AnyChannel> + 'static {}
60 62
63#[cfg(not(stm32n6))]
61macro_rules! dma_channel_impl { 64macro_rules! dma_channel_impl {
62 ($channel_peri:ident, $index:expr) => { 65 ($channel_peri:ident, $index:expr) => {
63 impl crate::dma::SealedChannel for crate::peripherals::$channel_peri { 66 impl crate::dma::SealedChannel for crate::peripherals::$channel_peri {
@@ -96,6 +99,7 @@ impl AnyChannel {
96} 99}
97 100
98impl SealedChannel for AnyChannel { 101impl SealedChannel for AnyChannel {
102 #[cfg(not(stm32n6))]
99 fn id(&self) -> u8 { 103 fn id(&self) -> u8 {
100 self.id 104 self.id
101 } 105 }
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 5b338a28b..680edf433 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -615,7 +615,7 @@ fn init_hw(config: Config) -> Peripherals {
615 #[cfg(ucpd)] 615 #[cfg(ucpd)]
616 ucpd::init( 616 ucpd::init(
617 cs, 617 cs,
618 #[cfg(peri_ucpd1)] 618 #[cfg(all(peri_ucpd1, not(stm32n6)))]
619 config.enable_ucpd1_dead_battery, 619 config.enable_ucpd1_dead_battery,
620 #[cfg(peri_ucpd2)] 620 #[cfg(peri_ucpd2)]
621 config.enable_ucpd2_dead_battery, 621 config.enable_ucpd2_dead_battery,
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index 9cad03227..219be208f 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -1,5 +1,7 @@
1#[cfg(not(stm32n6))]
1use core::sync::atomic::{Ordering, compiler_fence}; 2use core::sync::atomic::{Ordering, compiler_fence};
2 3
4#[cfg(not(stm32n6))]
3use crate::pac::common::{RW, Reg}; 5use crate::pac::common::{RW, Reg};
4#[cfg(backup_sram)] 6#[cfg(backup_sram)]
5use crate::pac::pwr::vals::Retention; 7use crate::pac::pwr::vals::Retention;
@@ -54,7 +56,7 @@ impl From<LseDrive> for crate::pac::rcc::vals::Lsedrv {
54 } 56 }
55} 57}
56 58
57#[cfg(not(any(rtc_v2_l0, rtc_v2_l1, stm32c0)))] 59#[cfg(not(any(rtc_v2_l0, rtc_v2_l1, stm32c0, stm32n6)))]
58type Bdcr = crate::pac::rcc::regs::Bdcr; 60type Bdcr = crate::pac::rcc::regs::Bdcr;
59#[cfg(any(rtc_v2_l0, rtc_v2_l1))] 61#[cfg(any(rtc_v2_l0, rtc_v2_l1))]
60type Bdcr = crate::pac::rcc::regs::Csr; 62type Bdcr = crate::pac::rcc::regs::Csr;
@@ -64,7 +66,7 @@ type Bdcr = crate::pac::rcc::regs::Csr1;
64#[cfg(any(stm32c0))] 66#[cfg(any(stm32c0))]
65fn unlock() {} 67fn unlock() {}
66 68
67#[cfg(not(any(stm32c0)))] 69#[cfg(not(any(stm32c0, stm32n6)))]
68fn unlock() { 70fn unlock() {
69 #[cfg(any(stm32f0, stm32f1, stm32f2, stm32f3, stm32l0, stm32l1))] 71 #[cfg(any(stm32f0, stm32f1, stm32f2, stm32f3, stm32l0, stm32l1))]
70 let cr = crate::pac::PWR.cr(); 72 let cr = crate::pac::PWR.cr();
@@ -79,6 +81,7 @@ fn unlock() {
79 while !cr.read().dbp() {} 81 while !cr.read().dbp() {}
80} 82}
81 83
84#[cfg(not(stm32n6))]
82fn bdcr() -> Reg<Bdcr, RW> { 85fn bdcr() -> Reg<Bdcr, RW> {
83 #[cfg(any(rtc_v2_l0, rtc_v2_l1))] 86 #[cfg(any(rtc_v2_l0, rtc_v2_l1))]
84 return crate::pac::RCC.csr(); 87 return crate::pac::RCC.csr();
@@ -152,6 +155,7 @@ impl Default for LsConfig {
152} 155}
153 156
154impl LsConfig { 157impl LsConfig {
158 #[cfg(not(stm32n6))]
155 pub(crate) fn init(&self) -> Option<Hertz> { 159 pub(crate) fn init(&self) -> Option<Hertz> {
156 let rtc_clk = match self.rtc { 160 let rtc_clk = match self.rtc {
157 RtcClockSource::LSI => { 161 RtcClockSource::LSI => {
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs
index 8f259a917..ae86d28f0 100644
--- a/embassy-stm32/src/ucpd.rs
+++ b/embassy-stm32/src/ucpd.rs
@@ -32,7 +32,7 @@ use crate::{Peri, interrupt};
32 32
33pub(crate) fn init( 33pub(crate) fn init(
34 _cs: critical_section::CriticalSection, 34 _cs: critical_section::CriticalSection,
35 #[cfg(peri_ucpd1)] ucpd1_db_enable: bool, 35 #[cfg(all(peri_ucpd1, not(stm32n6)))] ucpd1_db_enable: bool,
36 #[cfg(peri_ucpd2)] ucpd2_db_enable: bool, 36 #[cfg(peri_ucpd2)] ucpd2_db_enable: bool,
37) { 37) {
38 #[cfg(stm32g0x1)] 38 #[cfg(stm32g0x1)]
@@ -349,6 +349,7 @@ impl<'d, T: Instance> CcPhy<'d, T> {
349 critical_section::with(|cs| { 349 critical_section::with(|cs| {
350 init( 350 init(
351 cs, 351 cs,
352 #[cfg(not(stm32n6))]
352 false, 353 false,
353 #[cfg(peri_ucpd2)] 354 #[cfg(peri_ucpd2)]
354 false, 355 false,