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authorxoviat <[email protected]>2023-09-15 17:36:21 -0500
committerxoviat <[email protected]>2023-09-15 17:36:21 -0500
commitaa2fa29b89c120ec23d64252d3f1b036c1369b00 (patch)
tree97baf32737e2a2121fbe991337eee1083725d96e
parentc28a6bdd0b6cde56c5b1b40a4c57d9b31e05d531 (diff)
stm32: fix adc f3 startup time
closes #1888.
-rw-r--r--embassy-stm32/src/adc/f3.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs
index 2971ad527..b39d6ac8e 100644
--- a/embassy-stm32/src/adc/f3.rs
+++ b/embassy-stm32/src/adc/f3.rs
@@ -50,7 +50,7 @@ impl<'d, T: Instance> Adc<'d, T> {
50 while T::regs().cr().read().adcal() {} 50 while T::regs().cr().read().adcal() {}
51 51
52 // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223) 52 // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223)
53 delay.delay_us(6 * 1_000_000 / Self::freq().0); 53 delay.delay_us(1 + (6 * 1_000_000 / Self::freq().0));
54 54
55 // Enable the adc 55 // Enable the adc
56 T::regs().cr().modify(|w| w.set_aden(true)); 56 T::regs().cr().modify(|w| w.set_aden(true));