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-rw-r--r--embassy-stm32/src/adc/f3.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs
index 2971ad527..b39d6ac8e 100644
--- a/embassy-stm32/src/adc/f3.rs
+++ b/embassy-stm32/src/adc/f3.rs
@@ -50,7 +50,7 @@ impl<'d, T: Instance> Adc<'d, T> {
50 while T::regs().cr().read().adcal() {} 50 while T::regs().cr().read().adcal() {}
51 51
52 // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223) 52 // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223)
53 delay.delay_us(6 * 1_000_000 / Self::freq().0); 53 delay.delay_us(1 + (6 * 1_000_000 / Self::freq().0));
54 54
55 // Enable the adc 55 // Enable the adc
56 T::regs().cr().modify(|w| w.set_aden(true)); 56 T::regs().cr().modify(|w| w.set_aden(true));