Delay setting TX buffer mode until user had a chance to configure it.

2 files changed, 9 insertions, 7 deletions

diff --git a/embassy-stm32/src/can/fd/config.rs b/embassy-stm32/src/can/fd/config.rs
index 338e4979d..adaffe9cc 100644
--- a/embassy-stm32/src/can/fd/config.rs
+++ b/embassy-stm32/src/can/fd/config.rs
@@ -290,9 +290,9 @@ impl Default for GlobalFilter {
 /// TX buffer operation mode
 #[derive(Clone, Copy, PartialEq, Eq, Debug)]
 pub enum TxBufferMode {
-    /// TX FIFO operation
+    /// TX FIFO operation - In this mode CAN frames are trasmitted strictly in write order.
     Fifo,
-    /// TX queue operation
+    /// TX queue operation - In this mode CAN frames are transmitted according to CAN priority.
     Queue,
 }
 
diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs
index 3a95b2659..f0aab132b 100644
--- a/embassy-stm32/src/can/fd/peripheral.rs
+++ b/embassy-stm32/src/can/fd/peripheral.rs
@@ -307,11 +307,6 @@ impl Registers {
             "Error reading endianness test value from FDCAN core"
         );
 
-        // Framework specific settings are set here
-
-        // set TxBuffer Mode
-        self.regs.txbc().write(|w| w.set_tfqm(_config.tx_buffer_mode.into()));
-
         // set standard filters list size to 28
         // set extended filters list size to 8
         // REQUIRED: we use the memory map as if these settings are set
@@ -357,6 +352,7 @@ impl Registers {
     /// Applies the settings of a new FdCanConfig See [`FdCanConfig`]
     #[inline]
     pub fn apply_config(&mut self, config: FdCanConfig) {
+        self.set_tx_buffer_mode(config.tx_buffer_mode);
         self.set_data_bit_timing(config.dbtr);
         self.set_nominal_bit_timing(config.nbtr);
         self.set_automatic_retransmit(config.automatic_retransmit);
@@ -504,6 +500,12 @@ impl Registers {
         self.regs.cccr().modify(|w| w.set_efbi(enabled));
     }
 
+    /// Configures TX Buffer Mode
+    #[inline]
+    pub fn set_tx_buffer_mode(&mut self, tbm: TxBufferMode) {
+        self.regs.txbc().write(|w| w.set_tfqm(tbm.into()));
+    }
+
     /// Configures frame transmission mode. See
     /// [`FdCanConfig::set_frame_transmit`]
     #[inline]