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authorxoviat <[email protected]>2025-11-25 16:38:43 +0000
committerGitHub <[email protected]>2025-11-25 16:38:43 +0000
commitc0c142d7c8c2a695cccf3bca5e153692fe9ec7cf (patch)
tree4bae50c0f382a26286f8deacef5cb103d40de83d
parente930b262df45599d1a7cb4e50e0e8b03dd101dda (diff)
parent454c6276507999b49f2dea6bb6abdae48d495713 (diff)
Merge pull request #4932 from xoviat/lp-dma
remove devicebusy from lp i2c on wle
-rw-r--r--embassy-stm32/src/i2c/v2.rs11
1 files changed, 0 insertions, 11 deletions
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 61e550ad4..b2ba94e21 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -1075,8 +1075,6 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
1075 1075
1076 /// Write. 1076 /// Write.
1077 pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> { 1077 pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> {
1078 #[cfg(all(feature = "low-power", stm32wlex))]
1079 let _device_busy = crate::low_power::DeviceBusy::new_stop1();
1080 let timeout = self.timeout(); 1078 let timeout = self.timeout();
1081 if write.is_empty() { 1079 if write.is_empty() {
1082 self.write_internal(address.into(), write, true, timeout) 1080 self.write_internal(address.into(), write, true, timeout)
@@ -1091,8 +1089,6 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
1091 /// 1089 ///
1092 /// The buffers are concatenated in a single write transaction. 1090 /// The buffers are concatenated in a single write transaction.
1093 pub async fn write_vectored(&mut self, address: Address, write: &[&[u8]]) -> Result<(), Error> { 1091 pub async fn write_vectored(&mut self, address: Address, write: &[&[u8]]) -> Result<(), Error> {
1094 #[cfg(all(feature = "low-power", stm32wlex))]
1095 let _device_busy = crate::low_power::DeviceBusy::new_stop1();
1096 let timeout = self.timeout(); 1092 let timeout = self.timeout();
1097 1093
1098 if write.is_empty() { 1094 if write.is_empty() {
@@ -1124,8 +1120,6 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
1124 1120
1125 /// Read. 1121 /// Read.
1126 pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> { 1122 pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> {
1127 #[cfg(all(feature = "low-power", stm32wlex))]
1128 let _device_busy = crate::low_power::DeviceBusy::new_stop1();
1129 let timeout = self.timeout(); 1123 let timeout = self.timeout();
1130 1124
1131 if buffer.is_empty() { 1125 if buffer.is_empty() {
@@ -1138,8 +1132,6 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
1138 1132
1139 /// Write, restart, read. 1133 /// Write, restart, read.
1140 pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> { 1134 pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
1141 #[cfg(all(feature = "low-power", stm32wlex))]
1142 let _device_busy = crate::low_power::DeviceBusy::new_stop1();
1143 let timeout = self.timeout(); 1135 let timeout = self.timeout();
1144 1136
1145 if write.is_empty() { 1137 if write.is_empty() {
@@ -1165,9 +1157,6 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
1165 /// 1157 ///
1166 /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction 1158 /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction
1167 pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> { 1159 pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> {
1168 #[cfg(all(feature = "low-power", stm32wlex))]
1169 let _device_busy = crate::low_power::DeviceBusy::new_stop1();
1170
1171 if operations.is_empty() { 1160 if operations.is_empty() {
1172 return Err(Error::ZeroLengthTransfer); 1161 return Err(Error::ZeroLengthTransfer);
1173 } 1162 }