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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2022-11-23 09:24:11 +0000
committerGitHub <[email protected]>2022-11-23 09:24:11 +0000
commit2fa2c1a6fe9c79f11f7382a63ba6a13fe1bae1be (patch)
treefd4c3022a35c22074d9e68d6edfb3bc651c6406a /embassy-executor
parent83b199a8744ddbba93b929f59606f0518c6f9ce1 (diff)
parent4943dec1a7ea52dc92c1e58f3b7f5860d79d192c (diff)
Merge #1054
1054: riscv fixes r=lulf a=swolix With these changes I can run embassy on our RISC-V processor, please consider merging this, feedback is very welcome. I don't fully understand the code in the executor, but I have implemented a critical section by globally disabling interrupts, which means the wfi inside the critical section will hang the whole thing. Co-authored-by: Sijmen Woutersen <[email protected]>
Diffstat (limited to 'embassy-executor')
-rw-r--r--embassy-executor/Cargo.toml1
-rw-r--r--embassy-executor/src/arch/riscv32.rs18
2 files changed, 6 insertions, 13 deletions
diff --git a/embassy-executor/Cargo.toml b/embassy-executor/Cargo.toml
index 910d6fa37..45b0955bf 100644
--- a/embassy-executor/Cargo.toml
+++ b/embassy-executor/Cargo.toml
@@ -31,6 +31,7 @@ flavors = [
31default = [] 31default = []
32std = ["embassy-macros/std", "critical-section/std"] 32std = ["embassy-macros/std", "critical-section/std"]
33wasm = ["dep:wasm-bindgen", "dep:js-sys", "embassy-macros/wasm"] 33wasm = ["dep:wasm-bindgen", "dep:js-sys", "embassy-macros/wasm"]
34riscv = ["embassy-macros/riscv"]
34 35
35# Enable nightly-only features 36# Enable nightly-only features
36nightly = [] 37nightly = []
diff --git a/embassy-executor/src/arch/riscv32.rs b/embassy-executor/src/arch/riscv32.rs
index 2a4b006da..76eb8b114 100644
--- a/embassy-executor/src/arch/riscv32.rs
+++ b/embassy-executor/src/arch/riscv32.rs
@@ -55,19 +55,11 @@ impl Executor {
55 unsafe { 55 unsafe {
56 self.inner.poll(); 56 self.inner.poll();
57 // we do not care about race conditions between the load and store operations, interrupts 57 // we do not care about race conditions between the load and store operations, interrupts
58 //will only set this value to true. 58 // will only set this value to true.
59 critical_section::with(|_| { 59 // if there is work to do, loop back to polling
60 // if there is work to do, loop back to polling 60 if !SIGNAL_WORK_THREAD_MODE.fetch_and(false, Ordering::SeqCst) {
61 // TODO can we relax this? 61 core::arch::asm!("wfi");
62 if SIGNAL_WORK_THREAD_MODE.load(Ordering::SeqCst) { 62 }
63 SIGNAL_WORK_THREAD_MODE.store(false, Ordering::SeqCst);
64 }
65 // if not, wait for interrupt
66 else {
67 core::arch::asm!("wfi");
68 }
69 });
70 // if an interrupt occurred while waiting, it will be serviced here
71 } 63 }
72 } 64 }
73 } 65 }