mspm0: add MSPM0G518x support and new packages for others

G518x is the first MSPM0 part with a USB, I2S and NPU peripheral. There is also a new TIMB peripheral (no PWM, so it is perfect for a time driver).

Unfortunately it also introduces UNICOMM which is a shared peripheral which can be in UART/I2C/SPI modes. This means that the current UART and I2C drivers need some adjustment to work with the new UNICOMM parts (which is the future).

5 files changed, 24 insertions, 10 deletions

diff --git a/embassy-mspm0/src/gpio.rs b/embassy-mspm0/src/gpio.rs
index d8eb42dc2..709102c59 100644
--- a/embassy-mspm0/src/gpio.rs
+++ b/embassy-mspm0/src/gpio.rs
@@ -841,6 +841,7 @@ impl<'d> embedded_hal_async::digital::Wait for OutputOpenDrain<'d> {
     }
 }
 
+#[cfg_attr(mspm0g518x, allow(dead_code))]
 #[derive(Copy, Clone)]
 pub struct PfType {
     pull: Pull,
@@ -948,6 +949,7 @@ pub(crate) trait SealedPin {
         });
     }
 
+    #[cfg_attr(mspm0g518x, allow(dead_code))]
     fn update_pf(&self, ty: PfType) {
         let pincm = pac::IOMUX.pincm(self._pin_cm() as usize);
         let pf = pincm.read().pf();
@@ -955,6 +957,7 @@ pub(crate) trait SealedPin {
         set_pf(self._pin_cm() as usize, pf, ty);
     }
 
+    #[cfg_attr(mspm0g518x, allow(dead_code))]
     fn set_as_pf(&self, pf: u8, ty: PfType) {
         set_pf(self._pin_cm() as usize, pf, ty)
     }
@@ -967,6 +970,7 @@ pub(crate) trait SealedPin {
     ///
     /// Note that this also disables the internal weak pull-up and pull-down resistors.
     #[inline]
+    #[cfg_attr(mspm0g518x, allow(dead_code))]
     fn set_as_disconnected(&self) {
         self.set_as_analog();
     }
diff --git a/embassy-mspm0/src/i2c_target.rs b/embassy-mspm0/src/i2c_target.rs
index 86be91415..e371fa903 100644
--- a/embassy-mspm0/src/i2c_target.rs
+++ b/embassy-mspm0/src/i2c_target.rs
@@ -12,12 +12,13 @@ use embassy_embedded_hal::SetConfig;
 use mspm0_metapac::i2c::vals::CpuIntIidxStat;
 
 use crate::gpio::{AnyPin, SealedPin};
-use crate::interrupt::InterruptExt;
-use crate::mode::{Async, Blocking, Mode};
-use crate::pac::{self, i2c::vals};
-use crate::{i2c, i2c_target, interrupt, Peri};
 // Re-use I2c controller types
 use crate::i2c::{ClockSel, ConfigError, Info, Instance, InterruptHandler, SclPin, SdaPin, State};
+use crate::interrupt::InterruptExt;
+use crate::mode::{Async, Blocking, Mode};
+use crate::pac::i2c::vals;
+use crate::pac::{self};
+use crate::{Peri, i2c, i2c_target, interrupt};
 
 #[non_exhaustive]
 #[derive(Clone, Copy, PartialEq, Eq, Debug)]
diff --git a/embassy-mspm0/src/lib.rs b/embassy-mspm0/src/lib.rs
index c43c81853..548fb33ca 100644
--- a/embassy-mspm0/src/lib.rs
+++ b/embassy-mspm0/src/lib.rs
@@ -8,20 +8,23 @@
 )]
 #![doc = include_str!("../README.md")]
 
-// This mod MUST go first, so that the others see its macros.
+// These mods MUST go first, so that the others see the macros.
 pub(crate) mod fmt;
-
-// This must be declared early as well for
 mod macros;
 
 pub mod adc;
 pub mod dma;
 pub mod gpio;
+// TODO: I2C unicomm
+#[cfg(not(unicomm))]
 pub mod i2c;
+#[cfg(not(unicomm))]
 pub mod i2c_target;
 #[cfg(any(mspm0g150x, mspm0g151x, mspm0g350x, mspm0g351x))]
 pub mod mathacl;
 pub mod timer;
+// TODO: UART unicomm
+#[cfg(not(unicomm))]
 pub mod uart;
 pub mod wwdt;
 
@@ -276,7 +279,7 @@ pub enum ResetCause {
     /// WWDT0 violation
     BootrstWwdt0Violation,
     /// WWDT1 violation (G-series only)
-    #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x))]
+    #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0g518x))]
     SysrstWwdt1Violation,
     /// BSL exit (if present)
     SysrstBslExit,
@@ -326,7 +329,8 @@ pub fn read_reset_cause() -> Result<ResetCause, u8> {
             mspm0g151x,
             mspm0g310x,
             mspm0g350x,
-            mspm0g351x
+            mspm0g351x,
+            mspm0g518x,
         )))]
         Id::BOOTNONPMUPARITY => Ok(BootrstNonPmuParityFault),
         Id::BOOTCLKFAIL => Ok(BootrstClockFault),
@@ -335,7 +339,7 @@ pub fn read_reset_cause() -> Result<ResetCause, u8> {
         Id::BOOTWWDT0 => Ok(BootrstWwdt0Violation),
         Id::SYSBSLEXIT => Ok(SysrstBslExit),
         Id::SYSBSLENTRY => Ok(SysrstBslEntry),
-        #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x))]
+        #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0g518x))]
         Id::SYSWWDT1 => Ok(SysrstWwdt1Violation),
         #[cfg(not(any(mspm0c110x, mspm0c1105_c1106, mspm0g351x, mspm0g151x)))]
         Id::SYSFLASHECC => Ok(SysrstFlashEccError),
diff --git a/embassy-mspm0/src/macros.rs b/embassy-mspm0/src/macros.rs
index 5355e7d59..3a12a528a 100644
--- a/embassy-mspm0/src/macros.rs
+++ b/embassy-mspm0/src/macros.rs
@@ -1,5 +1,6 @@
 #![macro_use]
 
+#[allow(unused)]
 macro_rules! new_pin {
     ($name: ident, $pf_type: expr) => {{
         let pin = $name;
diff --git a/embassy-mspm0/src/time_driver.rs b/embassy-mspm0/src/time_driver.rs
index 0743c667b..b42ff61c2 100644
--- a/embassy-mspm0/src/time_driver.rs
+++ b/embassy-mspm0/src/time_driver.rs
@@ -16,6 +16,8 @@ use crate::timer::SealedTimer;
 compile_error!("TIMG12 and TIMG13 are not supported by the time driver yet");
 
 // Currently TIMG12 and TIMG13 are excluded because those are 32-bit timers.
+#[cfg(time_driver_timb0)]
+type T = peripherals::TIMB0;
 #[cfg(time_driver_timg0)]
 type T = peripherals::TIMG0;
 #[cfg(time_driver_timg1)]
@@ -333,6 +335,8 @@ pub(crate) fn init(cs: CriticalSection) {
     DRIVER.init(cs);
 }
 
+// TODO: TIMB0
+
 #[cfg(time_driver_timg0)]
 #[interrupt]
 fn TIMG0() {