diff options
| author | Dario Nieuwenhuis <[email protected]> | 2021-05-11 03:04:59 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2021-05-17 00:57:20 +0200 |
| commit | bd9589d0ce71a2aa41c9fdf439d6de6349a09d83 (patch) | |
| tree | bed94fa0d977604b1f9cbcb09d27b44791aca404 /embassy-nrf/src/lib.rs | |
| parent | cd4111736c0384b1ef957df7f6aa51e3727c29b2 (diff) | |
nrf: add support for nrf52805, nrf52811, nrf52820
Diffstat (limited to 'embassy-nrf/src/lib.rs')
| -rw-r--r-- | embassy-nrf/src/lib.rs | 282 |
1 files changed, 46 insertions, 236 deletions
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs index 33d764fba..066bf5f6f 100644 --- a/embassy-nrf/src/lib.rs +++ b/embassy-nrf/src/lib.rs | |||
| @@ -7,257 +7,67 @@ | |||
| 7 | #![allow(incomplete_features)] | 7 | #![allow(incomplete_features)] |
| 8 | 8 | ||
| 9 | #[cfg(not(any( | 9 | #[cfg(not(any( |
| 10 | feature = "52810", | 10 | feature = "nrf51", |
| 11 | feature = "52811", | 11 | feature = "nrf52805", |
| 12 | feature = "52832", | 12 | feature = "nrf52810", |
| 13 | feature = "52833", | 13 | feature = "nrf52811", |
| 14 | feature = "52840", | 14 | feature = "nrf52820", |
| 15 | feature = "nrf52832", | ||
| 16 | feature = "nrf52833", | ||
| 17 | feature = "nrf52840", | ||
| 18 | feature = "nrf5340-app", | ||
| 19 | feature = "nrf5340-net", | ||
| 20 | feature = "nrf9160", | ||
| 15 | )))] | 21 | )))] |
| 16 | compile_error!("No chip feature activated. You must activate exactly one of the following features: 52810, 52811, 52832, 52833, 52840"); | 22 | compile_error!("No chip feature activated. You must activate exactly one of the following features: nrf52810, nrf52811, nrf52832, nrf52833, nrf52840"); |
| 17 | |||
| 18 | #[cfg(any( | ||
| 19 | all(feature = "52810", feature = "52811"), | ||
| 20 | all(feature = "52810", feature = "52832"), | ||
| 21 | all(feature = "52810", feature = "52833"), | ||
| 22 | all(feature = "52810", feature = "52840"), | ||
| 23 | all(feature = "52811", feature = "52832"), | ||
| 24 | all(feature = "52811", feature = "52833"), | ||
| 25 | all(feature = "52811", feature = "52840"), | ||
| 26 | all(feature = "52832", feature = "52833"), | ||
| 27 | all(feature = "52832", feature = "52840"), | ||
| 28 | all(feature = "52833", feature = "52840"), | ||
| 29 | ))] | ||
| 30 | compile_error!("Multile chip features activated. You must activate exactly one of the following features: 52810, 52811, 52832, 52833, 52840"); | ||
| 31 | |||
| 32 | #[cfg(feature = "52810")] | ||
| 33 | pub use nrf52810_pac as pac; | ||
| 34 | #[cfg(feature = "52811")] | ||
| 35 | pub use nrf52811_pac as pac; | ||
| 36 | #[cfg(feature = "52832")] | ||
| 37 | pub use nrf52832_pac as pac; | ||
| 38 | #[cfg(feature = "52833")] | ||
| 39 | pub use nrf52833_pac as pac; | ||
| 40 | #[cfg(feature = "52840")] | ||
| 41 | pub use nrf52840_pac as pac; | ||
| 42 | |||
| 43 | /// Length of Nordic EasyDMA differs for MCUs | ||
| 44 | #[cfg(any( | ||
| 45 | feature = "52810", | ||
| 46 | feature = "52811", | ||
| 47 | feature = "52832", | ||
| 48 | feature = "51" | ||
| 49 | ))] | ||
| 50 | pub mod target_constants { | ||
| 51 | // NRF52832 8 bits1..0xFF | ||
| 52 | pub const EASY_DMA_SIZE: usize = 255; | ||
| 53 | // Easy DMA can only read from data ram | ||
| 54 | pub const SRAM_LOWER: usize = 0x2000_0000; | ||
| 55 | pub const SRAM_UPPER: usize = 0x3000_0000; | ||
| 56 | } | ||
| 57 | #[cfg(any(feature = "52840", feature = "52833", feature = "9160"))] | ||
| 58 | pub mod target_constants { | ||
| 59 | // NRF52840 and NRF9160 16 bits 1..0xFFFF | ||
| 60 | pub const EASY_DMA_SIZE: usize = 65535; | ||
| 61 | // Limits for Easy DMA - it can only read from data ram | ||
| 62 | pub const SRAM_LOWER: usize = 0x2000_0000; | ||
| 63 | pub const SRAM_UPPER: usize = 0x3000_0000; | ||
| 64 | } | ||
| 65 | |||
| 66 | /// Does this slice reside entirely within RAM? | ||
| 67 | pub(crate) fn slice_in_ram(slice: &[u8]) -> bool { | ||
| 68 | let ptr = slice.as_ptr() as usize; | ||
| 69 | ptr >= target_constants::SRAM_LOWER && (ptr + slice.len()) < target_constants::SRAM_UPPER | ||
| 70 | } | ||
| 71 | |||
| 72 | /// Return an error if slice is not in RAM. | ||
| 73 | #[cfg(not(feature = "51"))] | ||
| 74 | pub(crate) fn slice_in_ram_or<T>(slice: &[u8], err: T) -> Result<(), T> { | ||
| 75 | if slice.len() == 0 || slice_in_ram(slice) { | ||
| 76 | Ok(()) | ||
| 77 | } else { | ||
| 78 | Err(err) | ||
| 79 | } | ||
| 80 | } | ||
| 81 | 23 | ||
| 82 | // This mod MUST go first, so that the others see its macros. | 24 | // This mod MUST go first, so that the others see its macros. |
| 83 | pub(crate) mod fmt; | 25 | pub(crate) mod fmt; |
| 26 | pub(crate) mod util; | ||
| 84 | 27 | ||
| 85 | pub mod buffered_uarte; | 28 | pub mod buffered_uarte; |
| 86 | pub mod gpio; | 29 | pub mod gpio; |
| 87 | pub mod gpiote; | 30 | pub mod gpiote; |
| 88 | pub mod interrupt; | ||
| 89 | pub mod ppi; | 31 | pub mod ppi; |
| 90 | #[cfg(feature = "52840")] | 32 | #[cfg(feature = "nrf52840")] |
| 91 | pub mod qspi; | 33 | pub mod qspi; |
| 92 | pub mod rtc; | 34 | pub mod rtc; |
| 35 | #[cfg(not(feature = "nrf52820"))] | ||
| 93 | pub mod saadc; | 36 | pub mod saadc; |
| 94 | pub mod spim; | 37 | pub mod spim; |
| 95 | pub mod system; | 38 | pub mod system; |
| 96 | pub mod timer; | 39 | pub mod timer; |
| 97 | pub mod uarte; | 40 | pub mod uarte; |
| 98 | 41 | ||
| 99 | embassy_extras::peripherals! { | 42 | // This mod MUST go last, so that it sees all the `impl_foo!` macros |
| 100 | // RTC | 43 | #[cfg(feature = "nrf52805")] |
| 101 | RTC0, | 44 | #[path = "chips/nrf52805.rs"] |
| 102 | RTC1, | 45 | mod chip; |
| 103 | #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] | 46 | #[cfg(feature = "nrf52810")] |
| 104 | RTC2, | 47 | #[path = "chips/nrf52810.rs"] |
| 105 | 48 | mod chip; | |
| 106 | // QSPI | 49 | #[cfg(feature = "nrf52811")] |
| 107 | #[cfg(feature = "52840")] | 50 | #[path = "chips/nrf52811.rs"] |
| 108 | QSPI, | 51 | mod chip; |
| 109 | 52 | #[cfg(feature = "nrf52820")] | |
| 110 | // UARTE | 53 | #[path = "chips/nrf52820.rs"] |
| 111 | UARTE0, | 54 | mod chip; |
| 112 | #[cfg(any(feature = "52833", feature = "52840", feature = "9160"))] | 55 | #[cfg(feature = "nrf52832")] |
| 113 | UARTE1, | 56 | #[path = "chips/nrf52832.rs"] |
| 114 | 57 | mod chip; | |
| 115 | // SPIM | 58 | #[cfg(feature = "nrf52833")] |
| 116 | // TODO this is actually shared with SPI, SPIM, SPIS, TWI, TWIS, TWIS. | 59 | #[path = "chips/nrf52833.rs"] |
| 117 | // When they're all implemented, they should be only one peripheral here. | 60 | mod chip; |
| 118 | SPIM0, | 61 | #[cfg(feature = "nrf52840")] |
| 119 | #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] | 62 | #[path = "chips/nrf52840.rs"] |
| 120 | SPIM1, | 63 | mod chip; |
| 121 | #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] | 64 | |
| 122 | SPIM2, | 65 | pub(crate) use chip::pac; |
| 123 | #[cfg(any(feature = "52833", feature = "52840"))] | 66 | pub use chip::{peripherals, Peripherals}; |
| 124 | SPIM3, | 67 | |
| 125 | 68 | pub mod interrupt { | |
| 126 | // SAADC | 69 | pub use crate::chip::irqs::*; |
| 127 | SAADC, | 70 | pub use cortex_m::interrupt::{CriticalSection, Mutex}; |
| 128 | 71 | pub use embassy::interrupt::{declare, take, Interrupt}; | |
| 129 | // TIMER | 72 | pub use embassy_extras::interrupt::Priority3 as Priority; |
| 130 | TIMER0, | ||
| 131 | TIMER1, | ||
| 132 | TIMER2, | ||
| 133 | #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] | ||
| 134 | TIMER3, | ||
| 135 | #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] | ||
| 136 | TIMER4, | ||
| 137 | |||
| 138 | // GPIOTE | ||
| 139 | GPIOTE, | ||
| 140 | GPIOTE_CH0, | ||
| 141 | GPIOTE_CH1, | ||
| 142 | GPIOTE_CH2, | ||
| 143 | GPIOTE_CH3, | ||
| 144 | GPIOTE_CH4, | ||
| 145 | GPIOTE_CH5, | ||
| 146 | GPIOTE_CH6, | ||
| 147 | GPIOTE_CH7, | ||
| 148 | |||
| 149 | // PPI | ||
| 150 | PPI_CH0, | ||
| 151 | PPI_CH1, | ||
| 152 | PPI_CH2, | ||
| 153 | PPI_CH3, | ||
| 154 | PPI_CH4, | ||
| 155 | PPI_CH5, | ||
| 156 | PPI_CH6, | ||
| 157 | PPI_CH7, | ||
| 158 | PPI_CH8, | ||
| 159 | PPI_CH9, | ||
| 160 | PPI_CH10, | ||
| 161 | PPI_CH11, | ||
| 162 | PPI_CH12, | ||
| 163 | PPI_CH13, | ||
| 164 | PPI_CH14, | ||
| 165 | PPI_CH15, | ||
| 166 | #[cfg(not(feature = "51"))] | ||
| 167 | PPI_CH16, | ||
| 168 | #[cfg(not(feature = "51"))] | ||
| 169 | PPI_CH17, | ||
| 170 | #[cfg(not(feature = "51"))] | ||
| 171 | PPI_CH18, | ||
| 172 | #[cfg(not(feature = "51"))] | ||
| 173 | PPI_CH19, | ||
| 174 | PPI_CH20, | ||
| 175 | PPI_CH21, | ||
| 176 | PPI_CH22, | ||
| 177 | PPI_CH23, | ||
| 178 | PPI_CH24, | ||
| 179 | PPI_CH25, | ||
| 180 | PPI_CH26, | ||
| 181 | PPI_CH27, | ||
| 182 | PPI_CH28, | ||
| 183 | PPI_CH29, | ||
| 184 | PPI_CH30, | ||
| 185 | PPI_CH31, | ||
| 186 | |||
| 187 | PPI_GROUP0, | ||
| 188 | PPI_GROUP1, | ||
| 189 | PPI_GROUP2, | ||
| 190 | PPI_GROUP3, | ||
| 191 | #[cfg(not(feature = "51"))] | ||
| 192 | PPI_GROUP4, | ||
| 193 | #[cfg(not(feature = "51"))] | ||
| 194 | PPI_GROUP5, | ||
| 195 | |||
| 196 | // GPIO port 0 | ||
| 197 | P0_00, | ||
| 198 | P0_01, | ||
| 199 | P0_02, | ||
| 200 | P0_03, | ||
| 201 | P0_04, | ||
| 202 | P0_05, | ||
| 203 | P0_06, | ||
| 204 | P0_07, | ||
| 205 | P0_08, | ||
| 206 | P0_09, | ||
| 207 | P0_10, | ||
| 208 | P0_11, | ||
| 209 | P0_12, | ||
| 210 | P0_13, | ||
| 211 | P0_14, | ||
| 212 | P0_15, | ||
| 213 | P0_16, | ||
| 214 | P0_17, | ||
| 215 | P0_18, | ||
| 216 | P0_19, | ||
| 217 | P0_20, | ||
| 218 | P0_21, | ||
| 219 | P0_22, | ||
| 220 | P0_23, | ||
| 221 | P0_24, | ||
| 222 | P0_25, | ||
| 223 | P0_26, | ||
| 224 | P0_27, | ||
| 225 | P0_28, | ||
| 226 | P0_29, | ||
| 227 | P0_30, | ||
| 228 | P0_31, | ||
| 229 | |||
| 230 | // GPIO port 1 | ||
| 231 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 232 | P1_00, | ||
| 233 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 234 | P1_01, | ||
| 235 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 236 | P1_02, | ||
| 237 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 238 | P1_03, | ||
| 239 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 240 | P1_04, | ||
| 241 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 242 | P1_05, | ||
| 243 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 244 | P1_06, | ||
| 245 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 246 | P1_07, | ||
| 247 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 248 | P1_08, | ||
| 249 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 250 | P1_09, | ||
| 251 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 252 | P1_10, | ||
| 253 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 254 | P1_11, | ||
| 255 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 256 | P1_12, | ||
| 257 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 258 | P1_13, | ||
| 259 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 260 | P1_14, | ||
| 261 | #[cfg(any(feature = "52833", feature = "52840"))] | ||
| 262 | P1_15, | ||
| 263 | } | 73 | } |
