Merge branch 'main' into 17-add-support-for-boot-protocol

30 files changed, 192 insertions, 80 deletions

diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs
index 40c679190..b1eb5c81a 100644
--- a/embassy-nrf/src/buffered_uarte.rs
+++ b/embassy-nrf/src/buffered_uarte.rs
@@ -9,27 +9,27 @@
 //! Please also see [crate::uarte] to understand when [BufferedUarte] should be used.
 
 use core::cmp::min;
-use core::future::{poll_fn, Future};
+use core::future::{Future, poll_fn};
 use core::marker::PhantomData;
 use core::slice;
-use core::sync::atomic::{compiler_fence, AtomicBool, AtomicU8, AtomicUsize, Ordering};
+use core::sync::atomic::{AtomicBool, AtomicU8, AtomicUsize, Ordering, compiler_fence};
 use core::task::Poll;
 
-use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
 use embassy_hal_internal::Peri;
+use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
 use pac::uarte::vals;
 // Re-export SVD variants to allow user to directly set values
 pub use pac::uarte::vals::{Baudrate, ConfigParity as Parity};
 
 use crate::gpio::{AnyPin, Pin as GpioPin};
-use crate::interrupt::typelevel::Interrupt;
 use crate::interrupt::InterruptExt;
+use crate::interrupt::typelevel::Interrupt;
 use crate::ppi::{
     self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task,
 };
 use crate::timer::{Instance as TimerInstance, Timer};
-use crate::uarte::{configure, configure_rx_pins, configure_tx_pins, drop_tx_rx, Config, Instance as UarteInstance};
-use crate::{interrupt, pac, EASY_DMA_SIZE};
+use crate::uarte::{Config, Instance as UarteInstance, configure, configure_rx_pins, configure_tx_pins, drop_tx_rx};
+use crate::{EASY_DMA_SIZE, interrupt, pac};
 
 pub(crate) struct State {
     tx_buf: RingBuffer,
@@ -40,6 +40,7 @@ pub(crate) struct State {
     rx_started_count: AtomicU8,
     rx_ended_count: AtomicU8,
     rx_ppi_ch: AtomicU8,
+    rx_overrun: AtomicBool,
 }
 
 /// UART error.
@@ -47,7 +48,8 @@ pub(crate) struct State {
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 #[non_exhaustive]
 pub enum Error {
-    // No errors for now
+    /// Buffer Overrun
+    Overrun,
 }
 
 impl State {
@@ -61,6 +63,7 @@ impl State {
             rx_started_count: AtomicU8::new(0),
             rx_ended_count: AtomicU8::new(0),
             rx_ppi_ch: AtomicU8::new(0),
+            rx_overrun: AtomicBool::new(false),
         }
     }
 }
@@ -87,7 +90,8 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt
                 r.errorsrc().write_value(errs);
 
                 if errs.overrun() {
-                    panic!("BufferedUarte overrun");
+                    s.rx_overrun.store(true, Ordering::Release);
+                    ss.rx_waker.wake();
                 }
             }
 
@@ -689,6 +693,7 @@ impl<'d> BufferedUarteRx<'d> {
         buffered_state.rx_started_count.store(0, Ordering::Relaxed);
         buffered_state.rx_ended_count.store(0, Ordering::Relaxed);
         buffered_state.rx_started.store(false, Ordering::Relaxed);
+        buffered_state.rx_overrun.store(false, Ordering::Relaxed);
         let rx_len = rx_buffer.len().min(EASY_DMA_SIZE * 2);
         unsafe { buffered_state.rx_buf.init(rx_buffer.as_mut_ptr(), rx_len) };
 
@@ -762,6 +767,10 @@ impl<'d> BufferedUarteRx<'d> {
             compiler_fence(Ordering::SeqCst);
             //trace!("poll_read");
 
+            if s.rx_overrun.swap(false, Ordering::Acquire) {
+                return Poll::Ready(Err(Error::Overrun));
+            }
+
             // Read the RXDRDY counter.
             timer.cc(0).capture();
             let mut end = timer.cc(0).read() as usize;
@@ -820,6 +829,9 @@ impl<'d> BufferedUarteRx<'d> {
     /// we are ready to read if there is data in the buffer
     fn read_ready(&self) -> Result<bool, Error> {
         let state = self.buffered_state;
+        if state.rx_overrun.swap(false, Ordering::Acquire) {
+            return Err(Error::Overrun);
+        }
         Ok(!state.rx_buf.is_empty())
     }
 }
@@ -854,7 +866,9 @@ mod _embedded_io {
 
     impl embedded_io_async::Error for Error {
         fn kind(&self) -> embedded_io_async::ErrorKind {
-            match *self {}
+            match *self {
+                Error::Overrun => embedded_io_async::ErrorKind::OutOfMemory,
+            }
         }
     }
 
diff --git a/embassy-nrf/src/chips/nrf54l15_app.rs b/embassy-nrf/src/chips/nrf54l15_app.rs
index ff05bbec0..901c5e7fc 100644
--- a/embassy-nrf/src/chips/nrf54l15_app.rs
+++ b/embassy-nrf/src/chips/nrf54l15_app.rs
@@ -94,6 +94,7 @@ pub mod pac {
     #[cfg(feature = "_s")]
     #[doc(no_inline)]
     pub use nrf_pac::{
+        FICR_NS as FICR,
         SICR_S as SICR,
         ICACHEDATA_S as ICACHEDATA,
         ICACHEINFO_S as ICACHEINFO,
@@ -248,6 +249,45 @@ embassy_hal_internal::peripherals! {
     P2_09,
     P2_10,
 
+    // RTC
+    RTC10,
+    RTC30,
+
+    // SERIAL
+    SERIAL00,
+    SERIAL20,
+    SERIAL21,
+    SERIAL22,
+    SERIAL30,
+
+    // SAADC
+    SAADC,
+
+    // RADIO
+    RADIO,
+
+    // TIMER
+    TIMER00,
+    TIMER10,
+    TIMER20,
+
+    // PPI BRIDGE
+    PPIB00,
+    PPIB01,
+    PPIB10,
+    PPIB11,
+    PPIB20,
+    PPIB21,
+    PPIB22,
+    PPIB30,
+
+    // GPIOTE
+    GPIOTE20,
+    GPIOTE30,
+
+    // CRACEN
+    CRACEN,
+
     #[cfg(feature = "_s")]
     // RRAMC
     RRAMC,
@@ -302,6 +342,9 @@ impl_pin!(P2_08, 2, 8);
 impl_pin!(P2_09, 2, 9);
 impl_pin!(P2_10, 2, 10);
 
+impl_rtc!(RTC10, RTC10, RTC10);
+impl_rtc!(RTC30, RTC30, RTC30);
+
 #[cfg(feature = "_ns")]
 impl_wdt!(WDT, WDT31, WDT31, 0);
 #[cfg(feature = "_s")]
diff --git a/embassy-nrf/src/egu.rs b/embassy-nrf/src/egu.rs
index f7372fca1..666986115 100644
--- a/embassy-nrf/src/egu.rs
+++ b/embassy-nrf/src/egu.rs
@@ -10,7 +10,7 @@ use core::marker::PhantomData;
 use embassy_hal_internal::PeripheralType;
 
 use crate::ppi::{Event, Task};
-use crate::{interrupt, pac, Peri};
+use crate::{Peri, interrupt, pac};
 
 /// An instance of the EGU.
 pub struct Egu<'d> {
diff --git a/embassy-nrf/src/embassy_net_802154_driver.rs b/embassy-nrf/src/embassy_net_802154_driver.rs
index b3fc5df2c..4c47b7cbd 100644
--- a/embassy-nrf/src/embassy_net_802154_driver.rs
+++ b/embassy-nrf/src/embassy_net_802154_driver.rs
@@ -1,12 +1,12 @@
 //! embassy-net IEEE 802.15.4 driver
 
-use embassy_futures::select::{select3, Either3};
+use embassy_futures::select::{Either3, select3};
 use embassy_net_driver_channel::driver::LinkState;
 use embassy_net_driver_channel::{self as ch};
 use embassy_time::{Duration, Ticker};
 
-use crate::radio::ieee802154::{Packet, Radio};
 use crate::radio::InterruptHandler;
+use crate::radio::ieee802154::{Packet, Radio};
 use crate::{self as nrf, interrupt};
 
 /// MTU for the nrf radio.
diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs
index ab5e7ed4b..7ed3a7927 100644
--- a/embassy-nrf/src/gpio.rs
+++ b/embassy-nrf/src/gpio.rs
@@ -5,10 +5,10 @@ use core::convert::Infallible;
 use core::hint::unreachable_unchecked;
 
 use cfg_if::cfg_if;
-use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
+use embassy_hal_internal::{Peri, PeripheralType, impl_peripheral};
 
 use crate::pac;
-use crate::pac::common::{Reg, RW};
+use crate::pac::common::{RW, Reg};
 use crate::pac::gpio;
 use crate::pac::gpio::vals;
 #[cfg(not(feature = "_nrf51"))]
diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs
index 43e43f0bf..3658657c0 100644
--- a/embassy-nrf/src/gpiote.rs
+++ b/embassy-nrf/src/gpiote.rs
@@ -1,10 +1,10 @@
 //! GPIO task/event (GPIOTE) driver.
 
 use core::convert::Infallible;
-use core::future::{poll_fn, Future};
+use core::future::{Future, poll_fn};
 use core::task::{Context, Poll};
 
-use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
+use embassy_hal_internal::{Peri, PeripheralType, impl_peripheral};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin, SealedPin as _};
@@ -77,6 +77,9 @@ pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
 
         for &p in ports {
             // Enable latched detection
+            #[cfg(feature = "_s")]
+            p.detectmode_sec().write(|w| w.set_detectmode(Detectmode::LDETECT));
+            #[cfg(not(feature = "_s"))]
             p.detectmode().write(|w| w.set_detectmode(Detectmode::LDETECT));
             // Clear latch
             p.latch().write(|w| w.0 = 0xFFFFFFFF)
@@ -259,6 +262,11 @@ impl<'d> InputChannel<'d> {
         .await;
     }
 
+    /// Get the associated input pin.
+    pub fn pin(&self) -> &Input<'_> {
+        &self.pin
+    }
+
     /// Returns the IN event, for use with PPI.
     pub fn event_in(&self) -> Event<'d> {
         let g = regs();
diff --git a/embassy-nrf/src/i2s.rs b/embassy-nrf/src/i2s.rs
index 1bfa18491..9cce9f1e8 100644
--- a/embassy-nrf/src/i2s.rs
+++ b/embassy-nrf/src/i2s.rs
@@ -6,7 +6,7 @@ use core::future::poll_fn;
 use core::marker::PhantomData;
 use core::mem::size_of;
 use core::ops::{Deref, DerefMut};
-use core::sync::atomic::{compiler_fence, AtomicBool, Ordering};
+use core::sync::atomic::{AtomicBool, Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
@@ -17,7 +17,7 @@ use crate::gpio::{AnyPin, Pin as GpioPin, PselBits};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::i2s::vals;
 use crate::util::slice_in_ram_or;
-use crate::{interrupt, pac, EASY_DMA_SIZE};
+use crate::{EASY_DMA_SIZE, interrupt, pac};
 
 /// Type alias for `MultiBuffering` with 2 buffers.
 pub type DoubleBuffering<S, const NS: usize> = MultiBuffering<S, 2, NS>;
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs
index 7c26a6184..705c77453 100644
--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@@ -1,5 +1,6 @@
 #![no_std]
 #![allow(async_fn_in_trait)]
+#![allow(unsafe_op_in_unsafe_fn)]
 #![cfg_attr(
     docsrs,
     doc = "<div style='padding:30px;background:#810;color:#fff;text-align:center;'><p>You might want to <a href='https://docs.embassy.dev/embassy-nrf'>browse the `embassy-nrf` documentation on the Embassy website</a> instead.</p><p>The documentation here on `docs.rs` is built for a single chip only (nRF52840 in particular), while on the Embassy website you can pick your exact chip from the top menu. Available peripherals and their APIs change depending on the chip.</p></div>\n\n"
@@ -154,7 +155,6 @@ pub mod reset;
 #[cfg(not(feature = "_nrf54l"))] // TODO
 #[cfg(not(any(feature = "_nrf5340-app", feature = "_nrf91")))]
 pub mod rng;
-#[cfg(not(feature = "_nrf54l"))] // TODO
 pub mod rtc;
 #[cfg(not(feature = "_nrf54l"))] // TODO
 #[cfg(not(any(feature = "_nrf51", feature = "nrf52820", feature = "_nrf5340-net")))]
@@ -252,7 +252,7 @@ macro_rules! bind_interrupts {
 
         $(
             #[allow(non_snake_case)]
-            #[no_mangle]
+            #[unsafe(no_mangle)]
             $(#[cfg($cond_irq)])?
             unsafe extern "C" fn $irq() {
                 unsafe {
@@ -284,7 +284,7 @@ macro_rules! bind_interrupts {
 pub use chip::pac;
 #[cfg(not(feature = "unstable-pac"))]
 pub(crate) use chip::pac;
-pub use chip::{peripherals, Peripherals, EASY_DMA_SIZE};
+pub use chip::{EASY_DMA_SIZE, Peripherals, peripherals};
 pub use embassy_hal_internal::{Peri, PeripheralType};
 
 pub use crate::chip::interrupt;
@@ -406,9 +406,10 @@ pub mod config {
     /// Settings for the internal capacitors.
     #[cfg(feature = "nrf5340-app-s")]
     pub struct InternalCapacitors {
-        /// Config for the internal capacitors on pins XC1 and XC2.
+        /// Config for the internal capacitors on pins XC1 and XC2. Pass `None` to not touch it.
         pub hfxo: Option<HfxoCapacitance>,
-        /// Config for the internal capacitors between pins XL1 and XL2.
+        /// Config for the internal capacitors between pins XL1 and XL2. Pass `None` to not touch
+        /// it.
         pub lfxo: Option<LfxoCapacitance>,
     }
 
@@ -416,6 +417,8 @@ pub mod config {
     #[cfg(feature = "nrf5340-app-s")]
     #[derive(Copy, Clone)]
     pub enum HfxoCapacitance {
+        /// Use external capacitors
+        External,
         /// 7.0 pF
         _7_0pF,
         /// 7.5 pF
@@ -475,8 +478,9 @@ pub mod config {
     #[cfg(feature = "nrf5340-app-s")]
     impl HfxoCapacitance {
         /// The capacitance value times two.
-        pub(crate) const fn value2(self) -> i32 {
+        pub(crate) fn value2(self) -> i32 {
             match self {
+                HfxoCapacitance::External => unreachable!(),
                 HfxoCapacitance::_7_0pF => 14,
                 HfxoCapacitance::_7_5pF => 15,
                 HfxoCapacitance::_8_0pF => 16,
@@ -506,11 +510,17 @@ pub mod config {
                 HfxoCapacitance::_20_0pF => 40,
             }
         }
+
+        pub(crate) fn external(self) -> bool {
+            matches!(self, Self::External)
+        }
     }
 
     /// Internal capacitance value for the LFXO.
     #[cfg(feature = "nrf5340-app-s")]
     pub enum LfxoCapacitance {
+        /// Use external capacitors
+        External = 0,
         /// 6 pF
         _6pF = 1,
         /// 7 pF
@@ -523,6 +533,7 @@ pub mod config {
     impl From<LfxoCapacitance> for super::pac::oscillators::vals::Intcap {
         fn from(t: LfxoCapacitance) -> Self {
             match t {
+                LfxoCapacitance::External => Self::EXTERNAL,
                 LfxoCapacitance::_6pF => Self::C6PF,
                 LfxoCapacitance::_7pF => Self::C7PF,
                 LfxoCapacitance::_9pF => Self::C9PF,
@@ -720,6 +731,29 @@ pub fn init(config: config::Config) -> Peripherals {
         }
     }
 
+    // Apply trimming values from the FICR.
+    #[cfg(any(
+        all(feature = "_nrf5340-app", feature = "_s"),
+        all(feature = "_nrf54l", feature = "_s"),
+        feature = "_nrf5340-net",
+    ))]
+    {
+        #[cfg(feature = "_nrf5340")]
+        let n = 32;
+        #[cfg(feature = "_nrf54l")]
+        let n = 64;
+        for i in 0..n {
+            let info = pac::FICR.trimcnf(i);
+            let addr = info.addr().read();
+            if addr == 0 || addr == 0xFFFF_FFFF {
+                break;
+            }
+            unsafe {
+                (addr as *mut u32).write_volatile(info.data().read());
+            }
+        }
+    }
+
     // GLITCHDET is only accessible for secure code
     #[cfg(all(feature = "_nrf54l", feature = "_s"))]
     {
@@ -953,17 +987,21 @@ pub fn init(config: config::Config) -> Peripherals {
     #[cfg(feature = "nrf5340-app-s")]
     {
         if let Some(cap) = config.internal_capacitors.hfxo {
-            let mut slope = pac::FICR.xosc32mtrim().read().slope() as i32;
-            let offset = pac::FICR.xosc32mtrim().read().offset() as i32;
-            // slope is a signed 5-bit integer
-            if slope >= 16 {
-                slope -= 32;
+            if cap.external() {
+                pac::OSCILLATORS.xosc32mcaps().write(|w| w.set_enable(false));
+            } else {
+                let mut slope = pac::FICR.xosc32mtrim().read().slope() as i32;
+                let offset = pac::FICR.xosc32mtrim().read().offset() as i32;
+                // slope is a signed 5-bit integer
+                if slope >= 16 {
+                    slope -= 32;
+                }
+                let capvalue = (((slope + 56) * (cap.value2() - 14)) + ((offset - 8) << 4) + 32) >> 6;
+                pac::OSCILLATORS.xosc32mcaps().write(|w| {
+                    w.set_capvalue(capvalue as u8);
+                    w.set_enable(true);
+                });
             }
-            let capvalue = (((slope + 56) * (cap.value2() - 14)) + ((offset - 8) << 4) + 32) >> 6;
-            pac::OSCILLATORS.xosc32mcaps().write(|w| {
-                w.set_capvalue(capvalue as u8);
-                w.set_enable(true);
-            });
         }
         if let Some(cap) = config.internal_capacitors.lfxo {
             pac::OSCILLATORS.xosc32ki().intcap().write(|w| w.set_intcap(cap.into()));
diff --git a/embassy-nrf/src/nfct.rs b/embassy-nrf/src/nfct.rs
index 8d70ec954..bfbdc2906 100644
--- a/embassy-nrf/src/nfct.rs
+++ b/embassy-nrf/src/nfct.rs
@@ -10,18 +10,18 @@
 #![macro_use]
 
 use core::future::poll_fn;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_sync::waitqueue::AtomicWaker;
 pub use vals::{Bitframesdd as SddPat, Discardmode as DiscardMode};
 
 use crate::interrupt::InterruptExt;
-use crate::pac::nfct::vals;
 use crate::pac::NFCT;
+use crate::pac::nfct::vals;
 use crate::peripherals::NFCT;
 use crate::util::slice_in_ram;
-use crate::{interrupt, pac, Peri};
+use crate::{Peri, interrupt, pac};
 
 /// NFCID1 (aka UID) of different sizes.
 #[derive(Clone, Eq, PartialEq, Ord, PartialOrd, Hash, Debug)]
diff --git a/embassy-nrf/src/nvmc.rs b/embassy-nrf/src/nvmc.rs
index c46af0b34..3f38cd0f5 100644
--- a/embassy-nrf/src/nvmc.rs
+++ b/embassy-nrf/src/nvmc.rs
@@ -8,7 +8,7 @@ use embedded_storage::nor_flash::{
 
 use crate::pac::nvmc::vals;
 use crate::peripherals::NVMC;
-use crate::{pac, Peri};
+use crate::{Peri, pac};
 
 #[cfg(not(feature = "_nrf5340-net"))]
 /// Erase size of NVMC flash in bytes.
diff --git a/embassy-nrf/src/pdm.rs b/embassy-nrf/src/pdm.rs
index b6ee52850..bc28f5c8a 100644
--- a/embassy-nrf/src/pdm.rs
+++ b/embassy-nrf/src/pdm.rs
@@ -4,7 +4,7 @@
 
 use core::future::poll_fn;
 use core::marker::PhantomData;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
@@ -13,7 +13,7 @@ use embassy_sync::waitqueue::AtomicWaker;
 use fixed::types::I7F1;
 
 use crate::chip::EASY_DMA_SIZE;
-use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin, DISCONNECTED};
+use crate::gpio::{AnyPin, DISCONNECTED, Pin as GpioPin, SealedPin};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::pdm::vals;
diff --git a/embassy-nrf/src/ppi/dppi.rs b/embassy-nrf/src/ppi/dppi.rs
index 078d2fd1c..168647be3 100644
--- a/embassy-nrf/src/ppi/dppi.rs
+++ b/embassy-nrf/src/ppi/dppi.rs
@@ -1,5 +1,5 @@
 use super::{Channel, ConfigurableChannel, Event, Ppi, Task};
-use crate::{pac, Peri};
+use crate::{Peri, pac};
 
 const DPPI_ENABLE_BIT: u32 = 0x8000_0000;
 const DPPI_CHANNEL_MASK: u32 = 0x0000_00FF;
diff --git a/embassy-nrf/src/ppi/mod.rs b/embassy-nrf/src/ppi/mod.rs
index 2bcf72e9c..f30c2218d 100644
--- a/embassy-nrf/src/ppi/mod.rs
+++ b/embassy-nrf/src/ppi/mod.rs
@@ -18,9 +18,9 @@
 use core::marker::PhantomData;
 use core::ptr::NonNull;
 
-use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
+use embassy_hal_internal::{Peri, PeripheralType, impl_peripheral};
 
-use crate::pac::common::{Reg, RW, W};
+use crate::pac::common::{RW, Reg, W};
 use crate::peripherals;
 
 #[cfg_attr(feature = "_dppi", path = "dppi.rs")]
diff --git a/embassy-nrf/src/ppi/ppi.rs b/embassy-nrf/src/ppi/ppi.rs
index 531c25444..18bc8b8db 100644
--- a/embassy-nrf/src/ppi/ppi.rs
+++ b/embassy-nrf/src/ppi/ppi.rs
@@ -1,5 +1,5 @@
 use super::{Channel, ConfigurableChannel, Event, Ppi, Task};
-use crate::{pac, Peri};
+use crate::{Peri, pac};
 
 impl<'d> Task<'d> {
     fn reg_val(&self) -> u32 {
diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs
index d67cb546b..e038f44b8 100644
--- a/embassy-nrf/src/pwm.rs
+++ b/embassy-nrf/src/pwm.rs
@@ -2,11 +2,11 @@
 
 #![macro_use]
 
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 
 use embassy_hal_internal::{Peri, PeripheralType};
 
-use crate::gpio::{convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _, DISCONNECTED};
+use crate::gpio::{AnyPin, DISCONNECTED, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _, convert_drive};
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::pwm::vals;
 use crate::ppi::{Event, Task};
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs
index 6f4524716..6bb7c033e 100755
--- a/embassy-nrf/src/qspi.rs
+++ b/embassy-nrf/src/qspi.rs
@@ -2,7 +2,7 @@
 
 #![macro_use]
 
-use core::future::{poll_fn, Future};
+use core::future::{Future, poll_fn};
 use core::marker::PhantomData;
 use core::ptr;
 use core::task::Poll;
diff --git a/embassy-nrf/src/radio/ieee802154.rs b/embassy-nrf/src/radio/ieee802154.rs
index 62af03a5a..54b463343 100644
--- a/embassy-nrf/src/radio/ieee802154.rs
+++ b/embassy-nrf/src/radio/ieee802154.rs
@@ -1,18 +1,18 @@
 //! IEEE 802.15.4 radio driver
 
 use core::marker::PhantomData;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
 
 use super::{Error, InterruptHandler, TxPower};
+use crate::Peri;
 use crate::interrupt::typelevel::Interrupt;
 use crate::interrupt::{self};
 use crate::pac::radio::vals;
 pub use crate::pac::radio::vals::State as RadioState;
 use crate::radio::Instance;
-use crate::Peri;
 
 /// Default (IEEE compliant) Start of Frame Delimiter
 pub const DEFAULT_SFD: u8 = 0xA7;
@@ -52,6 +52,7 @@ impl<'d> Radio<'d> {
         // Disable and enable to reset peripheral
         r.power().write(|w| w.set_power(false));
         r.power().write(|w| w.set_power(true));
+        errata::post_power();
 
         // Enable 802.15.4 mode
         r.mode().write(|w| w.set_mode(vals::Mode::IEEE802154_250KBIT));
@@ -541,3 +542,19 @@ fn dma_start_fence() {
 fn dma_end_fence() {
     compiler_fence(Ordering::Acquire);
 }
+
+mod errata {
+    pub fn post_power() {
+        // Workaround for anomaly 158
+        #[cfg(feature = "_nrf5340-net")]
+        for i in 0..32 {
+            let info = crate::pac::FICR.trimcnf(i);
+            let addr = info.addr().read();
+            if addr & 0xFFFF_F000 == crate::pac::RADIO.as_ptr() as u32 {
+                unsafe {
+                    (addr as *mut u32).write_volatile(info.data().read());
+                }
+            }
+        }
+    }
+}
diff --git a/embassy-nrf/src/rramc.rs b/embassy-nrf/src/rramc.rs
index 7cb5660cb..521ac4ee7 100644
--- a/embassy-nrf/src/rramc.rs
+++ b/embassy-nrf/src/rramc.rs
@@ -7,7 +7,7 @@ use embedded_storage::nor_flash::{
 };
 
 use crate::peripherals::RRAMC;
-use crate::{pac, Peri};
+use crate::{Peri, pac};
 
 //
 // Export Nvmc alias and page size for downstream compatibility
diff --git a/embassy-nrf/src/saadc.rs b/embassy-nrf/src/saadc.rs
index fd48faabb..a199c1c4d 100644
--- a/embassy-nrf/src/saadc.rs
+++ b/embassy-nrf/src/saadc.rs
@@ -4,11 +4,11 @@
 
 use core::future::poll_fn;
 use core::marker::PhantomData;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{impl_peripheral, Peri};
+use embassy_hal_internal::{Peri, impl_peripheral};
 use embassy_sync::waitqueue::AtomicWaker;
 pub(crate) use vals::Psel as InputChannel;
 
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index c410e49fd..ce994dbc9 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -6,17 +6,17 @@ use core::future::poll_fn;
 use core::marker::PhantomData;
 #[cfg(feature = "_nrf52832_anomaly_109")]
 use core::sync::atomic::AtomicU8;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
 use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
-pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
+pub use embedded_hal_02::spi::{MODE_0, MODE_1, MODE_2, MODE_3, Mode, Phase, Polarity};
 pub use pac::spim::vals::{Frequency, Order as BitOrder};
 
 use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
-use crate::gpio::{self, convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _};
+use crate::gpio::{self, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _, convert_drive};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::spim::vals;
diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs
index 713163a55..885821146 100644
--- a/embassy-nrf/src/spis.rs
+++ b/embassy-nrf/src/spis.rs
@@ -3,17 +3,17 @@
 #![macro_use]
 use core::future::poll_fn;
 use core::marker::PhantomData;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
 use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
-pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
+pub use embedded_hal_02::spi::{MODE_0, MODE_1, MODE_2, MODE_3, Mode, Phase, Polarity};
 pub use pac::spis::vals::Order as BitOrder;
 
 use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
-use crate::gpio::{self, convert_drive, AnyPin, OutputDrive, Pin as GpioPin, SealedPin as _};
+use crate::gpio::{self, AnyPin, OutputDrive, Pin as GpioPin, SealedPin as _, convert_drive};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::spis::vals;
diff --git a/embassy-nrf/src/temp.rs b/embassy-nrf/src/temp.rs
index 44be0f6d1..a20e300b7 100644
--- a/embassy-nrf/src/temp.rs
+++ b/embassy-nrf/src/temp.rs
@@ -9,7 +9,7 @@ use fixed::types::I30F2;
 
 use crate::interrupt::InterruptExt;
 use crate::peripherals::TEMP;
-use crate::{interrupt, pac, Peri};
+use crate::{Peri, interrupt, pac};
 
 /// Interrupt handler.
 pub struct InterruptHandler {
diff --git a/embassy-nrf/src/time_driver.rs b/embassy-nrf/src/time_driver.rs
index 03f4c2e2b..b723e2334 100644
--- a/embassy-nrf/src/time_driver.rs
+++ b/embassy-nrf/src/time_driver.rs
@@ -1,9 +1,9 @@
 use core::cell::{Cell, RefCell};
-use core::sync::atomic::{compiler_fence, AtomicU32, Ordering};
+use core::sync::atomic::{AtomicU32, Ordering, compiler_fence};
 
 use critical_section::CriticalSection;
-use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
 use embassy_sync::blocking_mutex::CriticalSectionMutex as Mutex;
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
 use embassy_time_driver::Driver;
 use embassy_time_queue_utils::Queue;
 
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs
index 943ea9d31..93255c832 100644
--- a/embassy-nrf/src/twim.rs
+++ b/embassy-nrf/src/twim.rs
@@ -4,8 +4,8 @@
 
 use core::future::poll_fn;
 use core::marker::PhantomData;
-use core::sync::atomic::compiler_fence;
 use core::sync::atomic::Ordering::SeqCst;
+use core::sync::atomic::compiler_fence;
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs
index dd4978b3e..2bc0a5c13 100644
--- a/embassy-nrf/src/twis.rs
+++ b/embassy-nrf/src/twis.rs
@@ -2,10 +2,10 @@
 
 #![macro_use]
 
-use core::future::{poll_fn, Future};
+use core::future::{Future, poll_fn};
 use core::marker::PhantomData;
-use core::sync::atomic::compiler_fence;
 use core::sync::atomic::Ordering::SeqCst;
+use core::sync::atomic::compiler_fence;
 use core::task::Poll;
 
 use embassy_hal_internal::{Peri, PeripheralType};
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index 66fb3b3f2..1ee452173 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -15,7 +15,7 @@
 
 use core::future::poll_fn;
 use core::marker::PhantomData;
-use core::sync::atomic::{compiler_fence, AtomicU8, Ordering};
+use core::sync::atomic::{AtomicU8, Ordering, compiler_fence};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
@@ -25,7 +25,7 @@ use embassy_sync::waitqueue::AtomicWaker;
 pub use pac::uarte::vals::{Baudrate, ConfigParity as Parity};
 
 use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
-use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits, SealedPin as _, DISCONNECTED};
+use crate::gpio::{self, AnyPin, DISCONNECTED, Pin as GpioPin, PselBits, SealedPin as _};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::uarte::vals;
diff --git a/embassy-nrf/src/usb/mod.rs b/embassy-nrf/src/usb/mod.rs
index 2a32fe922..07cf2578a 100644
--- a/embassy-nrf/src/usb/mod.rs
+++ b/embassy-nrf/src/usb/mod.rs
@@ -4,10 +4,10 @@
 
 pub mod vbus_detect;
 
-use core::future::{poll_fn, Future};
+use core::future::{Future, poll_fn};
 use core::marker::PhantomData;
 use core::mem::MaybeUninit;
-use core::sync::atomic::{compiler_fence, AtomicU32, Ordering};
+use core::sync::atomic::{AtomicU32, Ordering, compiler_fence};
 use core::task::Poll;
 
 use cortex_m::peripheral::NVIC;
@@ -330,11 +330,7 @@ impl<'d, V: VbusDetect> driver::Bus for Bus<'d, V> {
                 let mut was_enabled = false;
                 regs.epinen().modify(|w| {
                     was_enabled = (w.0 & mask) != 0;
-                    if enabled {
-                        w.0 |= mask
-                    } else {
-                        w.0 &= !mask
-                    }
+                    if enabled { w.0 |= mask } else { w.0 &= !mask }
                 });
 
                 let ready_mask = In::mask(i);
diff --git a/embassy-nrf/src/usb/vbus_detect.rs b/embassy-nrf/src/usb/vbus_detect.rs
index 33cf91ee2..f24a7bff5 100644
--- a/embassy-nrf/src/usb/vbus_detect.rs
+++ b/embassy-nrf/src/usb/vbus_detect.rs
@@ -1,6 +1,6 @@
 //! Trait and implementations for performing VBUS detection.
 
-use core::future::{poll_fn, Future};
+use core::future::{Future, poll_fn};
 use core::sync::atomic::{AtomicBool, Ordering};
 use core::task::Poll;
 
diff --git a/embassy-nrf/src/util.rs b/embassy-nrf/src/util.rs
index 78f71719f..87118d347 100644
--- a/embassy-nrf/src/util.rs
+++ b/embassy-nrf/src/util.rs
@@ -15,9 +15,5 @@ pub(crate) fn slice_in_ram<T>(slice: *const [T]) -> bool {
 
 /// Return an error if slice is not in RAM. Skips check if slice is zero-length.
 pub(crate) fn slice_in_ram_or<T, E>(slice: *const [T], err: E) -> Result<(), E> {
-    if slice_in_ram(slice) {
-        Ok(())
-    } else {
-        Err(err)
-    }
+    if slice_in_ram(slice) { Ok(()) } else { Err(err) }
 }
diff --git a/embassy-nrf/src/wdt.rs b/embassy-nrf/src/wdt.rs
index dc99a16f5..6afd73431 100644
--- a/embassy-nrf/src/wdt.rs
+++ b/embassy-nrf/src/wdt.rs
@@ -11,7 +11,7 @@ use embassy_hal_internal::PeripheralType;
 
 use crate::pac::wdt::vals;
 pub use crate::pac::wdt::vals::{Halt as HaltConfig, Sleep as SleepConfig};
-use crate::{interrupt, pac, peripherals, Peri};
+use crate::{Peri, interrupt, pac, peripherals};
 
 const MIN_TICKS: u32 = 15;