diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-nrf | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-nrf')
30 files changed, 460 insertions, 511 deletions
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index b4fe2d874..9bc1c1e7a 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs | |||
| @@ -15,7 +15,6 @@ use core::slice; | |||
| 15 | use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering}; | 15 | use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering}; |
| 16 | use core::task::Poll; | 16 | use core::task::Poll; |
| 17 | 17 | ||
| 18 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 19 | use embassy_hal_common::atomic_ring_buffer::RingBuffer; | 18 | use embassy_hal_common::atomic_ring_buffer::RingBuffer; |
| 20 | use embassy_hal_common::{into_ref, PeripheralRef}; | 19 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 21 | use embassy_sync::waitqueue::AtomicWaker; | 20 | use embassy_sync::waitqueue::AtomicWaker; |
| @@ -24,13 +23,13 @@ pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Pari | |||
| 24 | 23 | ||
| 25 | use crate::gpio::sealed::Pin; | 24 | use crate::gpio::sealed::Pin; |
| 26 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; | 25 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 27 | use crate::interrupt::{self}; | 26 | use crate::interrupt::typelevel::Interrupt; |
| 28 | use crate::ppi::{ | 27 | use crate::ppi::{ |
| 29 | self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task, | 28 | self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task, |
| 30 | }; | 29 | }; |
| 31 | use crate::timer::{Instance as TimerInstance, Timer}; | 30 | use crate::timer::{Instance as TimerInstance, Timer}; |
| 32 | use crate::uarte::{apply_workaround_for_enable_anomaly, Config, Instance as UarteInstance}; | 31 | use crate::uarte::{apply_workaround_for_enable_anomaly, Config, Instance as UarteInstance}; |
| 33 | use crate::{pac, Peripheral}; | 32 | use crate::{interrupt, pac, Peripheral}; |
| 34 | 33 | ||
| 35 | mod sealed { | 34 | mod sealed { |
| 36 | use super::*; | 35 | use super::*; |
| @@ -77,7 +76,7 @@ pub struct InterruptHandler<U: UarteInstance> { | |||
| 77 | _phantom: PhantomData<U>, | 76 | _phantom: PhantomData<U>, |
| 78 | } | 77 | } |
| 79 | 78 | ||
| 80 | impl<U: UarteInstance> interrupt::Handler<U::Interrupt> for InterruptHandler<U> { | 79 | impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for InterruptHandler<U> { |
| 81 | unsafe fn on_interrupt() { | 80 | unsafe fn on_interrupt() { |
| 82 | //trace!("irq: start"); | 81 | //trace!("irq: start"); |
| 83 | let r = U::regs(); | 82 | let r = U::regs(); |
| @@ -202,7 +201,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 202 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 201 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 203 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 202 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 204 | ppi_group: impl Peripheral<P = impl Group> + 'd, | 203 | ppi_group: impl Peripheral<P = impl Group> + 'd, |
| 205 | _irq: impl interrupt::Binding<U::Interrupt, InterruptHandler<U>> + 'd, | 204 | _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd, |
| 206 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 205 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 207 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 206 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 208 | config: Config, | 207 | config: Config, |
| @@ -237,7 +236,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 237 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 236 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 238 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 237 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 239 | ppi_group: impl Peripheral<P = impl Group> + 'd, | 238 | ppi_group: impl Peripheral<P = impl Group> + 'd, |
| 240 | _irq: impl interrupt::Binding<U::Interrupt, InterruptHandler<U>> + 'd, | 239 | _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd, |
| 241 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 240 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 242 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 241 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 243 | cts: impl Peripheral<P = impl GpioPin> + 'd, | 242 | cts: impl Peripheral<P = impl GpioPin> + 'd, |
diff --git a/embassy-nrf/src/chips/nrf52805.rs b/embassy-nrf/src/chips/nrf52805.rs index e406c081b..8fbd760dc 100644 --- a/embassy-nrf/src/chips/nrf52805.rs +++ b/embassy-nrf/src/chips/nrf52805.rs | |||
| @@ -208,33 +208,29 @@ impl_ppi_channel!(PPI_CH31, 31 => static); | |||
| 208 | impl_saadc_input!(P0_04, ANALOG_INPUT2); | 208 | impl_saadc_input!(P0_04, ANALOG_INPUT2); |
| 209 | impl_saadc_input!(P0_05, ANALOG_INPUT3); | 209 | impl_saadc_input!(P0_05, ANALOG_INPUT3); |
| 210 | 210 | ||
| 211 | pub mod irqs { | 211 | embassy_cortex_m::interrupt_mod!( |
| 212 | use embassy_cortex_m::interrupt::_export::declare; | 212 | POWER_CLOCK, |
| 213 | 213 | RADIO, | |
| 214 | use crate::pac::Interrupt as InterruptEnum; | 214 | UARTE0_UART0, |
| 215 | 215 | TWIM0_TWIS0_TWI0, | |
| 216 | declare!(POWER_CLOCK); | 216 | SPIM0_SPIS0_SPI0, |
| 217 | declare!(RADIO); | 217 | GPIOTE, |
| 218 | declare!(UARTE0_UART0); | 218 | SAADC, |
| 219 | declare!(TWIM0_TWIS0_TWI0); | 219 | TIMER0, |
| 220 | declare!(SPIM0_SPIS0_SPI0); | 220 | TIMER1, |
| 221 | declare!(GPIOTE); | 221 | TIMER2, |
| 222 | declare!(SAADC); | 222 | RTC0, |
| 223 | declare!(TIMER0); | 223 | TEMP, |
| 224 | declare!(TIMER1); | 224 | RNG, |
| 225 | declare!(TIMER2); | 225 | ECB, |
| 226 | declare!(RTC0); | 226 | CCM_AAR, |
| 227 | declare!(TEMP); | 227 | WDT, |
| 228 | declare!(RNG); | 228 | RTC1, |
| 229 | declare!(ECB); | 229 | QDEC, |
| 230 | declare!(CCM_AAR); | 230 | SWI0_EGU0, |
| 231 | declare!(WDT); | 231 | SWI1_EGU1, |
| 232 | declare!(RTC1); | 232 | SWI2, |
| 233 | declare!(QDEC); | 233 | SWI3, |
| 234 | declare!(SWI0_EGU0); | 234 | SWI4, |
| 235 | declare!(SWI1_EGU1); | 235 | SWI5, |
| 236 | declare!(SWI2); | 236 | ); |
| 237 | declare!(SWI3); | ||
| 238 | declare!(SWI4); | ||
| 239 | declare!(SWI5); | ||
| 240 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs index 153795e54..bbf8f7ccf 100644 --- a/embassy-nrf/src/chips/nrf52810.rs +++ b/embassy-nrf/src/chips/nrf52810.rs | |||
| @@ -234,36 +234,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5); | |||
| 234 | impl_saadc_input!(P0_30, ANALOG_INPUT6); | 234 | impl_saadc_input!(P0_30, ANALOG_INPUT6); |
| 235 | impl_saadc_input!(P0_31, ANALOG_INPUT7); | 235 | impl_saadc_input!(P0_31, ANALOG_INPUT7); |
| 236 | 236 | ||
| 237 | pub mod irqs { | 237 | embassy_cortex_m::interrupt_mod!( |
| 238 | use embassy_cortex_m::interrupt::_export::declare; | 238 | POWER_CLOCK, |
| 239 | 239 | RADIO, | |
| 240 | use crate::pac::Interrupt as InterruptEnum; | 240 | UARTE0_UART0, |
| 241 | 241 | TWIM0_TWIS0_TWI0, | |
| 242 | declare!(POWER_CLOCK); | 242 | SPIM0_SPIS0_SPI0, |
| 243 | declare!(RADIO); | 243 | GPIOTE, |
| 244 | declare!(UARTE0_UART0); | 244 | SAADC, |
| 245 | declare!(TWIM0_TWIS0_TWI0); | 245 | TIMER0, |
| 246 | declare!(SPIM0_SPIS0_SPI0); | 246 | TIMER1, |
| 247 | declare!(GPIOTE); | 247 | TIMER2, |
| 248 | declare!(SAADC); | 248 | RTC0, |
| 249 | declare!(TIMER0); | 249 | TEMP, |
| 250 | declare!(TIMER1); | 250 | RNG, |
| 251 | declare!(TIMER2); | 251 | ECB, |
| 252 | declare!(RTC0); | 252 | CCM_AAR, |
| 253 | declare!(TEMP); | 253 | WDT, |
| 254 | declare!(RNG); | 254 | RTC1, |
| 255 | declare!(ECB); | 255 | QDEC, |
| 256 | declare!(CCM_AAR); | 256 | COMP, |
| 257 | declare!(WDT); | 257 | SWI0_EGU0, |
| 258 | declare!(RTC1); | 258 | SWI1_EGU1, |
| 259 | declare!(QDEC); | 259 | SWI2, |
| 260 | declare!(COMP); | 260 | SWI3, |
| 261 | declare!(SWI0_EGU0); | 261 | SWI4, |
| 262 | declare!(SWI1_EGU1); | 262 | SWI5, |
| 263 | declare!(SWI2); | 263 | PWM0, |
| 264 | declare!(SWI3); | 264 | PDM, |
| 265 | declare!(SWI4); | 265 | ); |
| 266 | declare!(SWI5); | ||
| 267 | declare!(PWM0); | ||
| 268 | declare!(PDM); | ||
| 269 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52811.rs b/embassy-nrf/src/chips/nrf52811.rs index a7a7cf58c..31a8dd6af 100644 --- a/embassy-nrf/src/chips/nrf52811.rs +++ b/embassy-nrf/src/chips/nrf52811.rs | |||
| @@ -236,36 +236,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5); | |||
| 236 | impl_saadc_input!(P0_30, ANALOG_INPUT6); | 236 | impl_saadc_input!(P0_30, ANALOG_INPUT6); |
| 237 | impl_saadc_input!(P0_31, ANALOG_INPUT7); | 237 | impl_saadc_input!(P0_31, ANALOG_INPUT7); |
| 238 | 238 | ||
| 239 | pub mod irqs { | 239 | embassy_cortex_m::interrupt_mod!( |
| 240 | use embassy_cortex_m::interrupt::_export::declare; | 240 | POWER_CLOCK, |
| 241 | 241 | RADIO, | |
| 242 | use crate::pac::Interrupt as InterruptEnum; | 242 | UARTE0_UART0, |
| 243 | 243 | TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0, | |
| 244 | declare!(POWER_CLOCK); | 244 | SPIM1_SPIS1_SPI1, |
| 245 | declare!(RADIO); | 245 | GPIOTE, |
| 246 | declare!(UARTE0_UART0); | 246 | SAADC, |
| 247 | declare!(TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0); | 247 | TIMER0, |
| 248 | declare!(SPIM1_SPIS1_SPI1); | 248 | TIMER1, |
| 249 | declare!(GPIOTE); | 249 | TIMER2, |
| 250 | declare!(SAADC); | 250 | RTC0, |
| 251 | declare!(TIMER0); | 251 | TEMP, |
| 252 | declare!(TIMER1); | 252 | RNG, |
| 253 | declare!(TIMER2); | 253 | ECB, |
| 254 | declare!(RTC0); | 254 | CCM_AAR, |
| 255 | declare!(TEMP); | 255 | WDT, |
| 256 | declare!(RNG); | 256 | RTC1, |
| 257 | declare!(ECB); | 257 | QDEC, |
| 258 | declare!(CCM_AAR); | 258 | COMP, |
| 259 | declare!(WDT); | 259 | SWI0_EGU0, |
| 260 | declare!(RTC1); | 260 | SWI1_EGU1, |
| 261 | declare!(QDEC); | 261 | SWI2, |
| 262 | declare!(COMP); | 262 | SWI3, |
| 263 | declare!(SWI0_EGU0); | 263 | SWI4, |
| 264 | declare!(SWI1_EGU1); | 264 | SWI5, |
| 265 | declare!(SWI2); | 265 | PWM0, |
| 266 | declare!(SWI3); | 266 | PDM, |
| 267 | declare!(SWI4); | 267 | ); |
| 268 | declare!(SWI5); | ||
| 269 | declare!(PWM0); | ||
| 270 | declare!(PDM); | ||
| 271 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52820.rs b/embassy-nrf/src/chips/nrf52820.rs index 14a1b8cc9..6a6f4fcf2 100644 --- a/embassy-nrf/src/chips/nrf52820.rs +++ b/embassy-nrf/src/chips/nrf52820.rs | |||
| @@ -224,35 +224,31 @@ impl_ppi_channel!(PPI_CH29, 29 => static); | |||
| 224 | impl_ppi_channel!(PPI_CH30, 30 => static); | 224 | impl_ppi_channel!(PPI_CH30, 30 => static); |
| 225 | impl_ppi_channel!(PPI_CH31, 31 => static); | 225 | impl_ppi_channel!(PPI_CH31, 31 => static); |
| 226 | 226 | ||
| 227 | pub mod irqs { | 227 | embassy_cortex_m::interrupt_mod!( |
| 228 | use embassy_cortex_m::interrupt::_export::declare; | 228 | POWER_CLOCK, |
| 229 | 229 | RADIO, | |
| 230 | use crate::pac::Interrupt as InterruptEnum; | 230 | UARTE0_UART0, |
| 231 | 231 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 232 | declare!(POWER_CLOCK); | 232 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 233 | declare!(RADIO); | 233 | GPIOTE, |
| 234 | declare!(UARTE0_UART0); | 234 | TIMER0, |
| 235 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 235 | TIMER1, |
| 236 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 236 | TIMER2, |
| 237 | declare!(GPIOTE); | 237 | RTC0, |
| 238 | declare!(TIMER0); | 238 | TEMP, |
| 239 | declare!(TIMER1); | 239 | RNG, |
| 240 | declare!(TIMER2); | 240 | ECB, |
| 241 | declare!(RTC0); | 241 | CCM_AAR, |
| 242 | declare!(TEMP); | 242 | WDT, |
| 243 | declare!(RNG); | 243 | RTC1, |
| 244 | declare!(ECB); | 244 | QDEC, |
| 245 | declare!(CCM_AAR); | 245 | COMP, |
| 246 | declare!(WDT); | 246 | SWI0_EGU0, |
| 247 | declare!(RTC1); | 247 | SWI1_EGU1, |
| 248 | declare!(QDEC); | 248 | SWI2_EGU2, |
| 249 | declare!(COMP); | 249 | SWI3_EGU3, |
| 250 | declare!(SWI0_EGU0); | 250 | SWI4_EGU4, |
| 251 | declare!(SWI1_EGU1); | 251 | SWI5_EGU5, |
| 252 | declare!(SWI2_EGU2); | 252 | TIMER3, |
| 253 | declare!(SWI3_EGU3); | 253 | USBD, |
| 254 | declare!(SWI4_EGU4); | 254 | ); |
| 255 | declare!(SWI5_EGU5); | ||
| 256 | declare!(TIMER3); | ||
| 257 | declare!(USBD); | ||
| 258 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52832.rs b/embassy-nrf/src/chips/nrf52832.rs index 83ecd0deb..e43b3d5b2 100644 --- a/embassy-nrf/src/chips/nrf52832.rs +++ b/embassy-nrf/src/chips/nrf52832.rs | |||
| @@ -263,46 +263,42 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); | |||
| 263 | 263 | ||
| 264 | impl_i2s!(I2S, I2S, I2S); | 264 | impl_i2s!(I2S, I2S, I2S); |
| 265 | 265 | ||
| 266 | pub mod irqs { | 266 | embassy_cortex_m::interrupt_mod!( |
| 267 | use embassy_cortex_m::interrupt::_export::declare; | 267 | POWER_CLOCK, |
| 268 | 268 | RADIO, | |
| 269 | use crate::pac::Interrupt as InterruptEnum; | 269 | UARTE0_UART0, |
| 270 | 270 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 271 | declare!(POWER_CLOCK); | 271 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 272 | declare!(RADIO); | 272 | NFCT, |
| 273 | declare!(UARTE0_UART0); | 273 | GPIOTE, |
| 274 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 274 | SAADC, |
| 275 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 275 | TIMER0, |
| 276 | declare!(NFCT); | 276 | TIMER1, |
| 277 | declare!(GPIOTE); | 277 | TIMER2, |
| 278 | declare!(SAADC); | 278 | RTC0, |
| 279 | declare!(TIMER0); | 279 | TEMP, |
| 280 | declare!(TIMER1); | 280 | RNG, |
| 281 | declare!(TIMER2); | 281 | ECB, |
| 282 | declare!(RTC0); | 282 | CCM_AAR, |
| 283 | declare!(TEMP); | 283 | WDT, |
| 284 | declare!(RNG); | 284 | RTC1, |
| 285 | declare!(ECB); | 285 | QDEC, |
| 286 | declare!(CCM_AAR); | 286 | COMP_LPCOMP, |
| 287 | declare!(WDT); | 287 | SWI0_EGU0, |
| 288 | declare!(RTC1); | 288 | SWI1_EGU1, |
| 289 | declare!(QDEC); | 289 | SWI2_EGU2, |
| 290 | declare!(COMP_LPCOMP); | 290 | SWI3_EGU3, |
| 291 | declare!(SWI0_EGU0); | 291 | SWI4_EGU4, |
| 292 | declare!(SWI1_EGU1); | 292 | SWI5_EGU5, |
| 293 | declare!(SWI2_EGU2); | 293 | TIMER3, |
| 294 | declare!(SWI3_EGU3); | 294 | TIMER4, |
| 295 | declare!(SWI4_EGU4); | 295 | PWM0, |
| 296 | declare!(SWI5_EGU5); | 296 | PDM, |
| 297 | declare!(TIMER3); | 297 | MWU, |
| 298 | declare!(TIMER4); | 298 | PWM1, |
| 299 | declare!(PWM0); | 299 | PWM2, |
| 300 | declare!(PDM); | 300 | SPIM2_SPIS2_SPI2, |
| 301 | declare!(MWU); | 301 | RTC2, |
| 302 | declare!(PWM1); | 302 | FPU, |
| 303 | declare!(PWM2); | 303 | I2S, |
| 304 | declare!(SPIM2_SPIS2_SPI2); | 304 | ); |
| 305 | declare!(RTC2); | ||
| 306 | declare!(FPU); | ||
| 307 | declare!(I2S); | ||
| 308 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52833.rs b/embassy-nrf/src/chips/nrf52833.rs index 5e5db04de..d95e3497c 100644 --- a/embassy-nrf/src/chips/nrf52833.rs +++ b/embassy-nrf/src/chips/nrf52833.rs | |||
| @@ -306,50 +306,46 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); | |||
| 306 | 306 | ||
| 307 | impl_i2s!(I2S, I2S, I2S); | 307 | impl_i2s!(I2S, I2S, I2S); |
| 308 | 308 | ||
| 309 | pub mod irqs { | 309 | embassy_cortex_m::interrupt_mod!( |
| 310 | use embassy_cortex_m::interrupt::_export::declare; | 310 | POWER_CLOCK, |
| 311 | 311 | RADIO, | |
| 312 | use crate::pac::Interrupt as InterruptEnum; | 312 | UARTE0_UART0, |
| 313 | 313 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 314 | declare!(POWER_CLOCK); | 314 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 315 | declare!(RADIO); | 315 | NFCT, |
| 316 | declare!(UARTE0_UART0); | 316 | GPIOTE, |
| 317 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 317 | SAADC, |
| 318 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 318 | TIMER0, |
| 319 | declare!(NFCT); | 319 | TIMER1, |
| 320 | declare!(GPIOTE); | 320 | TIMER2, |
| 321 | declare!(SAADC); | 321 | RTC0, |
| 322 | declare!(TIMER0); | 322 | TEMP, |
| 323 | declare!(TIMER1); | 323 | RNG, |
| 324 | declare!(TIMER2); | 324 | ECB, |
| 325 | declare!(RTC0); | 325 | CCM_AAR, |
| 326 | declare!(TEMP); | 326 | WDT, |
| 327 | declare!(RNG); | 327 | RTC1, |
| 328 | declare!(ECB); | 328 | QDEC, |
| 329 | declare!(CCM_AAR); | 329 | COMP_LPCOMP, |
| 330 | declare!(WDT); | 330 | SWI0_EGU0, |
| 331 | declare!(RTC1); | 331 | SWI1_EGU1, |
| 332 | declare!(QDEC); | 332 | SWI2_EGU2, |
| 333 | declare!(COMP_LPCOMP); | 333 | SWI3_EGU3, |
| 334 | declare!(SWI0_EGU0); | 334 | SWI4_EGU4, |
| 335 | declare!(SWI1_EGU1); | 335 | SWI5_EGU5, |
| 336 | declare!(SWI2_EGU2); | 336 | TIMER3, |
| 337 | declare!(SWI3_EGU3); | 337 | TIMER4, |
| 338 | declare!(SWI4_EGU4); | 338 | PWM0, |
| 339 | declare!(SWI5_EGU5); | 339 | PDM, |
| 340 | declare!(TIMER3); | 340 | MWU, |
| 341 | declare!(TIMER4); | 341 | PWM1, |
| 342 | declare!(PWM0); | 342 | PWM2, |
| 343 | declare!(PDM); | 343 | SPIM2_SPIS2_SPI2, |
| 344 | declare!(MWU); | 344 | RTC2, |
| 345 | declare!(PWM1); | 345 | FPU, |
| 346 | declare!(PWM2); | 346 | USBD, |
| 347 | declare!(SPIM2_SPIS2_SPI2); | 347 | UARTE1, |
| 348 | declare!(RTC2); | 348 | PWM3, |
| 349 | declare!(FPU); | 349 | SPIM3, |
| 350 | declare!(USBD); | 350 | I2S, |
| 351 | declare!(UARTE1); | 351 | ); |
| 352 | declare!(PWM3); | ||
| 353 | declare!(SPIM3); | ||
| 354 | declare!(I2S); | ||
| 355 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52840.rs b/embassy-nrf/src/chips/nrf52840.rs index f6d33f85c..0094b1220 100644 --- a/embassy-nrf/src/chips/nrf52840.rs +++ b/embassy-nrf/src/chips/nrf52840.rs | |||
| @@ -311,52 +311,48 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); | |||
| 311 | 311 | ||
| 312 | impl_i2s!(I2S, I2S, I2S); | 312 | impl_i2s!(I2S, I2S, I2S); |
| 313 | 313 | ||
| 314 | pub mod irqs { | 314 | embassy_cortex_m::interrupt_mod!( |
| 315 | use embassy_cortex_m::interrupt::_export::declare; | 315 | POWER_CLOCK, |
| 316 | 316 | RADIO, | |
| 317 | use crate::pac::Interrupt as InterruptEnum; | 317 | UARTE0_UART0, |
| 318 | 318 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 319 | declare!(POWER_CLOCK); | 319 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 320 | declare!(RADIO); | 320 | NFCT, |
| 321 | declare!(UARTE0_UART0); | 321 | GPIOTE, |
| 322 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 322 | SAADC, |
| 323 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 323 | TIMER0, |
| 324 | declare!(NFCT); | 324 | TIMER1, |
| 325 | declare!(GPIOTE); | 325 | TIMER2, |
| 326 | declare!(SAADC); | 326 | RTC0, |
| 327 | declare!(TIMER0); | 327 | TEMP, |
| 328 | declare!(TIMER1); | 328 | RNG, |
| 329 | declare!(TIMER2); | 329 | ECB, |
| 330 | declare!(RTC0); | 330 | CCM_AAR, |
| 331 | declare!(TEMP); | 331 | WDT, |
| 332 | declare!(RNG); | 332 | RTC1, |
| 333 | declare!(ECB); | 333 | QDEC, |
| 334 | declare!(CCM_AAR); | 334 | COMP_LPCOMP, |
| 335 | declare!(WDT); | 335 | SWI0_EGU0, |
| 336 | declare!(RTC1); | 336 | SWI1_EGU1, |
| 337 | declare!(QDEC); | 337 | SWI2_EGU2, |
| 338 | declare!(COMP_LPCOMP); | 338 | SWI3_EGU3, |
| 339 | declare!(SWI0_EGU0); | 339 | SWI4_EGU4, |
| 340 | declare!(SWI1_EGU1); | 340 | SWI5_EGU5, |
| 341 | declare!(SWI2_EGU2); | 341 | TIMER3, |
| 342 | declare!(SWI3_EGU3); | 342 | TIMER4, |
| 343 | declare!(SWI4_EGU4); | 343 | PWM0, |
| 344 | declare!(SWI5_EGU5); | 344 | PDM, |
| 345 | declare!(TIMER3); | 345 | MWU, |
| 346 | declare!(TIMER4); | 346 | PWM1, |
| 347 | declare!(PWM0); | 347 | PWM2, |
| 348 | declare!(PDM); | 348 | SPIM2_SPIS2_SPI2, |
| 349 | declare!(MWU); | 349 | RTC2, |
| 350 | declare!(PWM1); | 350 | FPU, |
| 351 | declare!(PWM2); | 351 | USBD, |
| 352 | declare!(SPIM2_SPIS2_SPI2); | 352 | UARTE1, |
| 353 | declare!(RTC2); | 353 | QSPI, |
| 354 | declare!(FPU); | 354 | CRYPTOCELL, |
| 355 | declare!(USBD); | 355 | PWM3, |
| 356 | declare!(UARTE1); | 356 | SPIM3, |
| 357 | declare!(QSPI); | 357 | I2S, |
| 358 | declare!(CRYPTOCELL); | 358 | ); |
| 359 | declare!(PWM3); | ||
| 360 | declare!(SPIM3); | ||
| 361 | declare!(I2S); | ||
| 362 | } | ||
diff --git a/embassy-nrf/src/chips/nrf5340_app.rs b/embassy-nrf/src/chips/nrf5340_app.rs index 34f96800f..c10520051 100644 --- a/embassy-nrf/src/chips/nrf5340_app.rs +++ b/embassy-nrf/src/chips/nrf5340_app.rs | |||
| @@ -504,50 +504,46 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5); | |||
| 504 | impl_saadc_input!(P0_19, ANALOG_INPUT6); | 504 | impl_saadc_input!(P0_19, ANALOG_INPUT6); |
| 505 | impl_saadc_input!(P0_20, ANALOG_INPUT7); | 505 | impl_saadc_input!(P0_20, ANALOG_INPUT7); |
| 506 | 506 | ||
| 507 | pub mod irqs { | 507 | embassy_cortex_m::interrupt_mod!( |
| 508 | use embassy_cortex_m::interrupt::_export::declare; | 508 | FPU, |
| 509 | 509 | CACHE, | |
| 510 | use crate::pac::Interrupt as InterruptEnum; | 510 | SPU, |
| 511 | 511 | CLOCK_POWER, | |
| 512 | declare!(FPU); | 512 | SERIAL0, |
| 513 | declare!(CACHE); | 513 | SERIAL1, |
| 514 | declare!(SPU); | 514 | SPIM4, |
| 515 | declare!(CLOCK_POWER); | 515 | SERIAL2, |
| 516 | declare!(SERIAL0); | 516 | SERIAL3, |
| 517 | declare!(SERIAL1); | 517 | GPIOTE0, |
| 518 | declare!(SPIM4); | 518 | SAADC, |
| 519 | declare!(SERIAL2); | 519 | TIMER0, |
| 520 | declare!(SERIAL3); | 520 | TIMER1, |
| 521 | declare!(GPIOTE0); | 521 | TIMER2, |
| 522 | declare!(SAADC); | 522 | RTC0, |
| 523 | declare!(TIMER0); | 523 | RTC1, |
| 524 | declare!(TIMER1); | 524 | WDT0, |
| 525 | declare!(TIMER2); | 525 | WDT1, |
| 526 | declare!(RTC0); | 526 | COMP_LPCOMP, |
| 527 | declare!(RTC1); | 527 | EGU0, |
| 528 | declare!(WDT0); | 528 | EGU1, |
| 529 | declare!(WDT1); | 529 | EGU2, |
| 530 | declare!(COMP_LPCOMP); | 530 | EGU3, |
| 531 | declare!(EGU0); | 531 | EGU4, |
| 532 | declare!(EGU1); | 532 | EGU5, |
| 533 | declare!(EGU2); | 533 | PWM0, |
| 534 | declare!(EGU3); | 534 | PWM1, |
| 535 | declare!(EGU4); | 535 | PWM2, |
| 536 | declare!(EGU5); | 536 | PWM3, |
| 537 | declare!(PWM0); | 537 | PDM0, |
| 538 | declare!(PWM1); | 538 | I2S0, |
| 539 | declare!(PWM2); | 539 | IPC, |
| 540 | declare!(PWM3); | 540 | QSPI, |
| 541 | declare!(PDM0); | 541 | NFCT, |
| 542 | declare!(I2S0); | 542 | GPIOTE1, |
| 543 | declare!(IPC); | 543 | QDEC0, |
| 544 | declare!(QSPI); | 544 | QDEC1, |
| 545 | declare!(NFCT); | 545 | USBD, |
| 546 | declare!(GPIOTE1); | 546 | USBREGULATOR, |
| 547 | declare!(QDEC0); | 547 | KMU, |
| 548 | declare!(QDEC1); | 548 | CRYPTOCELL, |
| 549 | declare!(USBD); | 549 | ); |
| 550 | declare!(USBREGULATOR); | ||
| 551 | declare!(KMU); | ||
| 552 | declare!(CRYPTOCELL); | ||
| 553 | } | ||
diff --git a/embassy-nrf/src/chips/nrf5340_net.rs b/embassy-nrf/src/chips/nrf5340_net.rs index 1e59528cb..a6fb1d4cc 100644 --- a/embassy-nrf/src/chips/nrf5340_net.rs +++ b/embassy-nrf/src/chips/nrf5340_net.rs | |||
| @@ -340,29 +340,25 @@ impl_ppi_channel!(PPI_CH29, 29 => configurable); | |||
| 340 | impl_ppi_channel!(PPI_CH30, 30 => configurable); | 340 | impl_ppi_channel!(PPI_CH30, 30 => configurable); |
| 341 | impl_ppi_channel!(PPI_CH31, 31 => configurable); | 341 | impl_ppi_channel!(PPI_CH31, 31 => configurable); |
| 342 | 342 | ||
| 343 | pub mod irqs { | 343 | embassy_cortex_m::interrupt_mod!( |
| 344 | use embassy_cortex_m::interrupt::_export::declare; | 344 | CLOCK_POWER, |
| 345 | 345 | RADIO, | |
| 346 | use crate::pac::Interrupt as InterruptEnum; | 346 | RNG, |
| 347 | 347 | GPIOTE, | |
| 348 | declare!(CLOCK_POWER); | 348 | WDT, |
| 349 | declare!(RADIO); | 349 | TIMER0, |
| 350 | declare!(RNG); | 350 | ECB, |
| 351 | declare!(GPIOTE); | 351 | AAR_CCM, |
| 352 | declare!(WDT); | 352 | TEMP, |
| 353 | declare!(TIMER0); | 353 | RTC0, |
| 354 | declare!(ECB); | 354 | IPC, |
| 355 | declare!(AAR_CCM); | 355 | SERIAL0, |
| 356 | declare!(TEMP); | 356 | EGU0, |
| 357 | declare!(RTC0); | 357 | RTC1, |
| 358 | declare!(IPC); | 358 | TIMER1, |
| 359 | declare!(SERIAL0); | 359 | TIMER2, |
| 360 | declare!(EGU0); | 360 | SWI0, |
| 361 | declare!(RTC1); | 361 | SWI1, |
| 362 | declare!(TIMER1); | 362 | SWI2, |
| 363 | declare!(TIMER2); | 363 | SWI3, |
| 364 | declare!(SWI0); | 364 | ); |
| 365 | declare!(SWI1); | ||
| 366 | declare!(SWI2); | ||
| 367 | declare!(SWI3); | ||
| 368 | } | ||
diff --git a/embassy-nrf/src/chips/nrf9160.rs b/embassy-nrf/src/chips/nrf9160.rs index d2b45114f..b6ae78bbe 100644 --- a/embassy-nrf/src/chips/nrf9160.rs +++ b/embassy-nrf/src/chips/nrf9160.rs | |||
| @@ -366,40 +366,36 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5); | |||
| 366 | impl_saadc_input!(P0_19, ANALOG_INPUT6); | 366 | impl_saadc_input!(P0_19, ANALOG_INPUT6); |
| 367 | impl_saadc_input!(P0_20, ANALOG_INPUT7); | 367 | impl_saadc_input!(P0_20, ANALOG_INPUT7); |
| 368 | 368 | ||
| 369 | pub mod irqs { | 369 | embassy_cortex_m::interrupt_mod!( |
| 370 | use embassy_cortex_m::interrupt::_export::declare; | 370 | SPU, |
| 371 | 371 | CLOCK_POWER, | |
| 372 | use crate::pac::Interrupt as InterruptEnum; | 372 | UARTE0_SPIM0_SPIS0_TWIM0_TWIS0, |
| 373 | 373 | UARTE1_SPIM1_SPIS1_TWIM1_TWIS1, | |
| 374 | declare!(SPU); | 374 | UARTE2_SPIM2_SPIS2_TWIM2_TWIS2, |
| 375 | declare!(CLOCK_POWER); | 375 | UARTE3_SPIM3_SPIS3_TWIM3_TWIS3, |
| 376 | declare!(UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); | 376 | GPIOTE0, |
| 377 | declare!(UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); | 377 | SAADC, |
| 378 | declare!(UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); | 378 | TIMER0, |
| 379 | declare!(UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); | 379 | TIMER1, |
| 380 | declare!(GPIOTE0); | 380 | TIMER2, |
| 381 | declare!(SAADC); | 381 | RTC0, |
| 382 | declare!(TIMER0); | 382 | RTC1, |
| 383 | declare!(TIMER1); | 383 | WDT, |
| 384 | declare!(TIMER2); | 384 | EGU0, |
| 385 | declare!(RTC0); | 385 | EGU1, |
| 386 | declare!(RTC1); | 386 | EGU2, |
| 387 | declare!(WDT); | 387 | EGU3, |
| 388 | declare!(EGU0); | 388 | EGU4, |
| 389 | declare!(EGU1); | 389 | EGU5, |
| 390 | declare!(EGU2); | 390 | PWM0, |
| 391 | declare!(EGU3); | 391 | PWM1, |
| 392 | declare!(EGU4); | 392 | PWM2, |
| 393 | declare!(EGU5); | 393 | PDM, |
| 394 | declare!(PWM0); | 394 | PWM3, |
| 395 | declare!(PWM1); | 395 | I2S, |
| 396 | declare!(PWM2); | 396 | IPC, |
| 397 | declare!(PDM); | 397 | FPU, |
| 398 | declare!(PWM3); | 398 | GPIOTE1, |
| 399 | declare!(I2S); | 399 | KMU, |
| 400 | declare!(IPC); | 400 | CRYPTOCELL, |
| 401 | declare!(FPU); | 401 | ); |
| 402 | declare!(GPIOTE1); | ||
| 403 | declare!(KMU); | ||
| 404 | declare!(CRYPTOCELL); | ||
| 405 | } | ||
diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs index 2ec5220a7..1d7725bd3 100644 --- a/embassy-nrf/src/gpiote.rs +++ b/embassy-nrf/src/gpiote.rs | |||
| @@ -9,7 +9,7 @@ use embassy_sync::waitqueue::AtomicWaker; | |||
| 9 | 9 | ||
| 10 | use crate::gpio::sealed::Pin as _; | 10 | use crate::gpio::sealed::Pin as _; |
| 11 | use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin}; | 11 | use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin}; |
| 12 | use crate::interrupt::Interrupt; | 12 | use crate::interrupt::InterruptExt; |
| 13 | use crate::ppi::{Event, Task}; | 13 | use crate::ppi::{Event, Task}; |
| 14 | use crate::{interrupt, pac, peripherals}; | 14 | use crate::{interrupt, pac, peripherals}; |
| 15 | 15 | ||
| @@ -75,15 +75,15 @@ pub(crate) fn init(irq_prio: crate::interrupt::Priority) { | |||
| 75 | 75 | ||
| 76 | // Enable interrupts | 76 | // Enable interrupts |
| 77 | #[cfg(any(feature = "nrf5340-app-s", feature = "nrf9160-s"))] | 77 | #[cfg(any(feature = "nrf5340-app-s", feature = "nrf9160-s"))] |
| 78 | type Irq = interrupt::GPIOTE0; | 78 | let irq = interrupt::GPIOTE0; |
| 79 | #[cfg(any(feature = "nrf5340-app-ns", feature = "nrf9160-ns"))] | 79 | #[cfg(any(feature = "nrf5340-app-ns", feature = "nrf9160-ns"))] |
| 80 | type Irq = interrupt::GPIOTE1; | 80 | let irq = interrupt::GPIOTE1; |
| 81 | #[cfg(any(feature = "_nrf52", feature = "nrf5340-net"))] | 81 | #[cfg(any(feature = "_nrf52", feature = "nrf5340-net"))] |
| 82 | type Irq = interrupt::GPIOTE; | 82 | let irq = interrupt::GPIOTE; |
| 83 | 83 | ||
| 84 | Irq::unpend(); | 84 | irq.unpend(); |
| 85 | Irq::set_priority(irq_prio); | 85 | irq.set_priority(irq_prio); |
| 86 | unsafe { Irq::enable() }; | 86 | unsafe { irq.enable() }; |
| 87 | 87 | ||
| 88 | let g = regs(); | 88 | let g = regs(); |
| 89 | g.events_port.write(|w| w); | 89 | g.events_port.write(|w| w); |
diff --git a/embassy-nrf/src/i2s.rs b/embassy-nrf/src/i2s.rs index 13db77d3b..fea38c4c0 100644 --- a/embassy-nrf/src/i2s.rs +++ b/embassy-nrf/src/i2s.rs | |||
| @@ -13,10 +13,10 @@ use embassy_hal_common::drop::OnDrop; | |||
| 13 | use embassy_hal_common::{into_ref, PeripheralRef}; | 13 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 14 | 14 | ||
| 15 | use crate::gpio::{AnyPin, Pin as GpioPin}; | 15 | use crate::gpio::{AnyPin, Pin as GpioPin}; |
| 16 | use crate::interrupt::{self, Interrupt}; | 16 | use crate::interrupt::typelevel::Interrupt; |
| 17 | use crate::pac::i2s::RegisterBlock; | 17 | use crate::pac::i2s::RegisterBlock; |
| 18 | use crate::util::{slice_in_ram_or, slice_ptr_parts}; | 18 | use crate::util::{slice_in_ram_or, slice_ptr_parts}; |
| 19 | use crate::{Peripheral, EASY_DMA_SIZE}; | 19 | use crate::{interrupt, Peripheral, EASY_DMA_SIZE}; |
| 20 | 20 | ||
| 21 | /// Type alias for `MultiBuffering` with 2 buffers. | 21 | /// Type alias for `MultiBuffering` with 2 buffers. |
| 22 | pub type DoubleBuffering<S, const NS: usize> = MultiBuffering<S, 2, NS>; | 22 | pub type DoubleBuffering<S, const NS: usize> = MultiBuffering<S, 2, NS>; |
| @@ -367,7 +367,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 367 | _phantom: PhantomData<T>, | 367 | _phantom: PhantomData<T>, |
| 368 | } | 368 | } |
| 369 | 369 | ||
| 370 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 370 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 371 | unsafe fn on_interrupt() { | 371 | unsafe fn on_interrupt() { |
| 372 | let device = Device::<T>::new(); | 372 | let device = Device::<T>::new(); |
| 373 | let s = T::state(); | 373 | let s = T::state(); |
| @@ -408,7 +408,7 @@ impl<'d, T: Instance> I2S<'d, T> { | |||
| 408 | /// Create a new I2S in master mode | 408 | /// Create a new I2S in master mode |
| 409 | pub fn new_master( | 409 | pub fn new_master( |
| 410 | i2s: impl Peripheral<P = T> + 'd, | 410 | i2s: impl Peripheral<P = T> + 'd, |
| 411 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 411 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 412 | mck: impl Peripheral<P = impl GpioPin> + 'd, | 412 | mck: impl Peripheral<P = impl GpioPin> + 'd, |
| 413 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 413 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 414 | lrck: impl Peripheral<P = impl GpioPin> + 'd, | 414 | lrck: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -431,7 +431,7 @@ impl<'d, T: Instance> I2S<'d, T> { | |||
| 431 | /// Create a new I2S in slave mode | 431 | /// Create a new I2S in slave mode |
| 432 | pub fn new_slave( | 432 | pub fn new_slave( |
| 433 | i2s: impl Peripheral<P = T> + 'd, | 433 | i2s: impl Peripheral<P = T> + 'd, |
| 434 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 434 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 435 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 435 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 436 | lrck: impl Peripheral<P = impl GpioPin> + 'd, | 436 | lrck: impl Peripheral<P = impl GpioPin> + 'd, |
| 437 | config: Config, | 437 | config: Config, |
| @@ -1173,7 +1173,7 @@ pub(crate) mod sealed { | |||
| 1173 | /// I2S peripheral instance. | 1173 | /// I2S peripheral instance. |
| 1174 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 1174 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 1175 | /// Interrupt for this peripheral. | 1175 | /// Interrupt for this peripheral. |
| 1176 | type Interrupt: Interrupt; | 1176 | type Interrupt: interrupt::typelevel::Interrupt; |
| 1177 | } | 1177 | } |
| 1178 | 1178 | ||
| 1179 | macro_rules! impl_i2s { | 1179 | macro_rules! impl_i2s { |
| @@ -1188,7 +1188,7 @@ macro_rules! impl_i2s { | |||
| 1188 | } | 1188 | } |
| 1189 | } | 1189 | } |
| 1190 | impl crate::i2s::Instance for peripherals::$type { | 1190 | impl crate::i2s::Instance for peripherals::$type { |
| 1191 | type Interrupt = crate::interrupt::$irq; | 1191 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 1192 | } | 1192 | } |
| 1193 | }; | 1193 | }; |
| 1194 | } | 1194 | } |
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs index 6b57c2545..a73d22a63 100644 --- a/embassy-nrf/src/lib.rs +++ b/embassy-nrf/src/lib.rs | |||
| @@ -93,21 +93,16 @@ pub mod wdt; | |||
| 93 | #[cfg_attr(feature = "_nrf9160", path = "chips/nrf9160.rs")] | 93 | #[cfg_attr(feature = "_nrf9160", path = "chips/nrf9160.rs")] |
| 94 | mod chip; | 94 | mod chip; |
| 95 | 95 | ||
| 96 | pub mod interrupt { | 96 | pub use crate::chip::interrupt; |
| 97 | //! Interrupt definitions and macros to bind them. | 97 | |
| 98 | pub use cortex_m::interrupt::{CriticalSection, Mutex}; | 98 | /// Macro to bind interrupts to handlers. |
| 99 | pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority}; | 99 | /// |
| 100 | 100 | /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) | |
| 101 | pub use crate::chip::irqs::*; | 101 | /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to |
| 102 | 102 | /// prove at compile-time that the right interrupts have been bound. | |
| 103 | /// Macro to bind interrupts to handlers. | 103 | // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. |
| 104 | /// | 104 | #[macro_export] |
| 105 | /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) | 105 | macro_rules! bind_interrupts { |
| 106 | /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to | ||
| 107 | /// prove at compile-time that the right interrupts have been bound. | ||
| 108 | // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. | ||
| 109 | #[macro_export] | ||
| 110 | macro_rules! bind_interrupts { | ||
| 111 | ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { | 106 | ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { |
| 112 | $vis struct $name; | 107 | $vis struct $name; |
| 113 | 108 | ||
| @@ -116,17 +111,16 @@ pub mod interrupt { | |||
| 116 | #[no_mangle] | 111 | #[no_mangle] |
| 117 | unsafe extern "C" fn $irq() { | 112 | unsafe extern "C" fn $irq() { |
| 118 | $( | 113 | $( |
| 119 | <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt(); | 114 | <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt(); |
| 120 | )* | 115 | )* |
| 121 | } | 116 | } |
| 122 | 117 | ||
| 123 | $( | 118 | $( |
| 124 | unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {} | 119 | unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {} |
| 125 | )* | 120 | )* |
| 126 | )* | 121 | )* |
| 127 | }; | 122 | }; |
| 128 | } | 123 | } |
| 129 | } | ||
| 130 | 124 | ||
| 131 | // Reexports | 125 | // Reexports |
| 132 | 126 | ||
| @@ -136,7 +130,6 @@ pub use chip::pac; | |||
| 136 | pub(crate) use chip::pac; | 130 | pub(crate) use chip::pac; |
| 137 | pub use chip::{peripherals, Peripherals, EASY_DMA_SIZE}; | 131 | pub use chip::{peripherals, Peripherals, EASY_DMA_SIZE}; |
| 138 | pub use embassy_cortex_m::executor; | 132 | pub use embassy_cortex_m::executor; |
| 139 | pub use embassy_cortex_m::interrupt::_export::interrupt; | ||
| 140 | pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; | 133 | pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; |
| 141 | 134 | ||
| 142 | pub mod config { | 135 | pub mod config { |
diff --git a/embassy-nrf/src/pdm.rs b/embassy-nrf/src/pdm.rs index 9df685a26..0e30f7002 100644 --- a/embassy-nrf/src/pdm.rs +++ b/embassy-nrf/src/pdm.rs | |||
| @@ -6,7 +6,6 @@ use core::marker::PhantomData; | |||
| 6 | use core::sync::atomic::{compiler_fence, Ordering}; | 6 | use core::sync::atomic::{compiler_fence, Ordering}; |
| 7 | use core::task::Poll; | 7 | use core::task::Poll; |
| 8 | 8 | ||
| 9 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 10 | use embassy_hal_common::drop::OnDrop; | 9 | use embassy_hal_common::drop::OnDrop; |
| 11 | use embassy_hal_common::{into_ref, PeripheralRef}; | 10 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 12 | use futures::future::poll_fn; | 11 | use futures::future::poll_fn; |
| @@ -14,15 +13,15 @@ use futures::future::poll_fn; | |||
| 14 | use crate::chip::EASY_DMA_SIZE; | 13 | use crate::chip::EASY_DMA_SIZE; |
| 15 | use crate::gpio::sealed::Pin; | 14 | use crate::gpio::sealed::Pin; |
| 16 | use crate::gpio::{AnyPin, Pin as GpioPin}; | 15 | use crate::gpio::{AnyPin, Pin as GpioPin}; |
| 17 | use crate::interrupt::{self}; | 16 | use crate::interrupt::typelevel::Interrupt; |
| 18 | use crate::Peripheral; | 17 | use crate::{interrupt, Peripheral}; |
| 19 | 18 | ||
| 20 | /// Interrupt handler. | 19 | /// Interrupt handler. |
| 21 | pub struct InterruptHandler<T: Instance> { | 20 | pub struct InterruptHandler<T: Instance> { |
| 22 | _phantom: PhantomData<T>, | 21 | _phantom: PhantomData<T>, |
| 23 | } | 22 | } |
| 24 | 23 | ||
| 25 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 24 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 26 | unsafe fn on_interrupt() { | 25 | unsafe fn on_interrupt() { |
| 27 | T::regs().intenclr.write(|w| w.end().clear()); | 26 | T::regs().intenclr.write(|w| w.end().clear()); |
| 28 | T::state().waker.wake(); | 27 | T::state().waker.wake(); |
| @@ -53,7 +52,7 @@ impl<'d, T: Instance> Pdm<'d, T> { | |||
| 53 | /// Create PDM driver | 52 | /// Create PDM driver |
| 54 | pub fn new( | 53 | pub fn new( |
| 55 | pdm: impl Peripheral<P = T> + 'd, | 54 | pdm: impl Peripheral<P = T> + 'd, |
| 56 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 55 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 57 | clk: impl Peripheral<P = impl GpioPin> + 'd, | 56 | clk: impl Peripheral<P = impl GpioPin> + 'd, |
| 58 | din: impl Peripheral<P = impl GpioPin> + 'd, | 57 | din: impl Peripheral<P = impl GpioPin> + 'd, |
| 59 | config: Config, | 58 | config: Config, |
| @@ -274,7 +273,7 @@ pub(crate) mod sealed { | |||
| 274 | /// PDM peripheral instance. | 273 | /// PDM peripheral instance. |
| 275 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 274 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 276 | /// Interrupt for this peripheral. | 275 | /// Interrupt for this peripheral. |
| 277 | type Interrupt: Interrupt; | 276 | type Interrupt: interrupt::typelevel::Interrupt; |
| 278 | } | 277 | } |
| 279 | 278 | ||
| 280 | macro_rules! impl_pdm { | 279 | macro_rules! impl_pdm { |
| @@ -289,7 +288,7 @@ macro_rules! impl_pdm { | |||
| 289 | } | 288 | } |
| 290 | } | 289 | } |
| 291 | impl crate::pdm::Instance for peripherals::$type { | 290 | impl crate::pdm::Instance for peripherals::$type { |
| 292 | type Interrupt = crate::interrupt::$irq; | 291 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 293 | } | 292 | } |
| 294 | }; | 293 | }; |
| 295 | } | 294 | } |
diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs index 708f23104..363a255d5 100644 --- a/embassy-nrf/src/pwm.rs +++ b/embassy-nrf/src/pwm.rs | |||
| @@ -8,10 +8,9 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 8 | 8 | ||
| 9 | use crate::gpio::sealed::Pin as _; | 9 | use crate::gpio::sealed::Pin as _; |
| 10 | use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; | 10 | use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; |
| 11 | use crate::interrupt::Interrupt; | ||
| 12 | use crate::ppi::{Event, Task}; | 11 | use crate::ppi::{Event, Task}; |
| 13 | use crate::util::slice_in_ram_or; | 12 | use crate::util::slice_in_ram_or; |
| 14 | use crate::{pac, Peripheral}; | 13 | use crate::{interrupt, pac, Peripheral}; |
| 15 | 14 | ||
| 16 | /// SimplePwm is the traditional pwm interface you're probably used to, allowing | 15 | /// SimplePwm is the traditional pwm interface you're probably used to, allowing |
| 17 | /// to simply set a duty cycle across up to four channels. | 16 | /// to simply set a duty cycle across up to four channels. |
| @@ -843,7 +842,7 @@ pub(crate) mod sealed { | |||
| 843 | /// PWM peripheral instance. | 842 | /// PWM peripheral instance. |
| 844 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 843 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 845 | /// Interrupt for this peripheral. | 844 | /// Interrupt for this peripheral. |
| 846 | type Interrupt: Interrupt; | 845 | type Interrupt: interrupt::typelevel::Interrupt; |
| 847 | } | 846 | } |
| 848 | 847 | ||
| 849 | macro_rules! impl_pwm { | 848 | macro_rules! impl_pwm { |
| @@ -854,7 +853,7 @@ macro_rules! impl_pwm { | |||
| 854 | } | 853 | } |
| 855 | } | 854 | } |
| 856 | impl crate::pwm::Instance for peripherals::$type { | 855 | impl crate::pwm::Instance for peripherals::$type { |
| 857 | type Interrupt = crate::interrupt::$irq; | 856 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 858 | } | 857 | } |
| 859 | }; | 858 | }; |
| 860 | } | 859 | } |
diff --git a/embassy-nrf/src/qdec.rs b/embassy-nrf/src/qdec.rs index 5761d04e1..8bac87d37 100644 --- a/embassy-nrf/src/qdec.rs +++ b/embassy-nrf/src/qdec.rs | |||
| @@ -10,7 +10,7 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 10 | 10 | ||
| 11 | use crate::gpio::sealed::Pin as _; | 11 | use crate::gpio::sealed::Pin as _; |
| 12 | use crate::gpio::{AnyPin, Pin as GpioPin}; | 12 | use crate::gpio::{AnyPin, Pin as GpioPin}; |
| 13 | use crate::interrupt::Interrupt; | 13 | use crate::interrupt::typelevel::Interrupt; |
| 14 | use crate::{interrupt, Peripheral}; | 14 | use crate::{interrupt, Peripheral}; |
| 15 | 15 | ||
| 16 | /// Quadrature decoder driver. | 16 | /// Quadrature decoder driver. |
| @@ -50,7 +50,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 50 | _phantom: PhantomData<T>, | 50 | _phantom: PhantomData<T>, |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 53 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 54 | unsafe fn on_interrupt() { | 54 | unsafe fn on_interrupt() { |
| 55 | T::regs().intenclr.write(|w| w.reportrdy().clear()); | 55 | T::regs().intenclr.write(|w| w.reportrdy().clear()); |
| 56 | T::state().waker.wake(); | 56 | T::state().waker.wake(); |
| @@ -61,7 +61,7 @@ impl<'d, T: Instance> Qdec<'d, T> { | |||
| 61 | /// Create a new QDEC. | 61 | /// Create a new QDEC. |
| 62 | pub fn new( | 62 | pub fn new( |
| 63 | qdec: impl Peripheral<P = T> + 'd, | 63 | qdec: impl Peripheral<P = T> + 'd, |
| 64 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 64 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 65 | a: impl Peripheral<P = impl GpioPin> + 'd, | 65 | a: impl Peripheral<P = impl GpioPin> + 'd, |
| 66 | b: impl Peripheral<P = impl GpioPin> + 'd, | 66 | b: impl Peripheral<P = impl GpioPin> + 'd, |
| 67 | config: Config, | 67 | config: Config, |
| @@ -73,7 +73,7 @@ impl<'d, T: Instance> Qdec<'d, T> { | |||
| 73 | /// Create a new QDEC, with a pin for LED output. | 73 | /// Create a new QDEC, with a pin for LED output. |
| 74 | pub fn new_with_led( | 74 | pub fn new_with_led( |
| 75 | qdec: impl Peripheral<P = T> + 'd, | 75 | qdec: impl Peripheral<P = T> + 'd, |
| 76 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 76 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 77 | a: impl Peripheral<P = impl GpioPin> + 'd, | 77 | a: impl Peripheral<P = impl GpioPin> + 'd, |
| 78 | b: impl Peripheral<P = impl GpioPin> + 'd, | 78 | b: impl Peripheral<P = impl GpioPin> + 'd, |
| 79 | led: impl Peripheral<P = impl GpioPin> + 'd, | 79 | led: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -271,7 +271,7 @@ pub(crate) mod sealed { | |||
| 271 | /// qdec peripheral instance. | 271 | /// qdec peripheral instance. |
| 272 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 272 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 273 | /// Interrupt for this peripheral. | 273 | /// Interrupt for this peripheral. |
| 274 | type Interrupt: Interrupt; | 274 | type Interrupt: interrupt::typelevel::Interrupt; |
| 275 | } | 275 | } |
| 276 | 276 | ||
| 277 | macro_rules! impl_qdec { | 277 | macro_rules! impl_qdec { |
| @@ -286,7 +286,7 @@ macro_rules! impl_qdec { | |||
| 286 | } | 286 | } |
| 287 | } | 287 | } |
| 288 | impl crate::qdec::Instance for peripherals::$type { | 288 | impl crate::qdec::Instance for peripherals::$type { |
| 289 | type Interrupt = crate::interrupt::$irq; | 289 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 290 | } | 290 | } |
| 291 | }; | 291 | }; |
| 292 | } | 292 | } |
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs index 3f48568b3..baefc7967 100644 --- a/embassy-nrf/src/qspi.rs +++ b/embassy-nrf/src/qspi.rs | |||
| @@ -12,12 +12,12 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 12 | use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash}; | 12 | use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash}; |
| 13 | 13 | ||
| 14 | use crate::gpio::{self, Pin as GpioPin}; | 14 | use crate::gpio::{self, Pin as GpioPin}; |
| 15 | use crate::interrupt::{self, Interrupt}; | 15 | use crate::interrupt::typelevel::Interrupt; |
| 16 | pub use crate::pac::qspi::ifconfig0::{ | 16 | pub use crate::pac::qspi::ifconfig0::{ |
| 17 | ADDRMODE_A as AddressMode, PPSIZE_A as WritePageSize, READOC_A as ReadOpcode, WRITEOC_A as WriteOpcode, | 17 | ADDRMODE_A as AddressMode, PPSIZE_A as WritePageSize, READOC_A as ReadOpcode, WRITEOC_A as WriteOpcode, |
| 18 | }; | 18 | }; |
| 19 | pub use crate::pac::qspi::ifconfig1::SPIMODE_A as SpiMode; | 19 | pub use crate::pac::qspi::ifconfig1::SPIMODE_A as SpiMode; |
| 20 | use crate::Peripheral; | 20 | use crate::{interrupt, Peripheral}; |
| 21 | 21 | ||
| 22 | /// Deep power-down config. | 22 | /// Deep power-down config. |
| 23 | pub struct DeepPowerDownConfig { | 23 | pub struct DeepPowerDownConfig { |
| @@ -120,7 +120,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 120 | _phantom: PhantomData<T>, | 120 | _phantom: PhantomData<T>, |
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 123 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 124 | unsafe fn on_interrupt() { | 124 | unsafe fn on_interrupt() { |
| 125 | let r = T::regs(); | 125 | let r = T::regs(); |
| 126 | let s = T::state(); | 126 | let s = T::state(); |
| @@ -143,7 +143,7 @@ impl<'d, T: Instance> Qspi<'d, T> { | |||
| 143 | /// Create a new QSPI driver. | 143 | /// Create a new QSPI driver. |
| 144 | pub fn new( | 144 | pub fn new( |
| 145 | qspi: impl Peripheral<P = T> + 'd, | 145 | qspi: impl Peripheral<P = T> + 'd, |
| 146 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 146 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 147 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 147 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 148 | csn: impl Peripheral<P = impl GpioPin> + 'd, | 148 | csn: impl Peripheral<P = impl GpioPin> + 'd, |
| 149 | io0: impl Peripheral<P = impl GpioPin> + 'd, | 149 | io0: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -644,7 +644,7 @@ pub(crate) mod sealed { | |||
| 644 | /// QSPI peripheral instance. | 644 | /// QSPI peripheral instance. |
| 645 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 645 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 646 | /// Interrupt for this peripheral. | 646 | /// Interrupt for this peripheral. |
| 647 | type Interrupt: Interrupt; | 647 | type Interrupt: interrupt::typelevel::Interrupt; |
| 648 | } | 648 | } |
| 649 | 649 | ||
| 650 | macro_rules! impl_qspi { | 650 | macro_rules! impl_qspi { |
| @@ -659,7 +659,7 @@ macro_rules! impl_qspi { | |||
| 659 | } | 659 | } |
| 660 | } | 660 | } |
| 661 | impl crate::qspi::Instance for peripherals::$type { | 661 | impl crate::qspi::Instance for peripherals::$type { |
| 662 | type Interrupt = crate::interrupt::$irq; | 662 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 663 | } | 663 | } |
| 664 | }; | 664 | }; |
| 665 | } | 665 | } |
diff --git a/embassy-nrf/src/rng.rs b/embassy-nrf/src/rng.rs index 7e9b35481..923b8b467 100644 --- a/embassy-nrf/src/rng.rs +++ b/embassy-nrf/src/rng.rs | |||
| @@ -12,7 +12,7 @@ use embassy_hal_common::drop::OnDrop; | |||
| 12 | use embassy_hal_common::{into_ref, PeripheralRef}; | 12 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 13 | use embassy_sync::waitqueue::AtomicWaker; | 13 | use embassy_sync::waitqueue::AtomicWaker; |
| 14 | 14 | ||
| 15 | use crate::interrupt::Interrupt; | 15 | use crate::interrupt::typelevel::Interrupt; |
| 16 | use crate::{interrupt, Peripheral}; | 16 | use crate::{interrupt, Peripheral}; |
| 17 | 17 | ||
| 18 | /// Interrupt handler. | 18 | /// Interrupt handler. |
| @@ -20,7 +20,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 20 | _phantom: PhantomData<T>, | 20 | _phantom: PhantomData<T>, |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 23 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 24 | unsafe fn on_interrupt() { | 24 | unsafe fn on_interrupt() { |
| 25 | let s = T::state(); | 25 | let s = T::state(); |
| 26 | let r = T::regs(); | 26 | let r = T::regs(); |
| @@ -89,7 +89,7 @@ impl<'d, T: Instance> Rng<'d, T> { | |||
| 89 | /// The synchronous API is safe. | 89 | /// The synchronous API is safe. |
| 90 | pub fn new( | 90 | pub fn new( |
| 91 | rng: impl Peripheral<P = T> + 'd, | 91 | rng: impl Peripheral<P = T> + 'd, |
| 92 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 92 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 93 | ) -> Self { | 93 | ) -> Self { |
| 94 | into_ref!(rng); | 94 | into_ref!(rng); |
| 95 | 95 | ||
| @@ -255,7 +255,7 @@ pub(crate) mod sealed { | |||
| 255 | /// RNG peripheral instance. | 255 | /// RNG peripheral instance. |
| 256 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 256 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 257 | /// Interrupt for this peripheral. | 257 | /// Interrupt for this peripheral. |
| 258 | type Interrupt: Interrupt; | 258 | type Interrupt: interrupt::typelevel::Interrupt; |
| 259 | } | 259 | } |
| 260 | 260 | ||
| 261 | macro_rules! impl_rng { | 261 | macro_rules! impl_rng { |
| @@ -270,7 +270,7 @@ macro_rules! impl_rng { | |||
| 270 | } | 270 | } |
| 271 | } | 271 | } |
| 272 | impl crate::rng::Instance for peripherals::$type { | 272 | impl crate::rng::Instance for peripherals::$type { |
| 273 | type Interrupt = crate::interrupt::$irq; | 273 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 274 | } | 274 | } |
| 275 | }; | 275 | }; |
| 276 | } | 276 | } |
diff --git a/embassy-nrf/src/saadc.rs b/embassy-nrf/src/saadc.rs index 39764e380..cf3fb9993 100644 --- a/embassy-nrf/src/saadc.rs +++ b/embassy-nrf/src/saadc.rs | |||
| @@ -6,7 +6,6 @@ use core::future::poll_fn; | |||
| 6 | use core::sync::atomic::{compiler_fence, Ordering}; | 6 | use core::sync::atomic::{compiler_fence, Ordering}; |
| 7 | use core::task::Poll; | 7 | use core::task::Poll; |
| 8 | 8 | ||
| 9 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 10 | use embassy_hal_common::drop::OnDrop; | 9 | use embassy_hal_common::drop::OnDrop; |
| 11 | use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef}; | 10 | use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef}; |
| 12 | use embassy_sync::waitqueue::AtomicWaker; | 11 | use embassy_sync::waitqueue::AtomicWaker; |
| @@ -18,6 +17,7 @@ use saadc::oversample::OVERSAMPLE_A; | |||
| 18 | use saadc::resolution::VAL_A; | 17 | use saadc::resolution::VAL_A; |
| 19 | 18 | ||
| 20 | use self::sealed::Input as _; | 19 | use self::sealed::Input as _; |
| 20 | use crate::interrupt::InterruptExt; | ||
| 21 | use crate::ppi::{ConfigurableChannel, Event, Ppi, Task}; | 21 | use crate::ppi::{ConfigurableChannel, Event, Ppi, Task}; |
| 22 | use crate::timer::{Frequency, Instance as TimerInstance, Timer}; | 22 | use crate::timer::{Frequency, Instance as TimerInstance, Timer}; |
| 23 | use crate::{interrupt, pac, peripherals, Peripheral}; | 23 | use crate::{interrupt, pac, peripherals, Peripheral}; |
| @@ -33,7 +33,7 @@ pub struct InterruptHandler { | |||
| 33 | _private: (), | 33 | _private: (), |
| 34 | } | 34 | } |
| 35 | 35 | ||
| 36 | impl interrupt::Handler<interrupt::SAADC> for InterruptHandler { | 36 | impl interrupt::typelevel::Handler<interrupt::typelevel::SAADC> for InterruptHandler { |
| 37 | unsafe fn on_interrupt() { | 37 | unsafe fn on_interrupt() { |
| 38 | let r = unsafe { &*SAADC::ptr() }; | 38 | let r = unsafe { &*SAADC::ptr() }; |
| 39 | 39 | ||
| @@ -144,7 +144,7 @@ impl<'d, const N: usize> Saadc<'d, N> { | |||
| 144 | /// Create a new SAADC driver. | 144 | /// Create a new SAADC driver. |
| 145 | pub fn new( | 145 | pub fn new( |
| 146 | saadc: impl Peripheral<P = peripherals::SAADC> + 'd, | 146 | saadc: impl Peripheral<P = peripherals::SAADC> + 'd, |
| 147 | _irq: impl interrupt::Binding<interrupt::SAADC, InterruptHandler> + 'd, | 147 | _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::SAADC, InterruptHandler> + 'd, |
| 148 | config: Config, | 148 | config: Config, |
| 149 | channel_configs: [ChannelConfig; N], | 149 | channel_configs: [ChannelConfig; N], |
| 150 | ) -> Self { | 150 | ) -> Self { |
| @@ -189,8 +189,8 @@ impl<'d, const N: usize> Saadc<'d, N> { | |||
| 189 | // Disable all events interrupts | 189 | // Disable all events interrupts |
| 190 | r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) }); | 190 | r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) }); |
| 191 | 191 | ||
| 192 | interrupt::SAADC::unpend(); | 192 | interrupt::SAADC.unpend(); |
| 193 | unsafe { interrupt::SAADC::enable() }; | 193 | unsafe { interrupt::SAADC.enable() }; |
| 194 | 194 | ||
| 195 | Self { _p: saadc } | 195 | Self { _p: saadc } |
| 196 | } | 196 | } |
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs index bb9cda323..66bbd1a8f 100644 --- a/embassy-nrf/src/spim.rs +++ b/embassy-nrf/src/spim.rs | |||
| @@ -15,9 +15,9 @@ pub use pac::spim0::frequency::FREQUENCY_A as Frequency; | |||
| 15 | use crate::chip::FORCE_COPY_BUFFER_SIZE; | 15 | use crate::chip::FORCE_COPY_BUFFER_SIZE; |
| 16 | use crate::gpio::sealed::Pin as _; | 16 | use crate::gpio::sealed::Pin as _; |
| 17 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; | 17 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 18 | use crate::interrupt::{self, Interrupt}; | 18 | use crate::interrupt::typelevel::Interrupt; |
| 19 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; | 19 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; |
| 20 | use crate::{pac, Peripheral}; | 20 | use crate::{interrupt, pac, Peripheral}; |
| 21 | 21 | ||
| 22 | /// SPIM error | 22 | /// SPIM error |
| 23 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] | 23 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] |
| @@ -63,7 +63,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 63 | _phantom: PhantomData<T>, | 63 | _phantom: PhantomData<T>, |
| 64 | } | 64 | } |
| 65 | 65 | ||
| 66 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 66 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 67 | unsafe fn on_interrupt() { | 67 | unsafe fn on_interrupt() { |
| 68 | let r = T::regs(); | 68 | let r = T::regs(); |
| 69 | let s = T::state(); | 69 | let s = T::state(); |
| @@ -84,7 +84,7 @@ impl<'d, T: Instance> Spim<'d, T> { | |||
| 84 | /// Create a new SPIM driver. | 84 | /// Create a new SPIM driver. |
| 85 | pub fn new( | 85 | pub fn new( |
| 86 | spim: impl Peripheral<P = T> + 'd, | 86 | spim: impl Peripheral<P = T> + 'd, |
| 87 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 87 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 88 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 88 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 89 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 89 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| 90 | mosi: impl Peripheral<P = impl GpioPin> + 'd, | 90 | mosi: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -103,7 +103,7 @@ impl<'d, T: Instance> Spim<'d, T> { | |||
| 103 | /// Create a new SPIM driver, capable of TX only (MOSI only). | 103 | /// Create a new SPIM driver, capable of TX only (MOSI only). |
| 104 | pub fn new_txonly( | 104 | pub fn new_txonly( |
| 105 | spim: impl Peripheral<P = T> + 'd, | 105 | spim: impl Peripheral<P = T> + 'd, |
| 106 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 106 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 107 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 107 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 108 | mosi: impl Peripheral<P = impl GpioPin> + 'd, | 108 | mosi: impl Peripheral<P = impl GpioPin> + 'd, |
| 109 | config: Config, | 109 | config: Config, |
| @@ -115,7 +115,7 @@ impl<'d, T: Instance> Spim<'d, T> { | |||
| 115 | /// Create a new SPIM driver, capable of RX only (MISO only). | 115 | /// Create a new SPIM driver, capable of RX only (MISO only). |
| 116 | pub fn new_rxonly( | 116 | pub fn new_rxonly( |
| 117 | spim: impl Peripheral<P = T> + 'd, | 117 | spim: impl Peripheral<P = T> + 'd, |
| 118 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 118 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 119 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 119 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 120 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 120 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| 121 | config: Config, | 121 | config: Config, |
| @@ -408,7 +408,7 @@ pub(crate) mod sealed { | |||
| 408 | /// SPIM peripheral instance | 408 | /// SPIM peripheral instance |
| 409 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 409 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 410 | /// Interrupt for this peripheral. | 410 | /// Interrupt for this peripheral. |
| 411 | type Interrupt: Interrupt; | 411 | type Interrupt: interrupt::typelevel::Interrupt; |
| 412 | } | 412 | } |
| 413 | 413 | ||
| 414 | macro_rules! impl_spim { | 414 | macro_rules! impl_spim { |
| @@ -423,7 +423,7 @@ macro_rules! impl_spim { | |||
| 423 | } | 423 | } |
| 424 | } | 424 | } |
| 425 | impl crate::spim::Instance for peripherals::$type { | 425 | impl crate::spim::Instance for peripherals::$type { |
| 426 | type Interrupt = crate::interrupt::$irq; | 426 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 427 | } | 427 | } |
| 428 | }; | 428 | }; |
| 429 | } | 429 | } |
diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs index a1d6803ed..aa438415a 100644 --- a/embassy-nrf/src/spis.rs +++ b/embassy-nrf/src/spis.rs | |||
| @@ -13,9 +13,9 @@ pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MO | |||
| 13 | use crate::chip::FORCE_COPY_BUFFER_SIZE; | 13 | use crate::chip::FORCE_COPY_BUFFER_SIZE; |
| 14 | use crate::gpio::sealed::Pin as _; | 14 | use crate::gpio::sealed::Pin as _; |
| 15 | use crate::gpio::{self, AnyPin, Pin as GpioPin}; | 15 | use crate::gpio::{self, AnyPin, Pin as GpioPin}; |
| 16 | use crate::interrupt::{self, Interrupt}; | 16 | use crate::interrupt::typelevel::Interrupt; |
| 17 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; | 17 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; |
| 18 | use crate::{pac, Peripheral}; | 18 | use crate::{interrupt, pac, Peripheral}; |
| 19 | 19 | ||
| 20 | /// SPIS error | 20 | /// SPIS error |
| 21 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] | 21 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] |
| @@ -68,7 +68,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 68 | _phantom: PhantomData<T>, | 68 | _phantom: PhantomData<T>, |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 71 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 72 | unsafe fn on_interrupt() { | 72 | unsafe fn on_interrupt() { |
| 73 | let r = T::regs(); | 73 | let r = T::regs(); |
| 74 | let s = T::state(); | 74 | let s = T::state(); |
| @@ -94,7 +94,7 @@ impl<'d, T: Instance> Spis<'d, T> { | |||
| 94 | /// Create a new SPIS driver. | 94 | /// Create a new SPIS driver. |
| 95 | pub fn new( | 95 | pub fn new( |
| 96 | spis: impl Peripheral<P = T> + 'd, | 96 | spis: impl Peripheral<P = T> + 'd, |
| 97 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 97 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 98 | cs: impl Peripheral<P = impl GpioPin> + 'd, | 98 | cs: impl Peripheral<P = impl GpioPin> + 'd, |
| 99 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 99 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 100 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 100 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -115,7 +115,7 @@ impl<'d, T: Instance> Spis<'d, T> { | |||
| 115 | /// Create a new SPIS driver, capable of TX only (MISO only). | 115 | /// Create a new SPIS driver, capable of TX only (MISO only). |
| 116 | pub fn new_txonly( | 116 | pub fn new_txonly( |
| 117 | spis: impl Peripheral<P = T> + 'd, | 117 | spis: impl Peripheral<P = T> + 'd, |
| 118 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 118 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 119 | cs: impl Peripheral<P = impl GpioPin> + 'd, | 119 | cs: impl Peripheral<P = impl GpioPin> + 'd, |
| 120 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 120 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 121 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 121 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -128,7 +128,7 @@ impl<'d, T: Instance> Spis<'d, T> { | |||
| 128 | /// Create a new SPIS driver, capable of RX only (MOSI only). | 128 | /// Create a new SPIS driver, capable of RX only (MOSI only). |
| 129 | pub fn new_rxonly( | 129 | pub fn new_rxonly( |
| 130 | spis: impl Peripheral<P = T> + 'd, | 130 | spis: impl Peripheral<P = T> + 'd, |
| 131 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 131 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 132 | cs: impl Peripheral<P = impl GpioPin> + 'd, | 132 | cs: impl Peripheral<P = impl GpioPin> + 'd, |
| 133 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 133 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 134 | mosi: impl Peripheral<P = impl GpioPin> + 'd, | 134 | mosi: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -480,7 +480,7 @@ pub(crate) mod sealed { | |||
| 480 | /// SPIS peripheral instance | 480 | /// SPIS peripheral instance |
| 481 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 481 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 482 | /// Interrupt for this peripheral. | 482 | /// Interrupt for this peripheral. |
| 483 | type Interrupt: Interrupt; | 483 | type Interrupt: interrupt::typelevel::Interrupt; |
| 484 | } | 484 | } |
| 485 | 485 | ||
| 486 | macro_rules! impl_spis { | 486 | macro_rules! impl_spis { |
| @@ -495,7 +495,7 @@ macro_rules! impl_spis { | |||
| 495 | } | 495 | } |
| 496 | } | 496 | } |
| 497 | impl crate::spis::Instance for peripherals::$type { | 497 | impl crate::spis::Instance for peripherals::$type { |
| 498 | type Interrupt = crate::interrupt::$irq; | 498 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 499 | } | 499 | } |
| 500 | }; | 500 | }; |
| 501 | } | 501 | } |
diff --git a/embassy-nrf/src/temp.rs b/embassy-nrf/src/temp.rs index 8a127efc5..491e92c04 100644 --- a/embassy-nrf/src/temp.rs +++ b/embassy-nrf/src/temp.rs | |||
| @@ -8,7 +8,7 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 8 | use embassy_sync::waitqueue::AtomicWaker; | 8 | use embassy_sync::waitqueue::AtomicWaker; |
| 9 | use fixed::types::I30F2; | 9 | use fixed::types::I30F2; |
| 10 | 10 | ||
| 11 | use crate::interrupt::Interrupt; | 11 | use crate::interrupt::InterruptExt; |
| 12 | use crate::peripherals::TEMP; | 12 | use crate::peripherals::TEMP; |
| 13 | use crate::{interrupt, pac, Peripheral}; | 13 | use crate::{interrupt, pac, Peripheral}; |
| 14 | 14 | ||
| @@ -17,7 +17,7 @@ pub struct InterruptHandler { | |||
| 17 | _private: (), | 17 | _private: (), |
| 18 | } | 18 | } |
| 19 | 19 | ||
| 20 | impl interrupt::Handler<interrupt::TEMP> for InterruptHandler { | 20 | impl interrupt::typelevel::Handler<interrupt::typelevel::TEMP> for InterruptHandler { |
| 21 | unsafe fn on_interrupt() { | 21 | unsafe fn on_interrupt() { |
| 22 | let r = unsafe { &*pac::TEMP::PTR }; | 22 | let r = unsafe { &*pac::TEMP::PTR }; |
| 23 | r.intenclr.write(|w| w.datardy().clear()); | 23 | r.intenclr.write(|w| w.datardy().clear()); |
| @@ -36,13 +36,13 @@ impl<'d> Temp<'d> { | |||
| 36 | /// Create a new temperature sensor driver. | 36 | /// Create a new temperature sensor driver. |
| 37 | pub fn new( | 37 | pub fn new( |
| 38 | _peri: impl Peripheral<P = TEMP> + 'd, | 38 | _peri: impl Peripheral<P = TEMP> + 'd, |
| 39 | _irq: impl interrupt::Binding<interrupt::TEMP, InterruptHandler> + 'd, | 39 | _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::TEMP, InterruptHandler> + 'd, |
| 40 | ) -> Self { | 40 | ) -> Self { |
| 41 | into_ref!(_peri); | 41 | into_ref!(_peri); |
| 42 | 42 | ||
| 43 | // Enable interrupt that signals temperature values | 43 | // Enable interrupt that signals temperature values |
| 44 | interrupt::TEMP::unpend(); | 44 | interrupt::TEMP.unpend(); |
| 45 | unsafe { interrupt::TEMP::enable() }; | 45 | unsafe { interrupt::TEMP.enable() }; |
| 46 | 46 | ||
| 47 | Self { _peri } | 47 | Self { _peri } |
| 48 | } | 48 | } |
diff --git a/embassy-nrf/src/time_driver.rs b/embassy-nrf/src/time_driver.rs index 4feff8a75..f993d7b2e 100644 --- a/embassy-nrf/src/time_driver.rs +++ b/embassy-nrf/src/time_driver.rs | |||
| @@ -7,7 +7,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; | |||
| 7 | use embassy_sync::blocking_mutex::CriticalSectionMutex as Mutex; | 7 | use embassy_sync::blocking_mutex::CriticalSectionMutex as Mutex; |
| 8 | use embassy_time::driver::{AlarmHandle, Driver}; | 8 | use embassy_time::driver::{AlarmHandle, Driver}; |
| 9 | 9 | ||
| 10 | use crate::interrupt::Interrupt; | 10 | use crate::interrupt::InterruptExt; |
| 11 | use crate::{interrupt, pac}; | 11 | use crate::{interrupt, pac}; |
| 12 | 12 | ||
| 13 | fn rtc() -> &'static pac::rtc0::RegisterBlock { | 13 | fn rtc() -> &'static pac::rtc0::RegisterBlock { |
| @@ -142,8 +142,8 @@ impl RtcDriver { | |||
| 142 | // Wait for clear | 142 | // Wait for clear |
| 143 | while r.counter.read().bits() != 0 {} | 143 | while r.counter.read().bits() != 0 {} |
| 144 | 144 | ||
| 145 | interrupt::RTC1::set_priority(irq_prio); | 145 | interrupt::RTC1.set_priority(irq_prio); |
| 146 | unsafe { interrupt::RTC1::enable() }; | 146 | unsafe { interrupt::RTC1.enable() }; |
| 147 | } | 147 | } |
| 148 | 148 | ||
| 149 | fn on_interrupt(&self) { | 149 | fn on_interrupt(&self) { |
diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs index 2a0e16a50..dc3757856 100644 --- a/embassy-nrf/src/timer.rs +++ b/embassy-nrf/src/timer.rs | |||
| @@ -8,7 +8,6 @@ | |||
| 8 | 8 | ||
| 9 | use embassy_hal_common::{into_ref, PeripheralRef}; | 9 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 10 | 10 | ||
| 11 | use crate::interrupt::Interrupt; | ||
| 12 | use crate::ppi::{Event, Task}; | 11 | use crate::ppi::{Event, Task}; |
| 13 | use crate::{pac, Peripheral}; | 12 | use crate::{pac, Peripheral}; |
| 14 | 13 | ||
| @@ -29,7 +28,7 @@ pub(crate) mod sealed { | |||
| 29 | /// Basic Timer instance. | 28 | /// Basic Timer instance. |
| 30 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 29 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 31 | /// Interrupt for this peripheral. | 30 | /// Interrupt for this peripheral. |
| 32 | type Interrupt: Interrupt; | 31 | type Interrupt: crate::interrupt::typelevel::Interrupt; |
| 33 | } | 32 | } |
| 34 | 33 | ||
| 35 | /// Extended timer instance. | 34 | /// Extended timer instance. |
| @@ -44,7 +43,7 @@ macro_rules! impl_timer { | |||
| 44 | } | 43 | } |
| 45 | } | 44 | } |
| 46 | impl crate::timer::Instance for peripherals::$type { | 45 | impl crate::timer::Instance for peripherals::$type { |
| 47 | type Interrupt = crate::interrupt::$irq; | 46 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 48 | } | 47 | } |
| 49 | }; | 48 | }; |
| 50 | ($type:ident, $pac_type:ident, $irq:ident) => { | 49 | ($type:ident, $pac_type:ident, $irq:ident) => { |
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs index dea398a67..2ad0d19b1 100644 --- a/embassy-nrf/src/twim.rs +++ b/embassy-nrf/src/twim.rs | |||
| @@ -16,9 +16,9 @@ use embassy_time::{Duration, Instant}; | |||
| 16 | 16 | ||
| 17 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; | 17 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; |
| 18 | use crate::gpio::Pin as GpioPin; | 18 | use crate::gpio::Pin as GpioPin; |
| 19 | use crate::interrupt::{self, Interrupt}; | 19 | use crate::interrupt::typelevel::Interrupt; |
| 20 | use crate::util::{slice_in_ram, slice_in_ram_or}; | 20 | use crate::util::{slice_in_ram, slice_in_ram_or}; |
| 21 | use crate::{gpio, pac, Peripheral}; | 21 | use crate::{gpio, interrupt, pac, Peripheral}; |
| 22 | 22 | ||
| 23 | /// TWI frequency | 23 | /// TWI frequency |
| 24 | #[derive(Clone, Copy)] | 24 | #[derive(Clone, Copy)] |
| @@ -98,7 +98,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 98 | _phantom: PhantomData<T>, | 98 | _phantom: PhantomData<T>, |
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 101 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 102 | unsafe fn on_interrupt() { | 102 | unsafe fn on_interrupt() { |
| 103 | let r = T::regs(); | 103 | let r = T::regs(); |
| 104 | let s = T::state(); | 104 | let s = T::state(); |
| @@ -123,7 +123,7 @@ impl<'d, T: Instance> Twim<'d, T> { | |||
| 123 | /// Create a new TWI driver. | 123 | /// Create a new TWI driver. |
| 124 | pub fn new( | 124 | pub fn new( |
| 125 | twim: impl Peripheral<P = T> + 'd, | 125 | twim: impl Peripheral<P = T> + 'd, |
| 126 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 126 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 127 | sda: impl Peripheral<P = impl GpioPin> + 'd, | 127 | sda: impl Peripheral<P = impl GpioPin> + 'd, |
| 128 | scl: impl Peripheral<P = impl GpioPin> + 'd, | 128 | scl: impl Peripheral<P = impl GpioPin> + 'd, |
| 129 | config: Config, | 129 | config: Config, |
| @@ -750,7 +750,7 @@ pub(crate) mod sealed { | |||
| 750 | /// TWIM peripheral instance. | 750 | /// TWIM peripheral instance. |
| 751 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 751 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 752 | /// Interrupt for this peripheral. | 752 | /// Interrupt for this peripheral. |
| 753 | type Interrupt: Interrupt; | 753 | type Interrupt: interrupt::typelevel::Interrupt; |
| 754 | } | 754 | } |
| 755 | 755 | ||
| 756 | macro_rules! impl_twim { | 756 | macro_rules! impl_twim { |
| @@ -765,7 +765,7 @@ macro_rules! impl_twim { | |||
| 765 | } | 765 | } |
| 766 | } | 766 | } |
| 767 | impl crate::twim::Instance for peripherals::$type { | 767 | impl crate::twim::Instance for peripherals::$type { |
| 768 | type Interrupt = crate::interrupt::$irq; | 768 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 769 | } | 769 | } |
| 770 | }; | 770 | }; |
| 771 | } | 771 | } |
diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs index 752a8c046..a115d5616 100644 --- a/embassy-nrf/src/twis.rs +++ b/embassy-nrf/src/twis.rs | |||
| @@ -15,9 +15,9 @@ use embassy_time::{Duration, Instant}; | |||
| 15 | 15 | ||
| 16 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; | 16 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; |
| 17 | use crate::gpio::Pin as GpioPin; | 17 | use crate::gpio::Pin as GpioPin; |
| 18 | use crate::interrupt::{self, Interrupt}; | 18 | use crate::interrupt::typelevel::Interrupt; |
| 19 | use crate::util::slice_in_ram_or; | 19 | use crate::util::slice_in_ram_or; |
| 20 | use crate::{gpio, pac, Peripheral}; | 20 | use crate::{gpio, interrupt, pac, Peripheral}; |
| 21 | 21 | ||
| 22 | /// TWIS config. | 22 | /// TWIS config. |
| 23 | #[non_exhaustive] | 23 | #[non_exhaustive] |
| @@ -114,7 +114,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 114 | _phantom: PhantomData<T>, | 114 | _phantom: PhantomData<T>, |
| 115 | } | 115 | } |
| 116 | 116 | ||
| 117 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 117 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 118 | unsafe fn on_interrupt() { | 118 | unsafe fn on_interrupt() { |
| 119 | let r = T::regs(); | 119 | let r = T::regs(); |
| 120 | let s = T::state(); | 120 | let s = T::state(); |
| @@ -143,7 +143,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 143 | /// Create a new TWIS driver. | 143 | /// Create a new TWIS driver. |
| 144 | pub fn new( | 144 | pub fn new( |
| 145 | twis: impl Peripheral<P = T> + 'd, | 145 | twis: impl Peripheral<P = T> + 'd, |
| 146 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 146 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 147 | sda: impl Peripheral<P = impl GpioPin> + 'd, | 147 | sda: impl Peripheral<P = impl GpioPin> + 'd, |
| 148 | scl: impl Peripheral<P = impl GpioPin> + 'd, | 148 | scl: impl Peripheral<P = impl GpioPin> + 'd, |
| 149 | config: Config, | 149 | config: Config, |
| @@ -778,7 +778,7 @@ pub(crate) mod sealed { | |||
| 778 | /// TWIS peripheral instance. | 778 | /// TWIS peripheral instance. |
| 779 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 779 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 780 | /// Interrupt for this peripheral. | 780 | /// Interrupt for this peripheral. |
| 781 | type Interrupt: Interrupt; | 781 | type Interrupt: interrupt::typelevel::Interrupt; |
| 782 | } | 782 | } |
| 783 | 783 | ||
| 784 | macro_rules! impl_twis { | 784 | macro_rules! impl_twis { |
| @@ -793,7 +793,7 @@ macro_rules! impl_twis { | |||
| 793 | } | 793 | } |
| 794 | } | 794 | } |
| 795 | impl crate::twis::Instance for peripherals::$type { | 795 | impl crate::twis::Instance for peripherals::$type { |
| 796 | type Interrupt = crate::interrupt::$irq; | 796 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 797 | } | 797 | } |
| 798 | }; | 798 | }; |
| 799 | } | 799 | } |
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index 6c6941ee8..85a951ae0 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs | |||
| @@ -27,11 +27,11 @@ pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Pari | |||
| 27 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; | 27 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; |
| 28 | use crate::gpio::sealed::Pin as _; | 28 | use crate::gpio::sealed::Pin as _; |
| 29 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; | 29 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 30 | use crate::interrupt::{self, Interrupt}; | 30 | use crate::interrupt::typelevel::Interrupt; |
| 31 | use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; | 31 | use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; |
| 32 | use crate::timer::{Frequency, Instance as TimerInstance, Timer}; | 32 | use crate::timer::{Frequency, Instance as TimerInstance, Timer}; |
| 33 | use crate::util::slice_in_ram_or; | 33 | use crate::util::slice_in_ram_or; |
| 34 | use crate::{pac, Peripheral}; | 34 | use crate::{interrupt, pac, Peripheral}; |
| 35 | 35 | ||
| 36 | /// UARTE config. | 36 | /// UARTE config. |
| 37 | #[derive(Clone)] | 37 | #[derive(Clone)] |
| @@ -68,7 +68,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 68 | _phantom: PhantomData<T>, | 68 | _phantom: PhantomData<T>, |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 71 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 72 | unsafe fn on_interrupt() { | 72 | unsafe fn on_interrupt() { |
| 73 | let r = T::regs(); | 73 | let r = T::regs(); |
| 74 | let s = T::state(); | 74 | let s = T::state(); |
| @@ -108,7 +108,7 @@ impl<'d, T: Instance> Uarte<'d, T> { | |||
| 108 | /// Create a new UARTE without hardware flow control | 108 | /// Create a new UARTE without hardware flow control |
| 109 | pub fn new( | 109 | pub fn new( |
| 110 | uarte: impl Peripheral<P = T> + 'd, | 110 | uarte: impl Peripheral<P = T> + 'd, |
| 111 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 111 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 112 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 112 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 113 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 113 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 114 | config: Config, | 114 | config: Config, |
| @@ -120,7 +120,7 @@ impl<'d, T: Instance> Uarte<'d, T> { | |||
| 120 | /// Create a new UARTE with hardware flow control (RTS/CTS) | 120 | /// Create a new UARTE with hardware flow control (RTS/CTS) |
| 121 | pub fn new_with_rtscts( | 121 | pub fn new_with_rtscts( |
| 122 | uarte: impl Peripheral<P = T> + 'd, | 122 | uarte: impl Peripheral<P = T> + 'd, |
| 123 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 123 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 124 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 124 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 125 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 125 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 126 | cts: impl Peripheral<P = impl GpioPin> + 'd, | 126 | cts: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -313,7 +313,7 @@ impl<'d, T: Instance> UarteTx<'d, T> { | |||
| 313 | /// Create a new tx-only UARTE without hardware flow control | 313 | /// Create a new tx-only UARTE without hardware flow control |
| 314 | pub fn new( | 314 | pub fn new( |
| 315 | uarte: impl Peripheral<P = T> + 'd, | 315 | uarte: impl Peripheral<P = T> + 'd, |
| 316 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 316 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 317 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 317 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 318 | config: Config, | 318 | config: Config, |
| 319 | ) -> Self { | 319 | ) -> Self { |
| @@ -324,7 +324,7 @@ impl<'d, T: Instance> UarteTx<'d, T> { | |||
| 324 | /// Create a new tx-only UARTE with hardware flow control (RTS/CTS) | 324 | /// Create a new tx-only UARTE with hardware flow control (RTS/CTS) |
| 325 | pub fn new_with_rtscts( | 325 | pub fn new_with_rtscts( |
| 326 | uarte: impl Peripheral<P = T> + 'd, | 326 | uarte: impl Peripheral<P = T> + 'd, |
| 327 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 327 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 328 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 328 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 329 | cts: impl Peripheral<P = impl GpioPin> + 'd, | 329 | cts: impl Peripheral<P = impl GpioPin> + 'd, |
| 330 | config: Config, | 330 | config: Config, |
| @@ -509,7 +509,7 @@ impl<'d, T: Instance> UarteRx<'d, T> { | |||
| 509 | /// Create a new rx-only UARTE without hardware flow control | 509 | /// Create a new rx-only UARTE without hardware flow control |
| 510 | pub fn new( | 510 | pub fn new( |
| 511 | uarte: impl Peripheral<P = T> + 'd, | 511 | uarte: impl Peripheral<P = T> + 'd, |
| 512 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 512 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 513 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 513 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 514 | config: Config, | 514 | config: Config, |
| 515 | ) -> Self { | 515 | ) -> Self { |
| @@ -520,7 +520,7 @@ impl<'d, T: Instance> UarteRx<'d, T> { | |||
| 520 | /// Create a new rx-only UARTE with hardware flow control (RTS/CTS) | 520 | /// Create a new rx-only UARTE with hardware flow control (RTS/CTS) |
| 521 | pub fn new_with_rtscts( | 521 | pub fn new_with_rtscts( |
| 522 | uarte: impl Peripheral<P = T> + 'd, | 522 | uarte: impl Peripheral<P = T> + 'd, |
| 523 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 523 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 524 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 524 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 525 | rts: impl Peripheral<P = impl GpioPin> + 'd, | 525 | rts: impl Peripheral<P = impl GpioPin> + 'd, |
| 526 | config: Config, | 526 | config: Config, |
| @@ -889,7 +889,7 @@ pub(crate) mod sealed { | |||
| 889 | /// UARTE peripheral instance. | 889 | /// UARTE peripheral instance. |
| 890 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 890 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 891 | /// Interrupt for this peripheral. | 891 | /// Interrupt for this peripheral. |
| 892 | type Interrupt: Interrupt; | 892 | type Interrupt: interrupt::typelevel::Interrupt; |
| 893 | } | 893 | } |
| 894 | 894 | ||
| 895 | macro_rules! impl_uarte { | 895 | macro_rules! impl_uarte { |
| @@ -908,7 +908,7 @@ macro_rules! impl_uarte { | |||
| 908 | } | 908 | } |
| 909 | } | 909 | } |
| 910 | impl crate::uarte::Instance for peripherals::$type { | 910 | impl crate::uarte::Instance for peripherals::$type { |
| 911 | type Interrupt = crate::interrupt::$irq; | 911 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 912 | } | 912 | } |
| 913 | }; | 913 | }; |
| 914 | } | 914 | } |
diff --git a/embassy-nrf/src/usb/mod.rs b/embassy-nrf/src/usb/mod.rs index 3c62b4452..76cf40ac7 100644 --- a/embassy-nrf/src/usb/mod.rs +++ b/embassy-nrf/src/usb/mod.rs | |||
| @@ -18,9 +18,9 @@ use embassy_usb_driver::{Direction, EndpointAddress, EndpointError, EndpointInfo | |||
| 18 | use pac::usbd::RegisterBlock; | 18 | use pac::usbd::RegisterBlock; |
| 19 | 19 | ||
| 20 | use self::vbus_detect::VbusDetect; | 20 | use self::vbus_detect::VbusDetect; |
| 21 | use crate::interrupt::{self, Interrupt}; | 21 | use crate::interrupt::typelevel::Interrupt; |
| 22 | use crate::util::slice_in_ram; | 22 | use crate::util::slice_in_ram; |
| 23 | use crate::{pac, Peripheral}; | 23 | use crate::{interrupt, pac, Peripheral}; |
| 24 | 24 | ||
| 25 | const NEW_AW: AtomicWaker = AtomicWaker::new(); | 25 | const NEW_AW: AtomicWaker = AtomicWaker::new(); |
| 26 | static BUS_WAKER: AtomicWaker = NEW_AW; | 26 | static BUS_WAKER: AtomicWaker = NEW_AW; |
| @@ -34,7 +34,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 34 | _phantom: PhantomData<T>, | 34 | _phantom: PhantomData<T>, |
| 35 | } | 35 | } |
| 36 | 36 | ||
| 37 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 37 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 38 | unsafe fn on_interrupt() { | 38 | unsafe fn on_interrupt() { |
| 39 | let regs = T::regs(); | 39 | let regs = T::regs(); |
| 40 | 40 | ||
| @@ -98,7 +98,7 @@ impl<'d, T: Instance, V: VbusDetect> Driver<'d, T, V> { | |||
| 98 | /// Create a new USB driver. | 98 | /// Create a new USB driver. |
| 99 | pub fn new( | 99 | pub fn new( |
| 100 | usb: impl Peripheral<P = T> + 'd, | 100 | usb: impl Peripheral<P = T> + 'd, |
| 101 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 101 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 102 | vbus_detect: V, | 102 | vbus_detect: V, |
| 103 | ) -> Self { | 103 | ) -> Self { |
| 104 | into_ref!(usb); | 104 | into_ref!(usb); |
| @@ -804,7 +804,7 @@ pub(crate) mod sealed { | |||
| 804 | /// USB peripheral instance. | 804 | /// USB peripheral instance. |
| 805 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 805 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 806 | /// Interrupt for this peripheral. | 806 | /// Interrupt for this peripheral. |
| 807 | type Interrupt: Interrupt; | 807 | type Interrupt: interrupt::typelevel::Interrupt; |
| 808 | } | 808 | } |
| 809 | 809 | ||
| 810 | macro_rules! impl_usb { | 810 | macro_rules! impl_usb { |
| @@ -815,7 +815,7 @@ macro_rules! impl_usb { | |||
| 815 | } | 815 | } |
| 816 | } | 816 | } |
| 817 | impl crate::usb::Instance for peripherals::$type { | 817 | impl crate::usb::Instance for peripherals::$type { |
| 818 | type Interrupt = crate::interrupt::$irq; | 818 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 819 | } | 819 | } |
| 820 | }; | 820 | }; |
| 821 | } | 821 | } |
diff --git a/embassy-nrf/src/usb/vbus_detect.rs b/embassy-nrf/src/usb/vbus_detect.rs index a6a959905..a05e5aa52 100644 --- a/embassy-nrf/src/usb/vbus_detect.rs +++ b/embassy-nrf/src/usb/vbus_detect.rs | |||
| @@ -7,8 +7,8 @@ use core::task::Poll; | |||
| 7 | use embassy_sync::waitqueue::AtomicWaker; | 7 | use embassy_sync::waitqueue::AtomicWaker; |
| 8 | 8 | ||
| 9 | use super::BUS_WAKER; | 9 | use super::BUS_WAKER; |
| 10 | use crate::interrupt::{self, Interrupt}; | 10 | use crate::interrupt::typelevel::Interrupt; |
| 11 | use crate::pac; | 11 | use crate::{interrupt, pac}; |
| 12 | 12 | ||
| 13 | /// Trait for detecting USB VBUS power. | 13 | /// Trait for detecting USB VBUS power. |
| 14 | /// | 14 | /// |
| @@ -29,9 +29,9 @@ pub trait VbusDetect { | |||
| 29 | } | 29 | } |
| 30 | 30 | ||
| 31 | #[cfg(not(feature = "_nrf5340"))] | 31 | #[cfg(not(feature = "_nrf5340"))] |
| 32 | type UsbRegIrq = interrupt::POWER_CLOCK; | 32 | type UsbRegIrq = interrupt::typelevel::POWER_CLOCK; |
| 33 | #[cfg(feature = "_nrf5340")] | 33 | #[cfg(feature = "_nrf5340")] |
| 34 | type UsbRegIrq = interrupt::USBREGULATOR; | 34 | type UsbRegIrq = interrupt::typelevel::USBREGULATOR; |
| 35 | 35 | ||
| 36 | #[cfg(not(feature = "_nrf5340"))] | 36 | #[cfg(not(feature = "_nrf5340"))] |
| 37 | type UsbRegPeri = pac::POWER; | 37 | type UsbRegPeri = pac::POWER; |
| @@ -43,7 +43,7 @@ pub struct InterruptHandler { | |||
| 43 | _private: (), | 43 | _private: (), |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | impl interrupt::Handler<UsbRegIrq> for InterruptHandler { | 46 | impl interrupt::typelevel::Handler<UsbRegIrq> for InterruptHandler { |
| 47 | unsafe fn on_interrupt() { | 47 | unsafe fn on_interrupt() { |
| 48 | let regs = unsafe { &*UsbRegPeri::ptr() }; | 48 | let regs = unsafe { &*UsbRegPeri::ptr() }; |
| 49 | 49 | ||
| @@ -77,7 +77,7 @@ static POWER_WAKER: AtomicWaker = AtomicWaker::new(); | |||
| 77 | 77 | ||
| 78 | impl HardwareVbusDetect { | 78 | impl HardwareVbusDetect { |
| 79 | /// Create a new `VbusDetectNative`. | 79 | /// Create a new `VbusDetectNative`. |
| 80 | pub fn new(_irq: impl interrupt::Binding<UsbRegIrq, InterruptHandler> + 'static) -> Self { | 80 | pub fn new(_irq: impl interrupt::typelevel::Binding<UsbRegIrq, InterruptHandler> + 'static) -> Self { |
| 81 | let regs = unsafe { &*UsbRegPeri::ptr() }; | 81 | let regs = unsafe { &*UsbRegPeri::ptr() }; |
| 82 | 82 | ||
| 83 | UsbRegIrq::unpend(); | 83 | UsbRegIrq::unpend(); |
