Merge branch 'main' into 17-add-support-for-boot-protocol

7 files changed, 140 insertions, 130 deletions

diff --git a/embassy-nxp/src/dma/lpc55.rs b/embassy-nxp/src/dma/lpc55.rs
index 578d1fd88..5bd763f03 100644
--- a/embassy-nxp/src/dma/lpc55.rs
+++ b/embassy-nxp/src/dma/lpc55.rs
@@ -1,16 +1,16 @@
 use core::cell::RefCell;
 use core::future::Future;
 use core::pin::Pin;
-use core::sync::atomic::{compiler_fence, Ordering};
+use core::sync::atomic::{Ordering, compiler_fence};
 use core::task::{Context, Poll};
 
 use critical_section::Mutex;
 use embassy_hal_internal::interrupt::InterruptExt;
-use embassy_hal_internal::{impl_peripheral, PeripheralType};
+use embassy_hal_internal::{PeripheralType, impl_peripheral};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::pac::{DMA0, SYSCON, *};
-use crate::{peripherals, Peri};
+use crate::{Peri, peripherals};
 
 #[interrupt]
 fn DMA0() {
diff --git a/embassy-nxp/src/gpio/lpc55.rs b/embassy-nxp/src/gpio/lpc55.rs
index 36ea99d21..6039d8ca8 100644
--- a/embassy-nxp/src/gpio/lpc55.rs
+++ b/embassy-nxp/src/gpio/lpc55.rs
@@ -1,8 +1,9 @@
-use embassy_hal_internal::{impl_peripheral, PeripheralType};
+use embassy_hal_internal::{PeripheralType, impl_peripheral};
 
+use crate::pac::common::{RW, Reg};
 use crate::pac::iocon::vals::{PioDigimode, PioMode};
-use crate::pac::{GPIO, IOCON, SYSCON};
-use crate::{peripherals, Peri};
+use crate::pac::{GPIO, IOCON, SYSCON, iocon};
+use crate::{Peri, peripherals};
 
 pub(crate) fn init() {
     // Enable clocks for GPIO, PINT, and IOCON
@@ -109,13 +110,7 @@ impl<'d> Input<'d> {
 
     /// Set the pull configuration for the pin. To disable the pull, use [Pull::None].
     pub fn set_pull(&mut self, pull: Pull) {
-        match_iocon!(register, self.pin.pin_bank(), self.pin.pin_number(), {
-            register.modify(|w| match pull {
-                Pull::None => w.set_mode(PioMode::INACTIVE),
-                Pull::Up => w.set_mode(PioMode::PULL_UP),
-                Pull::Down => w.set_mode(PioMode::PULL_DOWN),
-            });
-        });
+        self.pin.set_pull(pull);
     }
 
     /// Get the current input level of the pin.
@@ -193,11 +188,20 @@ impl<'d> Flex<'d> {
         1 << self.pin.pin_number()
     }
 
+    /// Set the pull configuration for the pin. To disable the pull, use [Pull::None].
+    pub fn set_pull(&mut self, pull: Pull) {
+        self.pin.pio().modify(|w| match pull {
+            Pull::None => w.set_mode(PioMode::INACTIVE),
+            Pull::Up => w.set_mode(PioMode::PULL_UP),
+            Pull::Down => w.set_mode(PioMode::PULL_DOWN),
+        });
+    }
+
     /// Set the pin to digital mode. This is required for using a pin as a GPIO pin. The default
     /// setting for pins is (usually) non-digital.
     fn set_as_digital(&mut self) {
-        match_iocon!(register, self.pin_bank(), self.pin_number(), {
-            register.modify(|w| w.set_digimode(PioDigimode::DIGITAL));
+        self.pin.pio().modify(|w| {
+            w.set_digimode(PioDigimode::DIGITAL);
         });
     }
 
@@ -220,6 +224,14 @@ impl<'d> Flex<'d> {
 pub(crate) trait SealedPin: Sized {
     fn pin_bank(&self) -> Bank;
     fn pin_number(&self) -> u8;
+
+    #[inline]
+    fn pio(&self) -> Reg<iocon::regs::Pio, RW> {
+        match self.pin_bank() {
+            Bank::Bank0 => IOCON.pio0(self.pin_number() as usize),
+            Bank::Bank1 => IOCON.pio1(self.pin_number() as usize),
+        }
+    }
 }
 
 /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an
@@ -272,40 +284,6 @@ impl SealedPin for AnyPin {
     }
 }
 
-/// Match the pin bank and number of a pin to the corresponding IOCON register.
-///
-/// # Example
-/// ```
-/// use embassy_nxp::gpio::Bank;
-/// use embassy_nxp::pac_utils::{iocon_reg, match_iocon};
-///
-/// // Make pin PIO1_6 digital and set it to pull-down mode.
-/// match_iocon!(register, Bank::Bank1, 6, {
-///     register.modify(|w|{
-///         w.set_mode(PioMode::PULL_DOWN);
-///         w.set_digimode(PioDigimode::DIGITAL);
-///
-///     }
-/// });
-/// ```
-macro_rules! match_iocon {
-    ($register:ident, $pin_bank:expr, $pin_number:expr, $action:expr) => {
-        match $pin_bank {
-            Bank::Bank0 => {
-                let $register = IOCON.pio0($pin_number as usize);
-                $action;
-            }
-
-            Bank::Bank1 => {
-                let $register = IOCON.pio1($pin_number as usize);
-                $action;
-            }
-        }
-    };
-}
-
-pub(crate) use match_iocon;
-
 macro_rules! impl_pin {
     ($name:ident, $bank:expr, $pin_num:expr) => {
         impl Pin for peripherals::$name {}
diff --git a/embassy-nxp/src/gpio/rt1xxx.rs b/embassy-nxp/src/gpio/rt1xxx.rs
index 1d60a0d51..c4dc110ff 100644
--- a/embassy-nxp/src/gpio/rt1xxx.rs
+++ b/embassy-nxp/src/gpio/rt1xxx.rs
@@ -5,13 +5,13 @@ use core::ops::Not;
 use core::pin::Pin as FuturePin;
 use core::task::{Context, Poll};
 
-use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
+use embassy_hal_internal::{Peri, PeripheralType, impl_peripheral};
 use embassy_sync::waitqueue::AtomicWaker;
 use nxp_pac::gpio::vals::Icr;
 use nxp_pac::iomuxc::vals::Pus;
 
 use crate::chip::{mux_address, pad_address};
-use crate::pac::common::{Reg, RW};
+use crate::pac::common::{RW, Reg};
 use crate::pac::gpio::Gpio;
 #[cfg(feature = "rt")]
 use crate::pac::interrupt;
diff --git a/embassy-nxp/src/lib.rs b/embassy-nxp/src/lib.rs
index f0f0afb6c..9576f02b1 100644
--- a/embassy-nxp/src/lib.rs
+++ b/embassy-nxp/src/lib.rs
@@ -1,4 +1,5 @@
 #![no_std]
+#![allow(unsafe_op_in_unsafe_fn)]
 
 // This mod MUST go first, so that the others see its macros.
 pub(crate) mod fmt;
@@ -29,7 +30,7 @@ pub use chip::interrupt;
 pub use chip::pac;
 #[cfg(not(feature = "unstable-pac"))]
 pub(crate) use chip::pac;
-pub use chip::{peripherals, Peripherals};
+pub use chip::{Peripherals, peripherals};
 pub use embassy_hal_internal::{Peri, PeripheralType};
 
 /// Macro to bind interrupts to handlers.
@@ -67,7 +68,7 @@ macro_rules! bind_interrupts {
 
         $(
             #[allow(non_snake_case)]
-            #[no_mangle]
+            #[unsafe(no_mangle)]
             $(#[cfg($cond_irq)])?
             unsafe extern "C" fn $irq() {
                 unsafe {
diff --git a/embassy-nxp/src/pint.rs b/embassy-nxp/src/pint.rs
index e594aaa6a..5b10b4540 100644
--- a/embassy-nxp/src/pint.rs
+++ b/embassy-nxp/src/pint.rs
@@ -8,9 +8,9 @@ use critical_section::Mutex;
 use embassy_hal_internal::interrupt::InterruptExt;
 use embassy_sync::waitqueue::AtomicWaker;
 
-use crate::gpio::{self, AnyPin, Level, SealedPin};
-use crate::pac::{interrupt, INPUTMUX, PINT, SYSCON};
 use crate::Peri;
+use crate::gpio::{self, AnyPin, Level, SealedPin};
+use crate::pac::{INPUTMUX, PINT, SYSCON, interrupt};
 
 struct PinInterrupt {
     assigned: bool,
diff --git a/embassy-nxp/src/time_driver/rtc.rs b/embassy-nxp/src/time_driver/rtc.rs
index fb6de6a5e..0883fa2e8 100644
--- a/embassy-nxp/src/time_driver/rtc.rs
+++ b/embassy-nxp/src/time_driver/rtc.rs
@@ -4,10 +4,10 @@ use core::task::Waker;
 use critical_section::CriticalSection;
 use embassy_hal_internal::interrupt::{InterruptExt, Priority};
 use embassy_sync::blocking_mutex::CriticalSectionMutex as Mutex;
-use embassy_time_driver::{time_driver_impl, Driver};
+use embassy_time_driver::{Driver, time_driver_impl};
 use embassy_time_queue_utils::Queue;
 
-use crate::pac::{interrupt, pmc, rtc, PMC, RTC, SYSCON};
+use crate::pac::{PMC, RTC, SYSCON, interrupt, pmc, rtc};
 
 struct AlarmState {
     timestamp: Cell<u64>,
diff --git a/embassy-nxp/src/usart/lpc55.rs b/embassy-nxp/src/usart/lpc55.rs
index 9034ed429..d54927b25 100644
--- a/embassy-nxp/src/usart/lpc55.rs
+++ b/embassy-nxp/src/usart/lpc55.rs
@@ -4,16 +4,16 @@ use core::marker::PhantomData;
 use core::sync::atomic::{AtomicBool, Ordering};
 use core::task::Poll;
 
-use embassy_futures::select::{select, Either};
+use embassy_futures::select::{Either, select};
 use embassy_hal_internal::interrupt::InterruptExt;
 use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use embedded_io::{self, ErrorKind};
 
 use crate::dma::{AnyChannel, Channel};
-use crate::gpio::{match_iocon, AnyPin, Bank, SealedPin};
-use crate::interrupt::typelevel::{Binding, Interrupt as _};
+use crate::gpio::{AnyPin, SealedPin};
 use crate::interrupt::Interrupt;
+use crate::interrupt::typelevel::{Binding, Interrupt as _};
 use crate::pac::flexcomm::Flexcomm as FlexcommReg;
 use crate::pac::iocon::vals::PioFunc;
 use crate::pac::usart::Usart as UsartReg;
@@ -146,7 +146,8 @@ impl<'d, M: Mode> UsartTx<'d, M> {
         tx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        Usart::<M>::init::<T>(Some(tx.into()), None, config);
+        let tx_func = tx.pin_func();
+        Usart::<M>::init::<T>(Some((tx.into(), tx_func)), None, config);
         Self::new_inner(T::info(), Some(tx_dma.into()))
     }
 
@@ -179,7 +180,8 @@ impl<'d, M: Mode> UsartTx<'d, M> {
 
 impl<'d> UsartTx<'d, Blocking> {
     pub fn new_blocking<T: Instance>(_usart: Peri<'d, T>, tx: Peri<'d, impl TxPin<T>>, config: Config) -> Self {
-        Usart::<Blocking>::init::<T>(Some(tx.into()), None, config);
+        let tx_func = tx.pin_func();
+        Usart::<Blocking>::init::<T>(Some((tx.into(), tx_func)), None, config);
         Self::new_inner(T::info(), None)
     }
 }
@@ -208,7 +210,8 @@ impl<'d, M: Mode> UsartRx<'d, M> {
         rx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        Usart::<M>::init::<T>(None, Some(rx.into()), config);
+        let rx_func = rx.pin_func();
+        Usart::<M>::init::<T>(None, Some((rx.into(), rx_func)), config);
         Self::new_inner(T::info(), T::dma_state(), has_irq, Some(rx_dma.into()))
     }
 
@@ -280,7 +283,8 @@ impl<'d, M: Mode> UsartRx<'d, M> {
 
 impl<'d> UsartRx<'d, Blocking> {
     pub fn new_blocking<T: Instance>(_usart: Peri<'d, T>, rx: Peri<'d, impl RxPin<T>>, config: Config) -> Self {
-        Usart::<Blocking>::init::<T>(None, Some(rx.into()), config);
+        let rx_func = rx.pin_func();
+        Usart::<Blocking>::init::<T>(None, Some((rx.into(), rx_func)), config);
         Self::new_inner(T::info(), T::dma_state(), false, None)
     }
 }
@@ -405,7 +409,10 @@ impl<'d> Usart<'d, Blocking> {
         rx: Peri<'d, impl RxPin<T>>,
         config: Config,
     ) -> Self {
-        Self::new_inner(usart, tx.into(), rx.into(), false, None, None, config)
+        let tx_func = tx.pin_func();
+        let rx_func = rx.pin_func();
+
+        Self::new_inner(usart, tx.into(), tx_func, rx.into(), rx_func, false, None, None, config)
     }
 }
 
@@ -419,10 +426,15 @@ impl<'d> Usart<'d, Async> {
         rx_dma: Peri<'d, impl RxChannel<T>>,
         config: Config,
     ) -> Self {
+        let tx_func = tx.pin_func();
+        let rx_func = rx.pin_func();
+
         Self::new_inner(
             uart,
             tx.into(),
+            tx_func,
             rx.into(),
+            rx_func,
             true,
             Some(tx_dma.into()),
             Some(rx_dma.into()),
@@ -435,20 +447,26 @@ impl<'d, M: Mode> Usart<'d, M> {
     fn new_inner<T: Instance>(
         _usart: Peri<'d, T>,
         mut tx: Peri<'d, AnyPin>,
+        tx_func: PioFunc,
         mut rx: Peri<'d, AnyPin>,
+        rx_func: PioFunc,
         has_irq: bool,
         tx_dma: Option<Peri<'d, AnyChannel>>,
         rx_dma: Option<Peri<'d, AnyChannel>>,
         config: Config,
     ) -> Self {
-        Self::init::<T>(Some(tx.reborrow()), Some(rx.reborrow()), config);
+        Self::init::<T>(Some((tx.reborrow(), tx_func)), Some((rx.reborrow(), rx_func)), config);
         Self {
             tx: UsartTx::new_inner(T::info(), tx_dma),
             rx: UsartRx::new_inner(T::info(), T::dma_state(), has_irq, rx_dma),
         }
     }
 
-    fn init<T: Instance>(tx: Option<Peri<'_, AnyPin>>, rx: Option<Peri<'_, AnyPin>>, config: Config) {
+    fn init<T: Instance>(
+        tx: Option<(Peri<'_, AnyPin>, PioFunc)>,
+        rx: Option<(Peri<'_, AnyPin>, PioFunc)>,
+        config: Config,
+    ) {
         Self::configure_flexcomm(T::info().fc_reg, T::instance_number());
         Self::configure_clock::<T>(&config);
         Self::pin_config::<T>(tx, rx);
@@ -553,31 +571,27 @@ impl<'d, M: Mode> Usart<'d, M> {
             .modify(|w| w.set_brgval((brg_value - 1) as u16));
     }
 
-    fn pin_config<T: Instance>(tx: Option<Peri<'_, AnyPin>>, rx: Option<Peri<'_, AnyPin>>) {
-        if let Some(tx_pin) = tx {
-            match_iocon!(register, tx_pin.pin_bank(), tx_pin.pin_number(), {
-                register.modify(|w| {
-                    w.set_func(T::tx_pin_func());
-                    w.set_mode(iocon::vals::PioMode::INACTIVE);
-                    w.set_slew(iocon::vals::PioSlew::STANDARD);
-                    w.set_invert(false);
-                    w.set_digimode(iocon::vals::PioDigimode::DIGITAL);
-                    w.set_od(iocon::vals::PioOd::NORMAL);
-                });
-            })
+    fn pin_config<T: Instance>(tx: Option<(Peri<'_, AnyPin>, PioFunc)>, rx: Option<(Peri<'_, AnyPin>, PioFunc)>) {
+        if let Some((tx_pin, func)) = tx {
+            tx_pin.pio().modify(|w| {
+                w.set_func(func);
+                w.set_mode(iocon::vals::PioMode::INACTIVE);
+                w.set_slew(iocon::vals::PioSlew::STANDARD);
+                w.set_invert(false);
+                w.set_digimode(iocon::vals::PioDigimode::DIGITAL);
+                w.set_od(iocon::vals::PioOd::NORMAL);
+            });
         }
 
-        if let Some(rx_pin) = rx {
-            match_iocon!(register, rx_pin.pin_bank(), rx_pin.pin_number(), {
-                register.modify(|w| {
-                    w.set_func(T::rx_pin_func());
-                    w.set_mode(iocon::vals::PioMode::INACTIVE);
-                    w.set_slew(iocon::vals::PioSlew::STANDARD);
-                    w.set_invert(false);
-                    w.set_digimode(iocon::vals::PioDigimode::DIGITAL);
-                    w.set_od(iocon::vals::PioOd::NORMAL);
-                });
-            })
+        if let Some((rx_pin, func)) = rx {
+            rx_pin.pio().modify(|w| {
+                w.set_func(func);
+                w.set_mode(iocon::vals::PioMode::INACTIVE);
+                w.set_slew(iocon::vals::PioSlew::STANDARD);
+                w.set_invert(false);
+                w.set_digimode(iocon::vals::PioDigimode::DIGITAL);
+                w.set_od(iocon::vals::PioOd::NORMAL);
+            });
         };
     }
 
@@ -814,8 +828,6 @@ trait SealedInstance {
     fn info() -> &'static Info;
     fn dma_state() -> &'static DmaState;
     fn instance_number() -> usize;
-    fn tx_pin_func() -> PioFunc;
-    fn rx_pin_func() -> PioFunc;
 }
 
 /// UART instance.
@@ -826,7 +838,7 @@ pub trait Instance: SealedInstance + PeripheralType {
 }
 
 macro_rules! impl_instance {
-    ($inst:ident, $fc:ident, $tx_pin:ident, $rx_pin:ident, $fc_num:expr) => {
+    ($inst:ident, $fc:ident, $fc_num:expr) => {
         impl $crate::usart::inner::SealedInstance for $crate::peripherals::$inst {
             fn info() -> &'static Info {
                 static INFO: Info = Info {
@@ -848,14 +860,6 @@ macro_rules! impl_instance {
             fn instance_number() -> usize {
                 $fc_num
             }
-            #[inline]
-            fn tx_pin_func() -> PioFunc {
-                PioFunc::$tx_pin
-            }
-            #[inline]
-            fn rx_pin_func() -> PioFunc {
-                PioFunc::$rx_pin
-            }
         }
         impl $crate::usart::Instance for $crate::peripherals::$inst {
             type Interrupt = crate::interrupt::typelevel::$fc;
@@ -863,45 +867,72 @@ macro_rules! impl_instance {
     };
 }
 
-impl_instance!(USART0, FLEXCOMM0, ALT1, ALT1, 0);
-impl_instance!(USART1, FLEXCOMM1, ALT2, ALT2, 1);
-impl_instance!(USART2, FLEXCOMM2, ALT1, ALT1, 2);
-impl_instance!(USART3, FLEXCOMM3, ALT1, ALT1, 3);
-impl_instance!(USART4, FLEXCOMM4, ALT1, ALT2, 4);
-impl_instance!(USART5, FLEXCOMM5, ALT3, ALT3, 5);
-impl_instance!(USART6, FLEXCOMM6, ALT2, ALT2, 6);
-impl_instance!(USART7, FLEXCOMM7, ALT7, ALT7, 7);
+impl_instance!(USART0, FLEXCOMM0, 0);
+impl_instance!(USART1, FLEXCOMM1, 1);
+impl_instance!(USART2, FLEXCOMM2, 2);
+impl_instance!(USART3, FLEXCOMM3, 3);
+impl_instance!(USART4, FLEXCOMM4, 4);
+impl_instance!(USART5, FLEXCOMM5, 5);
+impl_instance!(USART6, FLEXCOMM6, 6);
+impl_instance!(USART7, FLEXCOMM7, 7);
+
+pub(crate) trait SealedTxPin<T: Instance>: crate::gpio::Pin {
+    fn pin_func(&self) -> PioFunc;
+}
+
+pub(crate) trait SealedRxPin<T: Instance>: crate::gpio::Pin {
+    fn pin_func(&self) -> PioFunc;
+}
 
 /// Trait for TX pins.
-pub trait TxPin<T: Instance>: crate::gpio::Pin {}
+#[allow(private_bounds)]
+pub trait TxPin<T: Instance>: SealedTxPin<T> + crate::gpio::Pin {}
+
 /// Trait for RX pins.
-pub trait RxPin<T: Instance>: crate::gpio::Pin {}
+#[allow(private_bounds)]
+pub trait RxPin<T: Instance>: SealedRxPin<T> + crate::gpio::Pin {}
+
+macro_rules! impl_tx_pin {
+    ($pin:ident, $instance:ident, $func: ident) => {
+        impl SealedTxPin<crate::peripherals::$instance> for crate::peripherals::$pin {
+            fn pin_func(&self) -> PioFunc {
+                PioFunc::$func
+            }
+        }
 
-macro_rules! impl_pin {
-    ($pin:ident, $instance:ident, Tx) => {
         impl TxPin<crate::peripherals::$instance> for crate::peripherals::$pin {}
     };
-    ($pin:ident, $instance:ident, Rx) => {
+}
+
+macro_rules! impl_rx_pin {
+    ($pin:ident, $instance:ident, $func: ident) => {
+        impl SealedRxPin<crate::peripherals::$instance> for crate::peripherals::$pin {
+            fn pin_func(&self) -> PioFunc {
+                PioFunc::$func
+            }
+        }
+
         impl RxPin<crate::peripherals::$instance> for crate::peripherals::$pin {}
     };
 }
 
-impl_pin!(PIO1_6, USART0, Tx);
-impl_pin!(PIO1_5, USART0, Rx);
-impl_pin!(PIO1_11, USART1, Tx);
-impl_pin!(PIO1_10, USART1, Rx);
-impl_pin!(PIO0_27, USART2, Tx);
-impl_pin!(PIO1_24, USART2, Rx);
-impl_pin!(PIO0_2, USART3, Tx);
-impl_pin!(PIO0_3, USART3, Rx);
-impl_pin!(PIO0_16, USART4, Tx);
-impl_pin!(PIO0_5, USART4, Rx);
-impl_pin!(PIO0_9, USART5, Tx);
-impl_pin!(PIO0_8, USART5, Rx);
-impl_pin!(PIO1_16, USART6, Tx);
-impl_pin!(PIO1_13, USART6, Rx);
-impl_pin!(PIO0_19, USART7, Tx);
-impl_pin!(PIO0_20, USART7, Rx);
+impl_tx_pin!(PIO1_6, USART0, ALT1);
+impl_tx_pin!(PIO1_11, USART1, ALT2);
+impl_tx_pin!(PIO0_27, USART2, ALT1);
+impl_tx_pin!(PIO0_2, USART3, ALT1);
+impl_tx_pin!(PIO0_16, USART4, ALT1);
+impl_tx_pin!(PIO0_9, USART5, ALT3);
+impl_tx_pin!(PIO1_16, USART6, ALT2);
+impl_tx_pin!(PIO0_19, USART7, ALT7);
+
+impl_rx_pin!(PIO1_5, USART0, ALT1);
+impl_rx_pin!(PIO1_10, USART1, ALT2);
+impl_rx_pin!(PIO1_24, USART2, ALT1);
+impl_rx_pin!(PIO0_3, USART3, ALT1);
+impl_rx_pin!(PIO0_5, USART4, ALT2);
+impl_rx_pin!(PIO0_8, USART5, ALT3);
+impl_rx_pin!(PIO1_13, USART6, ALT2);
+impl_rx_pin!(PIO0_20, USART7, ALT7);
 
 /// Trait for TX DMA channels.
 pub trait TxChannel<T: Instance>: crate::dma::Channel {}