diff options
| author | Adam Greig <[email protected]> | 2023-10-15 00:57:25 +0100 |
|---|---|---|
| committer | Adam Greig <[email protected]> | 2023-10-15 01:30:12 +0100 |
| commit | 0621e957a0ddc7010d46b3ea3ddc8b9852bc8333 (patch) | |
| tree | f6caefe939109e55a73e9141c736d2f6c20f51e8 /embassy-rp/src/uart | |
| parent | 7559f9e5834799b041d899767ef4305dcfdf0181 (diff) | |
time: Update examples, tests, and other code to use new Timer::after_x convenience methods
Diffstat (limited to 'embassy-rp/src/uart')
| -rw-r--r-- | embassy-rp/src/uart/buffered.rs | 4 | ||||
| -rw-r--r-- | embassy-rp/src/uart/mod.rs | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs index 645d703d8..9f638761d 100644 --- a/embassy-rp/src/uart/buffered.rs +++ b/embassy-rp/src/uart/buffered.rs | |||
| @@ -5,7 +5,7 @@ use core::task::Poll; | |||
| 5 | use atomic_polyfill::{AtomicU8, Ordering}; | 5 | use atomic_polyfill::{AtomicU8, Ordering}; |
| 6 | use embassy_hal_internal::atomic_ring_buffer::RingBuffer; | 6 | use embassy_hal_internal::atomic_ring_buffer::RingBuffer; |
| 7 | use embassy_sync::waitqueue::AtomicWaker; | 7 | use embassy_sync::waitqueue::AtomicWaker; |
| 8 | use embassy_time::{Duration, Timer}; | 8 | use embassy_time::Timer; |
| 9 | 9 | ||
| 10 | use super::*; | 10 | use super::*; |
| 11 | use crate::clocks::clk_peri_freq; | 11 | use crate::clocks::clk_peri_freq; |
| @@ -435,7 +435,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { | |||
| 435 | Self::flush().await.unwrap(); | 435 | Self::flush().await.unwrap(); |
| 436 | while self.busy() {} | 436 | while self.busy() {} |
| 437 | regs.uartlcr_h().write_set(|w| w.set_brk(true)); | 437 | regs.uartlcr_h().write_set(|w| w.set_brk(true)); |
| 438 | Timer::after(Duration::from_micros(wait_usecs)).await; | 438 | Timer::after_micros(wait_usecs).await; |
| 439 | regs.uartlcr_h().write_clear(|w| w.set_brk(true)); | 439 | regs.uartlcr_h().write_clear(|w| w.set_brk(true)); |
| 440 | } | 440 | } |
| 441 | } | 441 | } |
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 202b0883e..461986c81 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs | |||
| @@ -6,7 +6,7 @@ use atomic_polyfill::{AtomicU16, Ordering}; | |||
| 6 | use embassy_futures::select::{select, Either}; | 6 | use embassy_futures::select::{select, Either}; |
| 7 | use embassy_hal_internal::{into_ref, PeripheralRef}; | 7 | use embassy_hal_internal::{into_ref, PeripheralRef}; |
| 8 | use embassy_sync::waitqueue::AtomicWaker; | 8 | use embassy_sync::waitqueue::AtomicWaker; |
| 9 | use embassy_time::{Duration, Timer}; | 9 | use embassy_time::Timer; |
| 10 | use pac::uart::regs::Uartris; | 10 | use pac::uart::regs::Uartris; |
| 11 | 11 | ||
| 12 | use crate::clocks::clk_peri_freq; | 12 | use crate::clocks::clk_peri_freq; |
| @@ -187,7 +187,7 @@ impl<'d, T: Instance, M: Mode> UartTx<'d, T, M> { | |||
| 187 | self.blocking_flush().unwrap(); | 187 | self.blocking_flush().unwrap(); |
| 188 | while self.busy() {} | 188 | while self.busy() {} |
| 189 | regs.uartlcr_h().write_set(|w| w.set_brk(true)); | 189 | regs.uartlcr_h().write_set(|w| w.set_brk(true)); |
| 190 | Timer::after(Duration::from_micros(wait_usecs)).await; | 190 | Timer::after_micros(wait_usecs).await; |
| 191 | regs.uartlcr_h().write_clear(|w| w.set_brk(true)); | 191 | regs.uartlcr_h().write_clear(|w| w.set_brk(true)); |
| 192 | } | 192 | } |
| 193 | } | 193 | } |
