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authorRafael Bachmann <[email protected]>2024-03-18 23:28:58 +0100
committerRafael Bachmann <[email protected]>2024-03-18 23:28:58 +0100
commit255ed29853eb88bff2ee548c63fb4d0a6dfad7e8 (patch)
tree1e4141a01dc06d60378f0fa10c863f6f35660621 /embassy-rp/src/uart
parent6d9f87356bb523de6a17fc380f23c04ee66b38ce (diff)
fix minor clippy lints in embassy_rp
Diffstat (limited to 'embassy-rp/src/uart')
-rw-r--r--embassy-rp/src/uart/buffered.rs4
-rw-r--r--embassy-rp/src/uart/mod.rs2
2 files changed, 3 insertions, 3 deletions
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs
index 99c958129..7622539f1 100644
--- a/embassy-rp/src/uart/buffered.rs
+++ b/embassy-rp/src/uart/buffered.rs
@@ -467,7 +467,7 @@ impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> {
467 467
468 // TX is inactive if the the buffer is not available. 468 // TX is inactive if the the buffer is not available.
469 // We can now unregister the interrupt handler 469 // We can now unregister the interrupt handler
470 if state.tx_buf.len() == 0 { 470 if state.tx_buf.is_empty() {
471 T::Interrupt::disable(); 471 T::Interrupt::disable();
472 } 472 }
473 } 473 }
@@ -480,7 +480,7 @@ impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> {
480 480
481 // RX is inactive if the the buffer is not available. 481 // RX is inactive if the the buffer is not available.
482 // We can now unregister the interrupt handler 482 // We can now unregister the interrupt handler
483 if state.rx_buf.len() == 0 { 483 if state.rx_buf.is_empty() {
484 T::Interrupt::disable(); 484 T::Interrupt::disable();
485 } 485 }
486 } 486 }
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index f372cb640..65dcf4eb4 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -322,7 +322,7 @@ impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> {
322 322
323impl<'d, T: Instance, M: Mode> Drop for UartRx<'d, T, M> { 323impl<'d, T: Instance, M: Mode> Drop for UartRx<'d, T, M> {
324 fn drop(&mut self) { 324 fn drop(&mut self) {
325 if let Some(_) = self.rx_dma { 325 if self.rx_dma.is_some() {
326 T::Interrupt::disable(); 326 T::Interrupt::disable();
327 // clear dma flags. irq handlers use these to disambiguate among themselves. 327 // clear dma flags. irq handlers use these to disambiguate among themselves.
328 T::regs().uartdmacr().write_clear(|reg| { 328 T::regs().uartdmacr().write_clear(|reg| {