diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-rp | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-rp')
| -rw-r--r-- | embassy-rp/src/adc.rs | 16 | ||||
| -rw-r--r-- | embassy-rp/src/dma.rs | 8 | ||||
| -rw-r--r-- | embassy-rp/src/gpio.rs | 8 | ||||
| -rw-r--r-- | embassy-rp/src/i2c.rs | 13 | ||||
| -rw-r--r-- | embassy-rp/src/interrupt.rs | 65 | ||||
| -rw-r--r-- | embassy-rp/src/lib.rs | 64 | ||||
| -rw-r--r-- | embassy-rp/src/multicore.rs | 4 | ||||
| -rw-r--r-- | embassy-rp/src/pio.rs | 14 | ||||
| -rw-r--r-- | embassy-rp/src/timer.rs | 10 | ||||
| -rw-r--r-- | embassy-rp/src/uart/buffered.rs | 6 | ||||
| -rw-r--r-- | embassy-rp/src/uart/mod.rs | 10 | ||||
| -rw-r--r-- | embassy-rp/src/usb.rs | 11 |
12 files changed, 111 insertions, 118 deletions
diff --git a/embassy-rp/src/adc.rs b/embassy-rp/src/adc.rs index 86a353670..f29c4dfe1 100644 --- a/embassy-rp/src/adc.rs +++ b/embassy-rp/src/adc.rs | |||
| @@ -3,14 +3,14 @@ use core::marker::PhantomData; | |||
| 3 | use core::sync::atomic::{compiler_fence, Ordering}; | 3 | use core::sync::atomic::{compiler_fence, Ordering}; |
| 4 | use core::task::Poll; | 4 | use core::task::Poll; |
| 5 | 5 | ||
| 6 | use embassy_cortex_m::interrupt::{Binding, Interrupt}; | ||
| 7 | use embassy_sync::waitqueue::AtomicWaker; | 6 | use embassy_sync::waitqueue::AtomicWaker; |
| 8 | use embedded_hal_02::adc::{Channel, OneShot}; | 7 | use embedded_hal_02::adc::{Channel, OneShot}; |
| 9 | 8 | ||
| 10 | use crate::gpio::Pin; | 9 | use crate::gpio::Pin; |
| 11 | use crate::interrupt::{self, ADC_IRQ_FIFO}; | 10 | use crate::interrupt::typelevel::Binding; |
| 11 | use crate::interrupt::InterruptExt; | ||
| 12 | use crate::peripherals::ADC; | 12 | use crate::peripherals::ADC; |
| 13 | use crate::{pac, peripherals, Peripheral}; | 13 | use crate::{interrupt, pac, peripherals, Peripheral}; |
| 14 | static WAKER: AtomicWaker = AtomicWaker::new(); | 14 | static WAKER: AtomicWaker = AtomicWaker::new(); |
| 15 | 15 | ||
| 16 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] | 16 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] |
| @@ -47,7 +47,7 @@ impl<'d> Adc<'d> { | |||
| 47 | 47 | ||
| 48 | pub fn new( | 48 | pub fn new( |
| 49 | _inner: impl Peripheral<P = ADC> + 'd, | 49 | _inner: impl Peripheral<P = ADC> + 'd, |
| 50 | _irq: impl Binding<ADC_IRQ_FIFO, InterruptHandler>, | 50 | _irq: impl Binding<interrupt::typelevel::ADC_IRQ_FIFO, InterruptHandler>, |
| 51 | _config: Config, | 51 | _config: Config, |
| 52 | ) -> Self { | 52 | ) -> Self { |
| 53 | unsafe { | 53 | unsafe { |
| @@ -62,10 +62,8 @@ impl<'d> Adc<'d> { | |||
| 62 | } | 62 | } |
| 63 | 63 | ||
| 64 | // Setup IRQ | 64 | // Setup IRQ |
| 65 | unsafe { | 65 | interrupt::ADC_IRQ_FIFO.unpend(); |
| 66 | ADC_IRQ_FIFO::unpend(); | 66 | unsafe { interrupt::ADC_IRQ_FIFO.enable() }; |
| 67 | ADC_IRQ_FIFO::enable(); | ||
| 68 | }; | ||
| 69 | 67 | ||
| 70 | Self { phantom: PhantomData } | 68 | Self { phantom: PhantomData } |
| 71 | } | 69 | } |
| @@ -164,7 +162,7 @@ pub struct InterruptHandler { | |||
| 164 | _empty: (), | 162 | _empty: (), |
| 165 | } | 163 | } |
| 166 | 164 | ||
| 167 | impl interrupt::Handler<ADC_IRQ_FIFO> for InterruptHandler { | 165 | impl interrupt::typelevel::Handler<interrupt::typelevel::ADC_IRQ_FIFO> for InterruptHandler { |
| 168 | unsafe fn on_interrupt() { | 166 | unsafe fn on_interrupt() { |
| 169 | let r = Adc::regs(); | 167 | let r = Adc::regs(); |
| 170 | r.inte().write(|w| w.set_fifo(false)); | 168 | r.inte().write(|w| w.set_fifo(false)); |
diff --git a/embassy-rp/src/dma.rs b/embassy-rp/src/dma.rs index 1cbb4651a..042ca99a9 100644 --- a/embassy-rp/src/dma.rs +++ b/embassy-rp/src/dma.rs | |||
| @@ -4,11 +4,11 @@ use core::pin::Pin; | |||
| 4 | use core::sync::atomic::{compiler_fence, Ordering}; | 4 | use core::sync::atomic::{compiler_fence, Ordering}; |
| 5 | use core::task::{Context, Poll}; | 5 | use core::task::{Context, Poll}; |
| 6 | 6 | ||
| 7 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 8 | use embassy_hal_common::{impl_peripheral, into_ref, Peripheral, PeripheralRef}; | 7 | use embassy_hal_common::{impl_peripheral, into_ref, Peripheral, PeripheralRef}; |
| 9 | use embassy_sync::waitqueue::AtomicWaker; | 8 | use embassy_sync::waitqueue::AtomicWaker; |
| 10 | use pac::dma::vals::DataSize; | 9 | use pac::dma::vals::DataSize; |
| 11 | 10 | ||
| 11 | use crate::interrupt::InterruptExt; | ||
| 12 | use crate::pac::dma::vals; | 12 | use crate::pac::dma::vals; |
| 13 | use crate::{interrupt, pac, peripherals}; | 13 | use crate::{interrupt, pac, peripherals}; |
| 14 | 14 | ||
| @@ -29,12 +29,12 @@ unsafe fn DMA_IRQ_0() { | |||
| 29 | } | 29 | } |
| 30 | 30 | ||
| 31 | pub(crate) unsafe fn init() { | 31 | pub(crate) unsafe fn init() { |
| 32 | interrupt::DMA_IRQ_0::disable(); | 32 | interrupt::DMA_IRQ_0.disable(); |
| 33 | interrupt::DMA_IRQ_0::set_priority(interrupt::Priority::P3); | 33 | interrupt::DMA_IRQ_0.set_priority(interrupt::Priority::P3); |
| 34 | 34 | ||
| 35 | pac::DMA.inte0().write(|w| w.set_inte0(0xFFFF)); | 35 | pac::DMA.inte0().write(|w| w.set_inte0(0xFFFF)); |
| 36 | 36 | ||
| 37 | interrupt::DMA_IRQ_0::enable(); | 37 | interrupt::DMA_IRQ_0.enable(); |
| 38 | } | 38 | } |
| 39 | 39 | ||
| 40 | pub unsafe fn read<'a, C: Channel, W: Word>( | 40 | pub unsafe fn read<'a, C: Channel, W: Word>( |
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs index 91cef8609..ebd932f50 100644 --- a/embassy-rp/src/gpio.rs +++ b/embassy-rp/src/gpio.rs | |||
| @@ -3,10 +3,10 @@ use core::future::Future; | |||
| 3 | use core::pin::Pin as FuturePin; | 3 | use core::pin::Pin as FuturePin; |
| 4 | use core::task::{Context, Poll}; | 4 | use core::task::{Context, Poll}; |
| 5 | 5 | ||
| 6 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 7 | use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef}; | 6 | use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef}; |
| 8 | use embassy_sync::waitqueue::AtomicWaker; | 7 | use embassy_sync::waitqueue::AtomicWaker; |
| 9 | 8 | ||
| 9 | use crate::interrupt::InterruptExt; | ||
| 10 | use crate::pac::common::{Reg, RW}; | 10 | use crate::pac::common::{Reg, RW}; |
| 11 | use crate::pac::SIO; | 11 | use crate::pac::SIO; |
| 12 | use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; | 12 | use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; |
| @@ -137,9 +137,9 @@ pub enum InterruptTrigger { | |||
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | pub(crate) unsafe fn init() { | 139 | pub(crate) unsafe fn init() { |
| 140 | interrupt::IO_IRQ_BANK0::disable(); | 140 | interrupt::IO_IRQ_BANK0.disable(); |
| 141 | interrupt::IO_IRQ_BANK0::set_priority(interrupt::Priority::P3); | 141 | interrupt::IO_IRQ_BANK0.set_priority(interrupt::Priority::P3); |
| 142 | interrupt::IO_IRQ_BANK0::enable(); | 142 | interrupt::IO_IRQ_BANK0.enable(); |
| 143 | } | 143 | } |
| 144 | 144 | ||
| 145 | #[interrupt] | 145 | #[interrupt] |
diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index 124f1c00a..ce9a082a2 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs | |||
| @@ -2,14 +2,14 @@ use core::future; | |||
| 2 | use core::marker::PhantomData; | 2 | use core::marker::PhantomData; |
| 3 | use core::task::Poll; | 3 | use core::task::Poll; |
| 4 | 4 | ||
| 5 | use embassy_cortex_m::interrupt::{self, Binding, Interrupt}; | ||
| 6 | use embassy_hal_common::{into_ref, PeripheralRef}; | 5 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 7 | use embassy_sync::waitqueue::AtomicWaker; | 6 | use embassy_sync::waitqueue::AtomicWaker; |
| 8 | use pac::i2c; | 7 | use pac::i2c; |
| 9 | 8 | ||
| 10 | use crate::gpio::sealed::Pin; | 9 | use crate::gpio::sealed::Pin; |
| 11 | use crate::gpio::AnyPin; | 10 | use crate::gpio::AnyPin; |
| 12 | use crate::{pac, peripherals, Peripheral}; | 11 | use crate::interrupt::typelevel::{Binding, Interrupt}; |
| 12 | use crate::{interrupt, pac, peripherals, Peripheral}; | ||
| 13 | 13 | ||
| 14 | /// I2C error abort reason | 14 | /// I2C error abort reason |
| 15 | #[derive(Debug)] | 15 | #[derive(Debug)] |
| @@ -312,7 +312,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 312 | _uart: PhantomData<T>, | 312 | _uart: PhantomData<T>, |
| 313 | } | 313 | } |
| 314 | 314 | ||
| 315 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 315 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 316 | // Mask interrupts and wake any task waiting for this interrupt | 316 | // Mask interrupts and wake any task waiting for this interrupt |
| 317 | unsafe fn on_interrupt() { | 317 | unsafe fn on_interrupt() { |
| 318 | let i2c = T::regs(); | 318 | let i2c = T::regs(); |
| @@ -760,14 +760,15 @@ fn i2c_reserved_addr(addr: u16) -> bool { | |||
| 760 | } | 760 | } |
| 761 | 761 | ||
| 762 | mod sealed { | 762 | mod sealed { |
| 763 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 764 | use embassy_sync::waitqueue::AtomicWaker; | 763 | use embassy_sync::waitqueue::AtomicWaker; |
| 765 | 764 | ||
| 765 | use crate::interrupt; | ||
| 766 | |||
| 766 | pub trait Instance { | 767 | pub trait Instance { |
| 767 | const TX_DREQ: u8; | 768 | const TX_DREQ: u8; |
| 768 | const RX_DREQ: u8; | 769 | const RX_DREQ: u8; |
| 769 | 770 | ||
| 770 | type Interrupt: Interrupt; | 771 | type Interrupt: interrupt::typelevel::Interrupt; |
| 771 | 772 | ||
| 772 | fn regs() -> crate::pac::i2c::I2c; | 773 | fn regs() -> crate::pac::i2c::I2c; |
| 773 | fn reset() -> crate::pac::resets::regs::Peripherals; | 774 | fn reset() -> crate::pac::resets::regs::Peripherals; |
| @@ -803,7 +804,7 @@ macro_rules! impl_instance { | |||
| 803 | const TX_DREQ: u8 = $tx_dreq; | 804 | const TX_DREQ: u8 = $tx_dreq; |
| 804 | const RX_DREQ: u8 = $rx_dreq; | 805 | const RX_DREQ: u8 = $rx_dreq; |
| 805 | 806 | ||
| 806 | type Interrupt = crate::interrupt::$irq; | 807 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 807 | 808 | ||
| 808 | #[inline] | 809 | #[inline] |
| 809 | fn regs() -> pac::i2c::I2c { | 810 | fn regs() -> pac::i2c::I2c { |
diff --git a/embassy-rp/src/interrupt.rs b/embassy-rp/src/interrupt.rs deleted file mode 100644 index c9298644d..000000000 --- a/embassy-rp/src/interrupt.rs +++ /dev/null | |||
| @@ -1,65 +0,0 @@ | |||
| 1 | //! Interrupt definitions and macros to bind them. | ||
| 2 | pub use cortex_m::interrupt::{CriticalSection, Mutex}; | ||
| 3 | use embassy_cortex_m::interrupt::_export::declare; | ||
| 4 | pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority}; | ||
| 5 | |||
| 6 | use crate::pac::Interrupt as InterruptEnum; | ||
| 7 | declare!(TIMER_IRQ_0); | ||
| 8 | declare!(TIMER_IRQ_1); | ||
| 9 | declare!(TIMER_IRQ_2); | ||
| 10 | declare!(TIMER_IRQ_3); | ||
| 11 | declare!(PWM_IRQ_WRAP); | ||
| 12 | declare!(USBCTRL_IRQ); | ||
| 13 | declare!(XIP_IRQ); | ||
| 14 | declare!(PIO0_IRQ_0); | ||
| 15 | declare!(PIO0_IRQ_1); | ||
| 16 | declare!(PIO1_IRQ_0); | ||
| 17 | declare!(PIO1_IRQ_1); | ||
| 18 | declare!(DMA_IRQ_0); | ||
| 19 | declare!(DMA_IRQ_1); | ||
| 20 | declare!(IO_IRQ_BANK0); | ||
| 21 | declare!(IO_IRQ_QSPI); | ||
| 22 | declare!(SIO_IRQ_PROC0); | ||
| 23 | declare!(SIO_IRQ_PROC1); | ||
| 24 | declare!(CLOCKS_IRQ); | ||
| 25 | declare!(SPI0_IRQ); | ||
| 26 | declare!(SPI1_IRQ); | ||
| 27 | declare!(UART0_IRQ); | ||
| 28 | declare!(UART1_IRQ); | ||
| 29 | declare!(ADC_IRQ_FIFO); | ||
| 30 | declare!(I2C0_IRQ); | ||
| 31 | declare!(I2C1_IRQ); | ||
| 32 | declare!(RTC_IRQ); | ||
| 33 | declare!(SWI_IRQ_0); | ||
| 34 | declare!(SWI_IRQ_1); | ||
| 35 | declare!(SWI_IRQ_2); | ||
| 36 | declare!(SWI_IRQ_3); | ||
| 37 | declare!(SWI_IRQ_4); | ||
| 38 | declare!(SWI_IRQ_5); | ||
| 39 | |||
| 40 | /// Macro to bind interrupts to handlers. | ||
| 41 | /// | ||
| 42 | /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) | ||
| 43 | /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to | ||
| 44 | /// prove at compile-time that the right interrupts have been bound. | ||
| 45 | // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. | ||
| 46 | #[macro_export] | ||
| 47 | macro_rules! bind_interrupts { | ||
| 48 | ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { | ||
| 49 | $vis struct $name; | ||
| 50 | |||
| 51 | $( | ||
| 52 | #[allow(non_snake_case)] | ||
| 53 | #[no_mangle] | ||
| 54 | unsafe extern "C" fn $irq() { | ||
| 55 | $( | ||
| 56 | <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt(); | ||
| 57 | )* | ||
| 58 | } | ||
| 59 | |||
| 60 | $( | ||
| 61 | unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {} | ||
| 62 | )* | ||
| 63 | )* | ||
| 64 | }; | ||
| 65 | } | ||
diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs index 4e4542d70..70a410ef9 100644 --- a/embassy-rp/src/lib.rs +++ b/embassy-rp/src/lib.rs | |||
| @@ -16,7 +16,6 @@ pub mod flash; | |||
| 16 | mod float; | 16 | mod float; |
| 17 | pub mod gpio; | 17 | pub mod gpio; |
| 18 | pub mod i2c; | 18 | pub mod i2c; |
| 19 | pub mod interrupt; | ||
| 20 | pub mod multicore; | 19 | pub mod multicore; |
| 21 | pub mod pwm; | 20 | pub mod pwm; |
| 22 | mod reset; | 21 | mod reset; |
| @@ -38,13 +37,74 @@ pub mod relocate; | |||
| 38 | 37 | ||
| 39 | // Reexports | 38 | // Reexports |
| 40 | pub use embassy_cortex_m::executor; | 39 | pub use embassy_cortex_m::executor; |
| 41 | pub use embassy_cortex_m::interrupt::_export::interrupt; | ||
| 42 | pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; | 40 | pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; |
| 43 | #[cfg(feature = "unstable-pac")] | 41 | #[cfg(feature = "unstable-pac")] |
| 44 | pub use rp_pac as pac; | 42 | pub use rp_pac as pac; |
| 45 | #[cfg(not(feature = "unstable-pac"))] | 43 | #[cfg(not(feature = "unstable-pac"))] |
| 46 | pub(crate) use rp_pac as pac; | 44 | pub(crate) use rp_pac as pac; |
| 47 | 45 | ||
| 46 | embassy_cortex_m::interrupt_mod!( | ||
| 47 | TIMER_IRQ_0, | ||
| 48 | TIMER_IRQ_1, | ||
| 49 | TIMER_IRQ_2, | ||
| 50 | TIMER_IRQ_3, | ||
| 51 | PWM_IRQ_WRAP, | ||
| 52 | USBCTRL_IRQ, | ||
| 53 | XIP_IRQ, | ||
| 54 | PIO0_IRQ_0, | ||
| 55 | PIO0_IRQ_1, | ||
| 56 | PIO1_IRQ_0, | ||
| 57 | PIO1_IRQ_1, | ||
| 58 | DMA_IRQ_0, | ||
| 59 | DMA_IRQ_1, | ||
| 60 | IO_IRQ_BANK0, | ||
| 61 | IO_IRQ_QSPI, | ||
| 62 | SIO_IRQ_PROC0, | ||
| 63 | SIO_IRQ_PROC1, | ||
| 64 | CLOCKS_IRQ, | ||
| 65 | SPI0_IRQ, | ||
| 66 | SPI1_IRQ, | ||
| 67 | UART0_IRQ, | ||
| 68 | UART1_IRQ, | ||
| 69 | ADC_IRQ_FIFO, | ||
| 70 | I2C0_IRQ, | ||
| 71 | I2C1_IRQ, | ||
| 72 | RTC_IRQ, | ||
| 73 | SWI_IRQ_0, | ||
| 74 | SWI_IRQ_1, | ||
| 75 | SWI_IRQ_2, | ||
| 76 | SWI_IRQ_3, | ||
| 77 | SWI_IRQ_4, | ||
| 78 | SWI_IRQ_5, | ||
| 79 | ); | ||
| 80 | |||
| 81 | /// Macro to bind interrupts to handlers. | ||
| 82 | /// | ||
| 83 | /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) | ||
| 84 | /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to | ||
| 85 | /// prove at compile-time that the right interrupts have been bound. | ||
| 86 | // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. | ||
| 87 | #[macro_export] | ||
| 88 | macro_rules! bind_interrupts { | ||
| 89 | ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { | ||
| 90 | $vis struct $name; | ||
| 91 | |||
| 92 | $( | ||
| 93 | #[allow(non_snake_case)] | ||
| 94 | #[no_mangle] | ||
| 95 | unsafe extern "C" fn $irq() { | ||
| 96 | $( | ||
| 97 | <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt(); | ||
| 98 | )* | ||
| 99 | } | ||
| 100 | |||
| 101 | $( | ||
| 102 | unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {} | ||
| 103 | )* | ||
| 104 | )* | ||
| 105 | }; | ||
| 106 | } | ||
| 107 | |||
| 48 | embassy_hal_common::peripherals! { | 108 | embassy_hal_common::peripherals! { |
| 49 | PIN_0, | 109 | PIN_0, |
| 50 | PIN_1, | 110 | PIN_1, |
diff --git a/embassy-rp/src/multicore.rs b/embassy-rp/src/multicore.rs index 807fda57b..e1246ce8f 100644 --- a/embassy-rp/src/multicore.rs +++ b/embassy-rp/src/multicore.rs | |||
| @@ -50,7 +50,7 @@ | |||
| 50 | use core::mem::ManuallyDrop; | 50 | use core::mem::ManuallyDrop; |
| 51 | use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; | 51 | use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; |
| 52 | 52 | ||
| 53 | use crate::interrupt::Interrupt; | 53 | use crate::interrupt::InterruptExt; |
| 54 | use crate::peripherals::CORE1; | 54 | use crate::peripherals::CORE1; |
| 55 | use crate::{gpio, interrupt, pac}; | 55 | use crate::{gpio, interrupt, pac}; |
| 56 | 56 | ||
| @@ -156,7 +156,7 @@ where | |||
| 156 | 156 | ||
| 157 | IS_CORE1_INIT.store(true, Ordering::Release); | 157 | IS_CORE1_INIT.store(true, Ordering::Release); |
| 158 | // Enable fifo interrupt on CORE1 for `pause` functionality. | 158 | // Enable fifo interrupt on CORE1 for `pause` functionality. |
| 159 | unsafe { interrupt::SIO_IRQ_PROC1::enable() }; | 159 | unsafe { interrupt::SIO_IRQ_PROC1.enable() }; |
| 160 | 160 | ||
| 161 | entry() | 161 | entry() |
| 162 | } | 162 | } |
diff --git a/embassy-rp/src/pio.rs b/embassy-rp/src/pio.rs index 93e5bd34b..f0a5c17a9 100644 --- a/embassy-rp/src/pio.rs +++ b/embassy-rp/src/pio.rs | |||
| @@ -5,7 +5,6 @@ use core::sync::atomic::{compiler_fence, Ordering}; | |||
| 5 | use core::task::{Context, Poll}; | 5 | use core::task::{Context, Poll}; |
| 6 | 6 | ||
| 7 | use atomic_polyfill::{AtomicU32, AtomicU8}; | 7 | use atomic_polyfill::{AtomicU32, AtomicU8}; |
| 8 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 9 | use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; | 8 | use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; |
| 10 | use embassy_sync::waitqueue::AtomicWaker; | 9 | use embassy_sync::waitqueue::AtomicWaker; |
| 11 | use fixed::types::extra::U8; | 10 | use fixed::types::extra::U8; |
| @@ -17,6 +16,7 @@ use pio::{SideSet, Wrap}; | |||
| 17 | use crate::dma::{Channel, Transfer, Word}; | 16 | use crate::dma::{Channel, Transfer, Word}; |
| 18 | use crate::gpio::sealed::Pin as SealedPin; | 17 | use crate::gpio::sealed::Pin as SealedPin; |
| 19 | use crate::gpio::{self, AnyPin, Drive, Level, Pull, SlewRate}; | 18 | use crate::gpio::{self, AnyPin, Drive, Level, Pull, SlewRate}; |
| 19 | use crate::interrupt::InterruptExt; | ||
| 20 | use crate::pac::dma::vals::TreqSel; | 20 | use crate::pac::dma::vals::TreqSel; |
| 21 | use crate::relocate::RelocatedProgram; | 21 | use crate::relocate::RelocatedProgram; |
| 22 | use crate::{interrupt, pac, peripherals, pio_instr_util, RegExt}; | 22 | use crate::{interrupt, pac, peripherals, pio_instr_util, RegExt}; |
| @@ -110,15 +110,15 @@ unsafe fn PIO1_IRQ_0() { | |||
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | pub(crate) unsafe fn init() { | 112 | pub(crate) unsafe fn init() { |
| 113 | interrupt::PIO0_IRQ_0::disable(); | 113 | interrupt::PIO0_IRQ_0.disable(); |
| 114 | interrupt::PIO0_IRQ_0::set_priority(interrupt::Priority::P3); | 114 | interrupt::PIO0_IRQ_0.set_priority(interrupt::Priority::P3); |
| 115 | pac::PIO0.irqs(0).inte().write(|m| m.0 = 0); | 115 | pac::PIO0.irqs(0).inte().write(|m| m.0 = 0); |
| 116 | interrupt::PIO0_IRQ_0::enable(); | 116 | interrupt::PIO0_IRQ_0.enable(); |
| 117 | 117 | ||
| 118 | interrupt::PIO1_IRQ_0::disable(); | 118 | interrupt::PIO1_IRQ_0.disable(); |
| 119 | interrupt::PIO1_IRQ_0::set_priority(interrupt::Priority::P3); | 119 | interrupt::PIO1_IRQ_0.set_priority(interrupt::Priority::P3); |
| 120 | pac::PIO1.irqs(0).inte().write(|m| m.0 = 0); | 120 | pac::PIO1.irqs(0).inte().write(|m| m.0 = 0); |
| 121 | interrupt::PIO1_IRQ_0::enable(); | 121 | interrupt::PIO1_IRQ_0.enable(); |
| 122 | } | 122 | } |
| 123 | 123 | ||
| 124 | /// Future that waits for TX-FIFO to become writable | 124 | /// Future that waits for TX-FIFO to become writable |
diff --git a/embassy-rp/src/timer.rs b/embassy-rp/src/timer.rs index 68793950f..37f86c930 100644 --- a/embassy-rp/src/timer.rs +++ b/embassy-rp/src/timer.rs | |||
| @@ -6,7 +6,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; | |||
| 6 | use embassy_sync::blocking_mutex::Mutex; | 6 | use embassy_sync::blocking_mutex::Mutex; |
| 7 | use embassy_time::driver::{AlarmHandle, Driver}; | 7 | use embassy_time::driver::{AlarmHandle, Driver}; |
| 8 | 8 | ||
| 9 | use crate::interrupt::Interrupt; | 9 | use crate::interrupt::InterruptExt; |
| 10 | use crate::{interrupt, pac}; | 10 | use crate::{interrupt, pac}; |
| 11 | 11 | ||
| 12 | struct AlarmState { | 12 | struct AlarmState { |
| @@ -145,10 +145,10 @@ pub unsafe fn init() { | |||
| 145 | w.set_alarm(2, true); | 145 | w.set_alarm(2, true); |
| 146 | w.set_alarm(3, true); | 146 | w.set_alarm(3, true); |
| 147 | }); | 147 | }); |
| 148 | interrupt::TIMER_IRQ_0::enable(); | 148 | interrupt::TIMER_IRQ_0.enable(); |
| 149 | interrupt::TIMER_IRQ_1::enable(); | 149 | interrupt::TIMER_IRQ_1.enable(); |
| 150 | interrupt::TIMER_IRQ_2::enable(); | 150 | interrupt::TIMER_IRQ_2.enable(); |
| 151 | interrupt::TIMER_IRQ_3::enable(); | 151 | interrupt::TIMER_IRQ_3.enable(); |
| 152 | } | 152 | } |
| 153 | 153 | ||
| 154 | #[interrupt] | 154 | #[interrupt] |
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs index bb808c467..6660d5dc9 100644 --- a/embassy-rp/src/uart/buffered.rs +++ b/embassy-rp/src/uart/buffered.rs | |||
| @@ -3,14 +3,14 @@ use core::slice; | |||
| 3 | use core::task::Poll; | 3 | use core::task::Poll; |
| 4 | 4 | ||
| 5 | use atomic_polyfill::{AtomicU8, Ordering}; | 5 | use atomic_polyfill::{AtomicU8, Ordering}; |
| 6 | use embassy_cortex_m::interrupt::{self, Binding, Interrupt}; | ||
| 7 | use embassy_hal_common::atomic_ring_buffer::RingBuffer; | 6 | use embassy_hal_common::atomic_ring_buffer::RingBuffer; |
| 8 | use embassy_sync::waitqueue::AtomicWaker; | 7 | use embassy_sync::waitqueue::AtomicWaker; |
| 9 | use embassy_time::{Duration, Timer}; | 8 | use embassy_time::{Duration, Timer}; |
| 10 | 9 | ||
| 11 | use super::*; | 10 | use super::*; |
| 12 | use crate::clocks::clk_peri_freq; | 11 | use crate::clocks::clk_peri_freq; |
| 13 | use crate::RegExt; | 12 | use crate::interrupt::typelevel::{Binding, Interrupt}; |
| 13 | use crate::{interrupt, RegExt}; | ||
| 14 | 14 | ||
| 15 | pub struct State { | 15 | pub struct State { |
| 16 | tx_waker: AtomicWaker, | 16 | tx_waker: AtomicWaker, |
| @@ -485,7 +485,7 @@ pub struct BufferedInterruptHandler<T: Instance> { | |||
| 485 | _uart: PhantomData<T>, | 485 | _uart: PhantomData<T>, |
| 486 | } | 486 | } |
| 487 | 487 | ||
| 488 | impl<T: Instance> interrupt::Handler<T::Interrupt> for BufferedInterruptHandler<T> { | 488 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for BufferedInterruptHandler<T> { |
| 489 | unsafe fn on_interrupt() { | 489 | unsafe fn on_interrupt() { |
| 490 | let r = T::regs(); | 490 | let r = T::regs(); |
| 491 | if r.uartdmacr().read().rxdmae() { | 491 | if r.uartdmacr().read().rxdmae() { |
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index a83d94e49..5e3ae8a25 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs | |||
| @@ -3,7 +3,6 @@ use core::marker::PhantomData; | |||
| 3 | use core::task::Poll; | 3 | use core::task::Poll; |
| 4 | 4 | ||
| 5 | use atomic_polyfill::{AtomicU16, Ordering}; | 5 | use atomic_polyfill::{AtomicU16, Ordering}; |
| 6 | use embassy_cortex_m::interrupt::{self, Binding, Interrupt}; | ||
| 7 | use embassy_futures::select::{select, Either}; | 6 | use embassy_futures::select::{select, Either}; |
| 8 | use embassy_hal_common::{into_ref, PeripheralRef}; | 7 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 9 | use embassy_sync::waitqueue::AtomicWaker; | 8 | use embassy_sync::waitqueue::AtomicWaker; |
| @@ -14,8 +13,9 @@ use crate::clocks::clk_peri_freq; | |||
| 14 | use crate::dma::{AnyChannel, Channel}; | 13 | use crate::dma::{AnyChannel, Channel}; |
| 15 | use crate::gpio::sealed::Pin; | 14 | use crate::gpio::sealed::Pin; |
| 16 | use crate::gpio::AnyPin; | 15 | use crate::gpio::AnyPin; |
| 16 | use crate::interrupt::typelevel::{Binding, Interrupt}; | ||
| 17 | use crate::pac::io::vals::{Inover, Outover}; | 17 | use crate::pac::io::vals::{Inover, Outover}; |
| 18 | use crate::{pac, peripherals, Peripheral, RegExt}; | 18 | use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; |
| 19 | 19 | ||
| 20 | #[cfg(feature = "nightly")] | 20 | #[cfg(feature = "nightly")] |
| 21 | mod buffered; | 21 | mod buffered; |
| @@ -332,7 +332,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 332 | _uart: PhantomData<T>, | 332 | _uart: PhantomData<T>, |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 335 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 336 | unsafe fn on_interrupt() { | 336 | unsafe fn on_interrupt() { |
| 337 | let uart = T::regs(); | 337 | let uart = T::regs(); |
| 338 | if !uart.uartdmacr().read().rxdmae() { | 338 | if !uart.uartdmacr().read().rxdmae() { |
| @@ -930,7 +930,7 @@ mod sealed { | |||
| 930 | const TX_DREQ: u8; | 930 | const TX_DREQ: u8; |
| 931 | const RX_DREQ: u8; | 931 | const RX_DREQ: u8; |
| 932 | 932 | ||
| 933 | type Interrupt: crate::interrupt::Interrupt; | 933 | type Interrupt: interrupt::typelevel::Interrupt; |
| 934 | 934 | ||
| 935 | fn regs() -> pac::uart::Uart; | 935 | fn regs() -> pac::uart::Uart; |
| 936 | 936 | ||
| @@ -968,7 +968,7 @@ macro_rules! impl_instance { | |||
| 968 | const TX_DREQ: u8 = $tx_dreq; | 968 | const TX_DREQ: u8 = $tx_dreq; |
| 969 | const RX_DREQ: u8 = $rx_dreq; | 969 | const RX_DREQ: u8 = $rx_dreq; |
| 970 | 970 | ||
| 971 | type Interrupt = crate::interrupt::$irq; | 971 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 972 | 972 | ||
| 973 | fn regs() -> pac::uart::Uart { | 973 | fn regs() -> pac::uart::Uart { |
| 974 | pac::$inst | 974 | pac::$inst |
diff --git a/embassy-rp/src/usb.rs b/embassy-rp/src/usb.rs index cc88226df..9fb0dfb70 100644 --- a/embassy-rp/src/usb.rs +++ b/embassy-rp/src/usb.rs | |||
| @@ -4,15 +4,14 @@ use core::slice; | |||
| 4 | use core::sync::atomic::{compiler_fence, Ordering}; | 4 | use core::sync::atomic::{compiler_fence, Ordering}; |
| 5 | use core::task::Poll; | 5 | use core::task::Poll; |
| 6 | 6 | ||
| 7 | use embassy_cortex_m::interrupt::{self, Binding}; | ||
| 8 | use embassy_sync::waitqueue::AtomicWaker; | 7 | use embassy_sync::waitqueue::AtomicWaker; |
| 9 | use embassy_usb_driver as driver; | 8 | use embassy_usb_driver as driver; |
| 10 | use embassy_usb_driver::{ | 9 | use embassy_usb_driver::{ |
| 11 | Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointInfo, EndpointType, Event, Unsupported, | 10 | Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointInfo, EndpointType, Event, Unsupported, |
| 12 | }; | 11 | }; |
| 13 | 12 | ||
| 14 | use crate::interrupt::Interrupt; | 13 | use crate::interrupt::typelevel::{Binding, Interrupt}; |
| 15 | use crate::{pac, peripherals, Peripheral, RegExt}; | 14 | use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; |
| 16 | 15 | ||
| 17 | pub(crate) mod sealed { | 16 | pub(crate) mod sealed { |
| 18 | pub trait Instance { | 17 | pub trait Instance { |
| @@ -22,7 +21,7 @@ pub(crate) mod sealed { | |||
| 22 | } | 21 | } |
| 23 | 22 | ||
| 24 | pub trait Instance: sealed::Instance + 'static { | 23 | pub trait Instance: sealed::Instance + 'static { |
| 25 | type Interrupt: Interrupt; | 24 | type Interrupt: interrupt::typelevel::Interrupt; |
| 26 | } | 25 | } |
| 27 | 26 | ||
| 28 | impl crate::usb::sealed::Instance for peripherals::USB { | 27 | impl crate::usb::sealed::Instance for peripherals::USB { |
| @@ -35,7 +34,7 @@ impl crate::usb::sealed::Instance for peripherals::USB { | |||
| 35 | } | 34 | } |
| 36 | 35 | ||
| 37 | impl crate::usb::Instance for peripherals::USB { | 36 | impl crate::usb::Instance for peripherals::USB { |
| 38 | type Interrupt = crate::interrupt::USBCTRL_IRQ; | 37 | type Interrupt = crate::interrupt::typelevel::USBCTRL_IRQ; |
| 39 | } | 38 | } |
| 40 | 39 | ||
| 41 | const EP_COUNT: usize = 16; | 40 | const EP_COUNT: usize = 16; |
| @@ -249,7 +248,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 249 | _uart: PhantomData<T>, | 248 | _uart: PhantomData<T>, |
| 250 | } | 249 | } |
| 251 | 250 | ||
| 252 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 251 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 253 | unsafe fn on_interrupt() { | 252 | unsafe fn on_interrupt() { |
| 254 | let regs = T::regs(); | 253 | let regs = T::regs(); |
| 255 | //let x = regs.istr().read().0; | 254 | //let x = regs.istr().read().0; |
