diff options
| author | Dario Nieuwenhuis <[email protected]> | 2025-03-26 16:01:37 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2025-03-27 15:18:06 +0100 |
| commit | d41eeeae79388f219bf6a84e2f7bde9f6b532516 (patch) | |
| tree | 678b6fc732216e529dc38e6f65b72a309917ac32 /embassy-stm32/src/dma | |
| parent | 9edf5b7f049f95742b60b041e4443967d8a6b708 (diff) | |
Remove Peripheral trait, rename PeripheralRef->Peri.
Diffstat (limited to 'embassy-stm32/src/dma')
| -rw-r--r-- | embassy-stm32/src/dma/dma_bdma.rs | 44 | ||||
| -rw-r--r-- | embassy-stm32/src/dma/gpdma.rs | 28 | ||||
| -rw-r--r-- | embassy-stm32/src/dma/mod.rs | 20 | ||||
| -rw-r--r-- | embassy-stm32/src/dma/util.rs | 22 |
4 files changed, 49 insertions, 65 deletions
diff --git a/embassy-stm32/src/dma/dma_bdma.rs b/embassy-stm32/src/dma/dma_bdma.rs index d31f4d01a..7dbbe7b72 100644 --- a/embassy-stm32/src/dma/dma_bdma.rs +++ b/embassy-stm32/src/dma/dma_bdma.rs | |||
| @@ -3,7 +3,7 @@ use core::pin::Pin; | |||
| 3 | use core::sync::atomic::{fence, AtomicUsize, Ordering}; | 3 | use core::sync::atomic::{fence, AtomicUsize, Ordering}; |
| 4 | use core::task::{Context, Poll, Waker}; | 4 | use core::task::{Context, Poll, Waker}; |
| 5 | 5 | ||
| 6 | use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; | 6 | use embassy_hal_internal::Peri; |
| 7 | use embassy_sync::waitqueue::AtomicWaker; | 7 | use embassy_sync::waitqueue::AtomicWaker; |
| 8 | 8 | ||
| 9 | use super::ringbuffer::{DmaCtrl, Error, ReadableDmaRingBuffer, WritableDmaRingBuffer}; | 9 | use super::ringbuffer::{DmaCtrl, Error, ReadableDmaRingBuffer, WritableDmaRingBuffer}; |
| @@ -571,13 +571,13 @@ impl AnyChannel { | |||
| 571 | /// DMA transfer. | 571 | /// DMA transfer. |
| 572 | #[must_use = "futures do nothing unless you `.await` or poll them"] | 572 | #[must_use = "futures do nothing unless you `.await` or poll them"] |
| 573 | pub struct Transfer<'a> { | 573 | pub struct Transfer<'a> { |
| 574 | channel: PeripheralRef<'a, AnyChannel>, | 574 | channel: Peri<'a, AnyChannel>, |
| 575 | } | 575 | } |
| 576 | 576 | ||
| 577 | impl<'a> Transfer<'a> { | 577 | impl<'a> Transfer<'a> { |
| 578 | /// Create a new read DMA transfer (peripheral to memory). | 578 | /// Create a new read DMA transfer (peripheral to memory). |
| 579 | pub unsafe fn new_read<W: Word>( | 579 | pub unsafe fn new_read<W: Word>( |
| 580 | channel: impl Peripheral<P = impl Channel> + 'a, | 580 | channel: Peri<'a, impl Channel>, |
| 581 | request: Request, | 581 | request: Request, |
| 582 | peri_addr: *mut W, | 582 | peri_addr: *mut W, |
| 583 | buf: &'a mut [W], | 583 | buf: &'a mut [W], |
| @@ -588,16 +588,14 @@ impl<'a> Transfer<'a> { | |||
| 588 | 588 | ||
| 589 | /// Create a new read DMA transfer (peripheral to memory), using raw pointers. | 589 | /// Create a new read DMA transfer (peripheral to memory), using raw pointers. |
| 590 | pub unsafe fn new_read_raw<W: Word>( | 590 | pub unsafe fn new_read_raw<W: Word>( |
| 591 | channel: impl Peripheral<P = impl Channel> + 'a, | 591 | channel: Peri<'a, impl Channel>, |
| 592 | request: Request, | 592 | request: Request, |
| 593 | peri_addr: *mut W, | 593 | peri_addr: *mut W, |
| 594 | buf: *mut [W], | 594 | buf: *mut [W], |
| 595 | options: TransferOptions, | 595 | options: TransferOptions, |
| 596 | ) -> Self { | 596 | ) -> Self { |
| 597 | into_ref!(channel); | ||
| 598 | |||
| 599 | Self::new_inner( | 597 | Self::new_inner( |
| 600 | channel.map_into(), | 598 | channel.into(), |
| 601 | request, | 599 | request, |
| 602 | Dir::PeripheralToMemory, | 600 | Dir::PeripheralToMemory, |
| 603 | peri_addr as *const u32, | 601 | peri_addr as *const u32, |
| @@ -612,7 +610,7 @@ impl<'a> Transfer<'a> { | |||
| 612 | 610 | ||
| 613 | /// Create a new write DMA transfer (memory to peripheral). | 611 | /// Create a new write DMA transfer (memory to peripheral). |
| 614 | pub unsafe fn new_write<MW: Word, PW: Word>( | 612 | pub unsafe fn new_write<MW: Word, PW: Word>( |
| 615 | channel: impl Peripheral<P = impl Channel> + 'a, | 613 | channel: Peri<'a, impl Channel>, |
| 616 | request: Request, | 614 | request: Request, |
| 617 | buf: &'a [MW], | 615 | buf: &'a [MW], |
| 618 | peri_addr: *mut PW, | 616 | peri_addr: *mut PW, |
| @@ -623,16 +621,14 @@ impl<'a> Transfer<'a> { | |||
| 623 | 621 | ||
| 624 | /// Create a new write DMA transfer (memory to peripheral), using raw pointers. | 622 | /// Create a new write DMA transfer (memory to peripheral), using raw pointers. |
| 625 | pub unsafe fn new_write_raw<MW: Word, PW: Word>( | 623 | pub unsafe fn new_write_raw<MW: Word, PW: Word>( |
| 626 | channel: impl Peripheral<P = impl Channel> + 'a, | 624 | channel: Peri<'a, impl Channel>, |
| 627 | request: Request, | 625 | request: Request, |
| 628 | buf: *const [MW], | 626 | buf: *const [MW], |
| 629 | peri_addr: *mut PW, | 627 | peri_addr: *mut PW, |
| 630 | options: TransferOptions, | 628 | options: TransferOptions, |
| 631 | ) -> Self { | 629 | ) -> Self { |
| 632 | into_ref!(channel); | ||
| 633 | |||
| 634 | Self::new_inner( | 630 | Self::new_inner( |
| 635 | channel.map_into(), | 631 | channel.into(), |
| 636 | request, | 632 | request, |
| 637 | Dir::MemoryToPeripheral, | 633 | Dir::MemoryToPeripheral, |
| 638 | peri_addr as *const u32, | 634 | peri_addr as *const u32, |
| @@ -647,17 +643,15 @@ impl<'a> Transfer<'a> { | |||
| 647 | 643 | ||
| 648 | /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly. | 644 | /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly. |
| 649 | pub unsafe fn new_write_repeated<W: Word>( | 645 | pub unsafe fn new_write_repeated<W: Word>( |
| 650 | channel: impl Peripheral<P = impl Channel> + 'a, | 646 | channel: Peri<'a, impl Channel>, |
| 651 | request: Request, | 647 | request: Request, |
| 652 | repeated: &'a W, | 648 | repeated: &'a W, |
| 653 | count: usize, | 649 | count: usize, |
| 654 | peri_addr: *mut W, | 650 | peri_addr: *mut W, |
| 655 | options: TransferOptions, | 651 | options: TransferOptions, |
| 656 | ) -> Self { | 652 | ) -> Self { |
| 657 | into_ref!(channel); | ||
| 658 | |||
| 659 | Self::new_inner( | 653 | Self::new_inner( |
| 660 | channel.map_into(), | 654 | channel.into(), |
| 661 | request, | 655 | request, |
| 662 | Dir::MemoryToPeripheral, | 656 | Dir::MemoryToPeripheral, |
| 663 | peri_addr as *const u32, | 657 | peri_addr as *const u32, |
| @@ -671,7 +665,7 @@ impl<'a> Transfer<'a> { | |||
| 671 | } | 665 | } |
| 672 | 666 | ||
| 673 | unsafe fn new_inner( | 667 | unsafe fn new_inner( |
| 674 | channel: PeripheralRef<'a, AnyChannel>, | 668 | channel: Peri<'a, AnyChannel>, |
| 675 | _request: Request, | 669 | _request: Request, |
| 676 | dir: Dir, | 670 | dir: Dir, |
| 677 | peri_addr: *const u32, | 671 | peri_addr: *const u32, |
| @@ -769,7 +763,7 @@ impl<'a> Future for Transfer<'a> { | |||
| 769 | 763 | ||
| 770 | // ============================== | 764 | // ============================== |
| 771 | 765 | ||
| 772 | struct DmaCtrlImpl<'a>(PeripheralRef<'a, AnyChannel>); | 766 | struct DmaCtrlImpl<'a>(Peri<'a, AnyChannel>); |
| 773 | 767 | ||
| 774 | impl<'a> DmaCtrl for DmaCtrlImpl<'a> { | 768 | impl<'a> DmaCtrl for DmaCtrlImpl<'a> { |
| 775 | fn get_remaining_transfers(&self) -> usize { | 769 | fn get_remaining_transfers(&self) -> usize { |
| @@ -795,21 +789,20 @@ impl<'a> DmaCtrl for DmaCtrlImpl<'a> { | |||
| 795 | 789 | ||
| 796 | /// Ringbuffer for receiving data using DMA circular mode. | 790 | /// Ringbuffer for receiving data using DMA circular mode. |
| 797 | pub struct ReadableRingBuffer<'a, W: Word> { | 791 | pub struct ReadableRingBuffer<'a, W: Word> { |
| 798 | channel: PeripheralRef<'a, AnyChannel>, | 792 | channel: Peri<'a, AnyChannel>, |
| 799 | ringbuf: ReadableDmaRingBuffer<'a, W>, | 793 | ringbuf: ReadableDmaRingBuffer<'a, W>, |
| 800 | } | 794 | } |
| 801 | 795 | ||
| 802 | impl<'a, W: Word> ReadableRingBuffer<'a, W> { | 796 | impl<'a, W: Word> ReadableRingBuffer<'a, W> { |
| 803 | /// Create a new ring buffer. | 797 | /// Create a new ring buffer. |
| 804 | pub unsafe fn new( | 798 | pub unsafe fn new( |
| 805 | channel: impl Peripheral<P = impl Channel> + 'a, | 799 | channel: Peri<'a, impl Channel>, |
| 806 | _request: Request, | 800 | _request: Request, |
| 807 | peri_addr: *mut W, | 801 | peri_addr: *mut W, |
| 808 | buffer: &'a mut [W], | 802 | buffer: &'a mut [W], |
| 809 | mut options: TransferOptions, | 803 | mut options: TransferOptions, |
| 810 | ) -> Self { | 804 | ) -> Self { |
| 811 | into_ref!(channel); | 805 | let channel: Peri<'a, AnyChannel> = channel.into(); |
| 812 | let channel: PeripheralRef<'a, AnyChannel> = channel.map_into(); | ||
| 813 | 806 | ||
| 814 | let buffer_ptr = buffer.as_mut_ptr(); | 807 | let buffer_ptr = buffer.as_mut_ptr(); |
| 815 | let len = buffer.len(); | 808 | let len = buffer.len(); |
| @@ -948,21 +941,20 @@ impl<'a, W: Word> Drop for ReadableRingBuffer<'a, W> { | |||
| 948 | 941 | ||
| 949 | /// Ringbuffer for writing data using DMA circular mode. | 942 | /// Ringbuffer for writing data using DMA circular mode. |
| 950 | pub struct WritableRingBuffer<'a, W: Word> { | 943 | pub struct WritableRingBuffer<'a, W: Word> { |
| 951 | channel: PeripheralRef<'a, AnyChannel>, | 944 | channel: Peri<'a, AnyChannel>, |
| 952 | ringbuf: WritableDmaRingBuffer<'a, W>, | 945 | ringbuf: WritableDmaRingBuffer<'a, W>, |
| 953 | } | 946 | } |
| 954 | 947 | ||
| 955 | impl<'a, W: Word> WritableRingBuffer<'a, W> { | 948 | impl<'a, W: Word> WritableRingBuffer<'a, W> { |
| 956 | /// Create a new ring buffer. | 949 | /// Create a new ring buffer. |
| 957 | pub unsafe fn new( | 950 | pub unsafe fn new( |
| 958 | channel: impl Peripheral<P = impl Channel> + 'a, | 951 | channel: Peri<'a, impl Channel>, |
| 959 | _request: Request, | 952 | _request: Request, |
| 960 | peri_addr: *mut W, | 953 | peri_addr: *mut W, |
| 961 | buffer: &'a mut [W], | 954 | buffer: &'a mut [W], |
| 962 | mut options: TransferOptions, | 955 | mut options: TransferOptions, |
| 963 | ) -> Self { | 956 | ) -> Self { |
| 964 | into_ref!(channel); | 957 | let channel: Peri<'a, AnyChannel> = channel.into(); |
| 965 | let channel: PeripheralRef<'a, AnyChannel> = channel.map_into(); | ||
| 966 | 958 | ||
| 967 | let len = buffer.len(); | 959 | let len = buffer.len(); |
| 968 | let dir = Dir::MemoryToPeripheral; | 960 | let dir = Dir::MemoryToPeripheral; |
diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs index 799b8b355..ade70fb55 100644 --- a/embassy-stm32/src/dma/gpdma.rs +++ b/embassy-stm32/src/dma/gpdma.rs | |||
| @@ -5,7 +5,7 @@ use core::pin::Pin; | |||
| 5 | use core::sync::atomic::{fence, Ordering}; | 5 | use core::sync::atomic::{fence, Ordering}; |
| 6 | use core::task::{Context, Poll}; | 6 | use core::task::{Context, Poll}; |
| 7 | 7 | ||
| 8 | use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; | 8 | use embassy_hal_internal::Peri; |
| 9 | use embassy_sync::waitqueue::AtomicWaker; | 9 | use embassy_sync::waitqueue::AtomicWaker; |
| 10 | 10 | ||
| 11 | use super::word::{Word, WordSize}; | 11 | use super::word::{Word, WordSize}; |
| @@ -109,13 +109,13 @@ impl AnyChannel { | |||
| 109 | /// DMA transfer. | 109 | /// DMA transfer. |
| 110 | #[must_use = "futures do nothing unless you `.await` or poll them"] | 110 | #[must_use = "futures do nothing unless you `.await` or poll them"] |
| 111 | pub struct Transfer<'a> { | 111 | pub struct Transfer<'a> { |
| 112 | channel: PeripheralRef<'a, AnyChannel>, | 112 | channel: Peri<'a, AnyChannel>, |
| 113 | } | 113 | } |
| 114 | 114 | ||
| 115 | impl<'a> Transfer<'a> { | 115 | impl<'a> Transfer<'a> { |
| 116 | /// Create a new read DMA transfer (peripheral to memory). | 116 | /// Create a new read DMA transfer (peripheral to memory). |
| 117 | pub unsafe fn new_read<W: Word>( | 117 | pub unsafe fn new_read<W: Word>( |
| 118 | channel: impl Peripheral<P = impl Channel> + 'a, | 118 | channel: Peri<'a, impl Channel>, |
| 119 | request: Request, | 119 | request: Request, |
| 120 | peri_addr: *mut W, | 120 | peri_addr: *mut W, |
| 121 | buf: &'a mut [W], | 121 | buf: &'a mut [W], |
| @@ -126,16 +126,14 @@ impl<'a> Transfer<'a> { | |||
| 126 | 126 | ||
| 127 | /// Create a new read DMA transfer (peripheral to memory), using raw pointers. | 127 | /// Create a new read DMA transfer (peripheral to memory), using raw pointers. |
| 128 | pub unsafe fn new_read_raw<W: Word>( | 128 | pub unsafe fn new_read_raw<W: Word>( |
| 129 | channel: impl Peripheral<P = impl Channel> + 'a, | 129 | channel: Peri<'a, impl Channel>, |
| 130 | request: Request, | 130 | request: Request, |
| 131 | peri_addr: *mut W, | 131 | peri_addr: *mut W, |
| 132 | buf: *mut [W], | 132 | buf: *mut [W], |
| 133 | options: TransferOptions, | 133 | options: TransferOptions, |
| 134 | ) -> Self { | 134 | ) -> Self { |
| 135 | into_ref!(channel); | ||
| 136 | |||
| 137 | Self::new_inner( | 135 | Self::new_inner( |
| 138 | channel.map_into(), | 136 | channel.into(), |
| 139 | request, | 137 | request, |
| 140 | Dir::PeripheralToMemory, | 138 | Dir::PeripheralToMemory, |
| 141 | peri_addr as *const u32, | 139 | peri_addr as *const u32, |
| @@ -150,7 +148,7 @@ impl<'a> Transfer<'a> { | |||
| 150 | 148 | ||
| 151 | /// Create a new write DMA transfer (memory to peripheral). | 149 | /// Create a new write DMA transfer (memory to peripheral). |
| 152 | pub unsafe fn new_write<MW: Word, PW: Word>( | 150 | pub unsafe fn new_write<MW: Word, PW: Word>( |
| 153 | channel: impl Peripheral<P = impl Channel> + 'a, | 151 | channel: Peri<'a, impl Channel>, |
| 154 | request: Request, | 152 | request: Request, |
| 155 | buf: &'a [MW], | 153 | buf: &'a [MW], |
| 156 | peri_addr: *mut PW, | 154 | peri_addr: *mut PW, |
| @@ -161,16 +159,14 @@ impl<'a> Transfer<'a> { | |||
| 161 | 159 | ||
| 162 | /// Create a new write DMA transfer (memory to peripheral), using raw pointers. | 160 | /// Create a new write DMA transfer (memory to peripheral), using raw pointers. |
| 163 | pub unsafe fn new_write_raw<MW: Word, PW: Word>( | 161 | pub unsafe fn new_write_raw<MW: Word, PW: Word>( |
| 164 | channel: impl Peripheral<P = impl Channel> + 'a, | 162 | channel: Peri<'a, impl Channel>, |
| 165 | request: Request, | 163 | request: Request, |
| 166 | buf: *const [MW], | 164 | buf: *const [MW], |
| 167 | peri_addr: *mut PW, | 165 | peri_addr: *mut PW, |
| 168 | options: TransferOptions, | 166 | options: TransferOptions, |
| 169 | ) -> Self { | 167 | ) -> Self { |
| 170 | into_ref!(channel); | ||
| 171 | |||
| 172 | Self::new_inner( | 168 | Self::new_inner( |
| 173 | channel.map_into(), | 169 | channel.into(), |
| 174 | request, | 170 | request, |
| 175 | Dir::MemoryToPeripheral, | 171 | Dir::MemoryToPeripheral, |
| 176 | peri_addr as *const u32, | 172 | peri_addr as *const u32, |
| @@ -185,17 +181,15 @@ impl<'a> Transfer<'a> { | |||
| 185 | 181 | ||
| 186 | /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly. | 182 | /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly. |
| 187 | pub unsafe fn new_write_repeated<MW: Word, PW: Word>( | 183 | pub unsafe fn new_write_repeated<MW: Word, PW: Word>( |
| 188 | channel: impl Peripheral<P = impl Channel> + 'a, | 184 | channel: Peri<'a, impl Channel>, |
| 189 | request: Request, | 185 | request: Request, |
| 190 | repeated: &'a MW, | 186 | repeated: &'a MW, |
| 191 | count: usize, | 187 | count: usize, |
| 192 | peri_addr: *mut PW, | 188 | peri_addr: *mut PW, |
| 193 | options: TransferOptions, | 189 | options: TransferOptions, |
| 194 | ) -> Self { | 190 | ) -> Self { |
| 195 | into_ref!(channel); | ||
| 196 | |||
| 197 | Self::new_inner( | 191 | Self::new_inner( |
| 198 | channel.map_into(), | 192 | channel.into(), |
| 199 | request, | 193 | request, |
| 200 | Dir::MemoryToPeripheral, | 194 | Dir::MemoryToPeripheral, |
| 201 | peri_addr as *const u32, | 195 | peri_addr as *const u32, |
| @@ -209,7 +203,7 @@ impl<'a> Transfer<'a> { | |||
| 209 | } | 203 | } |
| 210 | 204 | ||
| 211 | unsafe fn new_inner( | 205 | unsafe fn new_inner( |
| 212 | channel: PeripheralRef<'a, AnyChannel>, | 206 | channel: Peri<'a, AnyChannel>, |
| 213 | request: Request, | 207 | request: Request, |
| 214 | dir: Dir, | 208 | dir: Dir, |
| 215 | peri_addr: *const u32, | 209 | peri_addr: *const u32, |
diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index ac4a0f98e..d3b070a6d 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs | |||
| @@ -22,7 +22,7 @@ pub(crate) use util::*; | |||
| 22 | pub(crate) mod ringbuffer; | 22 | pub(crate) mod ringbuffer; |
| 23 | pub mod word; | 23 | pub mod word; |
| 24 | 24 | ||
| 25 | use embassy_hal_internal::{impl_peripheral, Peripheral}; | 25 | use embassy_hal_internal::{impl_peripheral, PeripheralType}; |
| 26 | 26 | ||
| 27 | use crate::interrupt; | 27 | use crate::interrupt; |
| 28 | 28 | ||
| @@ -51,17 +51,7 @@ pub(crate) trait ChannelInterrupt { | |||
| 51 | 51 | ||
| 52 | /// DMA channel. | 52 | /// DMA channel. |
| 53 | #[allow(private_bounds)] | 53 | #[allow(private_bounds)] |
| 54 | pub trait Channel: SealedChannel + Peripheral<P = Self> + Into<AnyChannel> + 'static { | 54 | pub trait Channel: SealedChannel + PeripheralType + Into<AnyChannel> + 'static {} |
| 55 | /// Type-erase (degrade) this pin into an `AnyChannel`. | ||
| 56 | /// | ||
| 57 | /// This converts DMA channel singletons (`DMA1_CH3`, `DMA2_CH1`, ...), which | ||
| 58 | /// are all different types, into the same type. It is useful for | ||
| 59 | /// creating arrays of channels, or avoiding generics. | ||
| 60 | #[inline] | ||
| 61 | fn degrade(self) -> AnyChannel { | ||
| 62 | AnyChannel { id: self.id() } | ||
| 63 | } | ||
| 64 | } | ||
| 65 | 55 | ||
| 66 | macro_rules! dma_channel_impl { | 56 | macro_rules! dma_channel_impl { |
| 67 | ($channel_peri:ident, $index:expr) => { | 57 | ($channel_peri:ident, $index:expr) => { |
| @@ -79,8 +69,10 @@ macro_rules! dma_channel_impl { | |||
| 79 | impl crate::dma::Channel for crate::peripherals::$channel_peri {} | 69 | impl crate::dma::Channel for crate::peripherals::$channel_peri {} |
| 80 | 70 | ||
| 81 | impl From<crate::peripherals::$channel_peri> for crate::dma::AnyChannel { | 71 | impl From<crate::peripherals::$channel_peri> for crate::dma::AnyChannel { |
| 82 | fn from(x: crate::peripherals::$channel_peri) -> Self { | 72 | fn from(val: crate::peripherals::$channel_peri) -> Self { |
| 83 | crate::dma::Channel::degrade(x) | 73 | Self { |
| 74 | id: crate::dma::SealedChannel::id(&val), | ||
| 75 | } | ||
| 84 | } | 76 | } |
| 85 | } | 77 | } |
| 86 | }; | 78 | }; |
diff --git a/embassy-stm32/src/dma/util.rs b/embassy-stm32/src/dma/util.rs index 5e1158182..8bf89e2fe 100644 --- a/embassy-stm32/src/dma/util.rs +++ b/embassy-stm32/src/dma/util.rs | |||
| @@ -1,13 +1,12 @@ | |||
| 1 | use embassy_hal_internal::PeripheralRef; | ||
| 2 | |||
| 3 | use super::word::Word; | 1 | use super::word::Word; |
| 4 | use super::{AnyChannel, Request, Transfer, TransferOptions}; | 2 | use super::{AnyChannel, Request, Transfer, TransferOptions}; |
| 3 | use crate::Peri; | ||
| 5 | 4 | ||
| 6 | /// Convenience wrapper, contains a channel and a request number. | 5 | /// Convenience wrapper, contains a channel and a request number. |
| 7 | /// | 6 | /// |
| 8 | /// Commonly used in peripheral drivers that own DMA channels. | 7 | /// Commonly used in peripheral drivers that own DMA channels. |
| 9 | pub(crate) struct ChannelAndRequest<'d> { | 8 | pub(crate) struct ChannelAndRequest<'d> { |
| 10 | pub channel: PeripheralRef<'d, AnyChannel>, | 9 | pub channel: Peri<'d, AnyChannel>, |
| 11 | pub request: Request, | 10 | pub request: Request, |
| 12 | } | 11 | } |
| 13 | 12 | ||
| @@ -18,7 +17,7 @@ impl<'d> ChannelAndRequest<'d> { | |||
| 18 | buf: &'a mut [W], | 17 | buf: &'a mut [W], |
| 19 | options: TransferOptions, | 18 | options: TransferOptions, |
| 20 | ) -> Transfer<'a> { | 19 | ) -> Transfer<'a> { |
| 21 | Transfer::new_read(&mut self.channel, self.request, peri_addr, buf, options) | 20 | Transfer::new_read(self.channel.reborrow(), self.request, peri_addr, buf, options) |
| 22 | } | 21 | } |
| 23 | 22 | ||
| 24 | pub unsafe fn read_raw<'a, W: Word>( | 23 | pub unsafe fn read_raw<'a, W: Word>( |
| @@ -27,7 +26,7 @@ impl<'d> ChannelAndRequest<'d> { | |||
| 27 | buf: *mut [W], | 26 | buf: *mut [W], |
| 28 | options: TransferOptions, | 27 | options: TransferOptions, |
| 29 | ) -> Transfer<'a> { | 28 | ) -> Transfer<'a> { |
| 30 | Transfer::new_read_raw(&mut self.channel, self.request, peri_addr, buf, options) | 29 | Transfer::new_read_raw(self.channel.reborrow(), self.request, peri_addr, buf, options) |
| 31 | } | 30 | } |
| 32 | 31 | ||
| 33 | pub unsafe fn write<'a, W: Word>( | 32 | pub unsafe fn write<'a, W: Word>( |
| @@ -36,7 +35,7 @@ impl<'d> ChannelAndRequest<'d> { | |||
| 36 | peri_addr: *mut W, | 35 | peri_addr: *mut W, |
| 37 | options: TransferOptions, | 36 | options: TransferOptions, |
| 38 | ) -> Transfer<'a> { | 37 | ) -> Transfer<'a> { |
| 39 | Transfer::new_write(&mut self.channel, self.request, buf, peri_addr, options) | 38 | Transfer::new_write(self.channel.reborrow(), self.request, buf, peri_addr, options) |
| 40 | } | 39 | } |
| 41 | 40 | ||
| 42 | pub unsafe fn write_raw<'a, MW: Word, PW: Word>( | 41 | pub unsafe fn write_raw<'a, MW: Word, PW: Word>( |
| @@ -45,7 +44,7 @@ impl<'d> ChannelAndRequest<'d> { | |||
| 45 | peri_addr: *mut PW, | 44 | peri_addr: *mut PW, |
| 46 | options: TransferOptions, | 45 | options: TransferOptions, |
| 47 | ) -> Transfer<'a> { | 46 | ) -> Transfer<'a> { |
| 48 | Transfer::new_write_raw(&mut self.channel, self.request, buf, peri_addr, options) | 47 | Transfer::new_write_raw(self.channel.reborrow(), self.request, buf, peri_addr, options) |
| 49 | } | 48 | } |
| 50 | 49 | ||
| 51 | #[allow(dead_code)] | 50 | #[allow(dead_code)] |
| @@ -56,6 +55,13 @@ impl<'d> ChannelAndRequest<'d> { | |||
| 56 | peri_addr: *mut W, | 55 | peri_addr: *mut W, |
| 57 | options: TransferOptions, | 56 | options: TransferOptions, |
| 58 | ) -> Transfer<'a> { | 57 | ) -> Transfer<'a> { |
| 59 | Transfer::new_write_repeated(&mut self.channel, self.request, repeated, count, peri_addr, options) | 58 | Transfer::new_write_repeated( |
| 59 | self.channel.reborrow(), | ||
| 60 | self.request, | ||
| 61 | repeated, | ||
| 62 | count, | ||
| 63 | peri_addr, | ||
| 64 | options, | ||
| 65 | ) | ||
| 60 | } | 66 | } |
| 61 | } | 67 | } |
