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authorDario Nieuwenhuis <[email protected]>2025-03-26 16:01:37 +0100
committerDario Nieuwenhuis <[email protected]>2025-03-27 15:18:06 +0100
commitd41eeeae79388f219bf6a84e2f7bde9f6b532516 (patch)
tree678b6fc732216e529dc38e6f65b72a309917ac32 /embassy-stm32/src/gpio.rs
parent9edf5b7f049f95742b60b041e4443967d8a6b708 (diff)
Remove Peripheral trait, rename PeripheralRef->Peri.
Diffstat (limited to 'embassy-stm32/src/gpio.rs')
-rw-r--r--embassy-stm32/src/gpio.rs43
1 files changed, 16 insertions, 27 deletions
diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs
index 65e1bfb8c..bb37c4194 100644
--- a/embassy-stm32/src/gpio.rs
+++ b/embassy-stm32/src/gpio.rs
@@ -4,10 +4,10 @@
4use core::convert::Infallible; 4use core::convert::Infallible;
5 5
6use critical_section::CriticalSection; 6use critical_section::CriticalSection;
7use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef}; 7use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
8 8
9use crate::pac::gpio::{self, vals}; 9use crate::pac::gpio::{self, vals};
10use crate::{peripherals, Peripheral}; 10use crate::peripherals;
11 11
12/// GPIO flexible pin. 12/// GPIO flexible pin.
13/// 13///
@@ -15,7 +15,7 @@ use crate::{peripherals, Peripheral};
15/// set while not in output mode, so the pin's level will be 'remembered' when it is not in output 15/// set while not in output mode, so the pin's level will be 'remembered' when it is not in output
16/// mode. 16/// mode.
17pub struct Flex<'d> { 17pub struct Flex<'d> {
18 pub(crate) pin: PeripheralRef<'d, AnyPin>, 18 pub(crate) pin: Peri<'d, AnyPin>,
19} 19}
20 20
21impl<'d> Flex<'d> { 21impl<'d> Flex<'d> {
@@ -25,10 +25,9 @@ impl<'d> Flex<'d> {
25 /// before the pin is put into output mode. 25 /// before the pin is put into output mode.
26 /// 26 ///
27 #[inline] 27 #[inline]
28 pub fn new(pin: impl Peripheral<P = impl Pin> + 'd) -> Self { 28 pub fn new(pin: Peri<'d, impl Pin>) -> Self {
29 into_ref!(pin);
30 // Pin will be in disconnected state. 29 // Pin will be in disconnected state.
31 Self { pin: pin.map_into() } 30 Self { pin: pin.into() }
32 } 31 }
33 32
34 /// Put the pin into input mode. 33 /// Put the pin into input mode.
@@ -310,7 +309,7 @@ pub struct Input<'d> {
310impl<'d> Input<'d> { 309impl<'d> Input<'d> {
311 /// Create GPIO input driver for a [Pin] with the provided [Pull] configuration. 310 /// Create GPIO input driver for a [Pin] with the provided [Pull] configuration.
312 #[inline] 311 #[inline]
313 pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, pull: Pull) -> Self { 312 pub fn new(pin: Peri<'d, impl Pin>, pull: Pull) -> Self {
314 let mut pin = Flex::new(pin); 313 let mut pin = Flex::new(pin);
315 pin.set_as_input(pull); 314 pin.set_as_input(pull);
316 Self { pin } 315 Self { pin }
@@ -375,7 +374,7 @@ pub struct Output<'d> {
375impl<'d> Output<'d> { 374impl<'d> Output<'d> {
376 /// Create GPIO output driver for a [Pin] with the provided [Level] and [Speed] configuration. 375 /// Create GPIO output driver for a [Pin] with the provided [Level] and [Speed] configuration.
377 #[inline] 376 #[inline]
378 pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, initial_output: Level, speed: Speed) -> Self { 377 pub fn new(pin: Peri<'d, impl Pin>, initial_output: Level, speed: Speed) -> Self {
379 let mut pin = Flex::new(pin); 378 let mut pin = Flex::new(pin);
380 match initial_output { 379 match initial_output {
381 Level::High => pin.set_high(), 380 Level::High => pin.set_high(),
@@ -440,7 +439,7 @@ pub struct OutputOpenDrain<'d> {
440impl<'d> OutputOpenDrain<'d> { 439impl<'d> OutputOpenDrain<'d> {
441 /// Create a new GPIO open drain output driver for a [Pin] with the provided [Level] and [Speed]. 440 /// Create a new GPIO open drain output driver for a [Pin] with the provided [Level] and [Speed].
442 #[inline] 441 #[inline]
443 pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, initial_output: Level, speed: Speed) -> Self { 442 pub fn new(pin: Peri<'d, impl Pin>, initial_output: Level, speed: Speed) -> Self {
444 let mut pin = Flex::new(pin); 443 let mut pin = Flex::new(pin);
445 match initial_output { 444 match initial_output {
446 Level::High => pin.set_high(), 445 Level::High => pin.set_high(),
@@ -454,7 +453,7 @@ impl<'d> OutputOpenDrain<'d> {
454 /// and [Pull]. 453 /// and [Pull].
455 #[inline] 454 #[inline]
456 #[cfg(gpio_v2)] 455 #[cfg(gpio_v2)]
457 pub fn new_pull(pin: impl Peripheral<P = impl Pin> + 'd, initial_output: Level, speed: Speed, pull: Pull) -> Self { 456 pub fn new_pull(pin: Peri<'d, impl Pin>, initial_output: Level, speed: Speed, pull: Pull) -> Self {
458 let mut pin = Flex::new(pin); 457 let mut pin = Flex::new(pin);
459 match initial_output { 458 match initial_output {
460 Level::High => pin.set_high(), 459 Level::High => pin.set_high(),
@@ -780,7 +779,7 @@ pub(crate) trait SealedPin {
780 779
781/// GPIO pin trait. 780/// GPIO pin trait.
782#[allow(private_bounds)] 781#[allow(private_bounds)]
783pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static { 782pub trait Pin: PeripheralType + Into<AnyPin> + SealedPin + Sized + 'static {
784 /// EXTI channel assigned to this pin. 783 /// EXTI channel assigned to this pin.
785 /// 784 ///
786 /// For example, PC4 uses EXTI4. 785 /// For example, PC4 uses EXTI4.
@@ -798,18 +797,6 @@ pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static
798 fn port(&self) -> u8 { 797 fn port(&self) -> u8 {
799 self._port() 798 self._port()
800 } 799 }
801
802 /// Type-erase (degrade) this pin into an `AnyPin`.
803 ///
804 /// This converts pin singletons (`PA5`, `PB6`, ...), which
805 /// are all different types, into the same type. It is useful for
806 /// creating arrays of pins, or avoiding generics.
807 #[inline]
808 fn degrade(self) -> AnyPin {
809 AnyPin {
810 pin_port: self.pin_port(),
811 }
812 }
813} 800}
814 801
815/// Type-erased GPIO pin 802/// Type-erased GPIO pin
@@ -822,8 +809,8 @@ impl AnyPin {
822 /// 809 ///
823 /// `pin_port` is `port_num * 16 + pin_num`, where `port_num` is 0 for port `A`, 1 for port `B`, etc... 810 /// `pin_port` is `port_num * 16 + pin_num`, where `port_num` is 0 for port `A`, 1 for port `B`, etc...
824 #[inline] 811 #[inline]
825 pub unsafe fn steal(pin_port: u8) -> Self { 812 pub unsafe fn steal(pin_port: u8) -> Peri<'static, Self> {
826 Self { pin_port } 813 Peri::new_unchecked(Self { pin_port })
827 } 814 }
828 815
829 #[inline] 816 #[inline]
@@ -867,8 +854,10 @@ foreach_pin!(
867 } 854 }
868 855
869 impl From<peripherals::$pin_name> for AnyPin { 856 impl From<peripherals::$pin_name> for AnyPin {
870 fn from(x: peripherals::$pin_name) -> Self { 857 fn from(val: peripherals::$pin_name) -> Self {
871 x.degrade() 858 Self {
859 pin_port: val.pin_port(),
860 }
872 } 861 }
873 } 862 }
874 }; 863 };