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authorDario Nieuwenhuis <[email protected]>2025-03-26 16:01:37 +0100
committerDario Nieuwenhuis <[email protected]>2025-03-27 15:18:06 +0100
commitd41eeeae79388f219bf6a84e2f7bde9f6b532516 (patch)
tree678b6fc732216e529dc38e6f65b72a309917ac32 /embassy-stm32/src/sdmmc
parent9edf5b7f049f95742b60b041e4443967d8a6b708 (diff)
Remove Peripheral trait, rename PeripheralRef->Peri.
Diffstat (limited to 'embassy-stm32/src/sdmmc')
-rw-r--r--embassy-stm32/src/sdmmc/mod.rs133
1 files changed, 57 insertions, 76 deletions
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index d8671caf7..8f3c45f50 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -8,7 +8,7 @@ use core::ops::{Deref, DerefMut};
8use core::task::Poll; 8use core::task::Poll;
9 9
10use embassy_hal_internal::drop::OnDrop; 10use embassy_hal_internal::drop::OnDrop;
11use embassy_hal_internal::{into_ref, PeripheralRef}; 11use embassy_hal_internal::{Peri, PeripheralType};
12use embassy_sync::waitqueue::AtomicWaker; 12use embassy_sync::waitqueue::AtomicWaker;
13use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, CSD, OCR, SCR}; 13use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, CSD, OCR, SCR};
14 14
@@ -21,7 +21,7 @@ use crate::interrupt::typelevel::Interrupt;
21use crate::pac::sdmmc::Sdmmc as RegBlock; 21use crate::pac::sdmmc::Sdmmc as RegBlock;
22use crate::rcc::{self, RccPeripheral}; 22use crate::rcc::{self, RccPeripheral};
23use crate::time::Hertz; 23use crate::time::Hertz;
24use crate::{interrupt, peripherals, Peripheral}; 24use crate::{interrupt, peripherals};
25 25
26/// Interrupt handler. 26/// Interrupt handler.
27pub struct InterruptHandler<T: Instance> { 27pub struct InterruptHandler<T: Instance> {
@@ -303,16 +303,16 @@ impl Default for Config {
303 303
304/// Sdmmc device 304/// Sdmmc device
305pub struct Sdmmc<'d, T: Instance> { 305pub struct Sdmmc<'d, T: Instance> {
306 _peri: PeripheralRef<'d, T>, 306 _peri: Peri<'d, T>,
307 #[cfg(sdmmc_v1)] 307 #[cfg(sdmmc_v1)]
308 dma: ChannelAndRequest<'d>, 308 dma: ChannelAndRequest<'d>,
309 309
310 clk: PeripheralRef<'d, AnyPin>, 310 clk: Peri<'d, AnyPin>,
311 cmd: PeripheralRef<'d, AnyPin>, 311 cmd: Peri<'d, AnyPin>,
312 d0: PeripheralRef<'d, AnyPin>, 312 d0: Peri<'d, AnyPin>,
313 d1: Option<PeripheralRef<'d, AnyPin>>, 313 d1: Option<Peri<'d, AnyPin>>,
314 d2: Option<PeripheralRef<'d, AnyPin>>, 314 d2: Option<Peri<'d, AnyPin>>,
315 d3: Option<PeripheralRef<'d, AnyPin>>, 315 d3: Option<Peri<'d, AnyPin>>,
316 316
317 config: Config, 317 config: Config,
318 /// Current clock to card 318 /// Current clock to card
@@ -338,16 +338,14 @@ const DATA_AF: AfType = CMD_AF;
338impl<'d, T: Instance> Sdmmc<'d, T> { 338impl<'d, T: Instance> Sdmmc<'d, T> {
339 /// Create a new SDMMC driver, with 1 data lane. 339 /// Create a new SDMMC driver, with 1 data lane.
340 pub fn new_1bit( 340 pub fn new_1bit(
341 sdmmc: impl Peripheral<P = T> + 'd, 341 sdmmc: Peri<'d, T>,
342 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 342 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
343 dma: impl Peripheral<P = impl SdmmcDma<T>> + 'd, 343 dma: Peri<'d, impl SdmmcDma<T>>,
344 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 344 clk: Peri<'d, impl CkPin<T>>,
345 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 345 cmd: Peri<'d, impl CmdPin<T>>,
346 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 346 d0: Peri<'d, impl D0Pin<T>>,
347 config: Config, 347 config: Config,
348 ) -> Self { 348 ) -> Self {
349 into_ref!(dma, clk, cmd, d0);
350
351 critical_section::with(|_| { 349 critical_section::with(|_| {
352 clk.set_as_af(clk.af_num(), CLK_AF); 350 clk.set_as_af(clk.af_num(), CLK_AF);
353 cmd.set_as_af(cmd.af_num(), CMD_AF); 351 cmd.set_as_af(cmd.af_num(), CMD_AF);
@@ -357,9 +355,9 @@ impl<'d, T: Instance> Sdmmc<'d, T> {
357 Self::new_inner( 355 Self::new_inner(
358 sdmmc, 356 sdmmc,
359 new_dma_nonopt!(dma), 357 new_dma_nonopt!(dma),
360 clk.map_into(), 358 clk.into(),
361 cmd.map_into(), 359 cmd.into(),
362 d0.map_into(), 360 d0.into(),
363 None, 361 None,
364 None, 362 None,
365 None, 363 None,
@@ -369,19 +367,17 @@ impl<'d, T: Instance> Sdmmc<'d, T> {
369 367
370 /// Create a new SDMMC driver, with 4 data lanes. 368 /// Create a new SDMMC driver, with 4 data lanes.
371 pub fn new_4bit( 369 pub fn new_4bit(
372 sdmmc: impl Peripheral<P = T> + 'd, 370 sdmmc: Peri<'d, T>,
373 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 371 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
374 dma: impl Peripheral<P = impl SdmmcDma<T>> + 'd, 372 dma: Peri<'d, impl SdmmcDma<T>>,
375 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 373 clk: Peri<'d, impl CkPin<T>>,
376 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 374 cmd: Peri<'d, impl CmdPin<T>>,
377 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 375 d0: Peri<'d, impl D0Pin<T>>,
378 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 376 d1: Peri<'d, impl D1Pin<T>>,
379 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 377 d2: Peri<'d, impl D2Pin<T>>,
380 d3: impl Peripheral<P = impl D3Pin<T>> + 'd, 378 d3: Peri<'d, impl D3Pin<T>>,
381 config: Config, 379 config: Config,
382 ) -> Self { 380 ) -> Self {
383 into_ref!(clk, cmd, d0, d1, d2, d3);
384
385 critical_section::with(|_| { 381 critical_section::with(|_| {
386 clk.set_as_af(clk.af_num(), CLK_AF); 382 clk.set_as_af(clk.af_num(), CLK_AF);
387 cmd.set_as_af(cmd.af_num(), CMD_AF); 383 cmd.set_as_af(cmd.af_num(), CMD_AF);
@@ -394,12 +390,12 @@ impl<'d, T: Instance> Sdmmc<'d, T> {
394 Self::new_inner( 390 Self::new_inner(
395 sdmmc, 391 sdmmc,
396 new_dma_nonopt!(dma), 392 new_dma_nonopt!(dma),
397 clk.map_into(), 393 clk.into(),
398 cmd.map_into(), 394 cmd.into(),
399 d0.map_into(), 395 d0.into(),
400 Some(d1.map_into()), 396 Some(d1.into()),
401 Some(d2.map_into()), 397 Some(d2.into()),
402 Some(d3.map_into()), 398 Some(d3.into()),
403 config, 399 config,
404 ) 400 )
405 } 401 }
@@ -409,47 +405,34 @@ impl<'d, T: Instance> Sdmmc<'d, T> {
409impl<'d, T: Instance> Sdmmc<'d, T> { 405impl<'d, T: Instance> Sdmmc<'d, T> {
410 /// Create a new SDMMC driver, with 1 data lane. 406 /// Create a new SDMMC driver, with 1 data lane.
411 pub fn new_1bit( 407 pub fn new_1bit(
412 sdmmc: impl Peripheral<P = T> + 'd, 408 sdmmc: Peri<'d, T>,
413 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 409 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
414 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 410 clk: Peri<'d, impl CkPin<T>>,
415 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 411 cmd: Peri<'d, impl CmdPin<T>>,
416 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 412 d0: Peri<'d, impl D0Pin<T>>,
417 config: Config, 413 config: Config,
418 ) -> Self { 414 ) -> Self {
419 into_ref!(clk, cmd, d0);
420
421 critical_section::with(|_| { 415 critical_section::with(|_| {
422 clk.set_as_af(clk.af_num(), CLK_AF); 416 clk.set_as_af(clk.af_num(), CLK_AF);
423 cmd.set_as_af(cmd.af_num(), CMD_AF); 417 cmd.set_as_af(cmd.af_num(), CMD_AF);
424 d0.set_as_af(d0.af_num(), DATA_AF); 418 d0.set_as_af(d0.af_num(), DATA_AF);
425 }); 419 });
426 420
427 Self::new_inner( 421 Self::new_inner(sdmmc, clk.into(), cmd.into(), d0.into(), None, None, None, config)
428 sdmmc,
429 clk.map_into(),
430 cmd.map_into(),
431 d0.map_into(),
432 None,
433 None,
434 None,
435 config,
436 )
437 } 422 }
438 423
439 /// Create a new SDMMC driver, with 4 data lanes. 424 /// Create a new SDMMC driver, with 4 data lanes.
440 pub fn new_4bit( 425 pub fn new_4bit(
441 sdmmc: impl Peripheral<P = T> + 'd, 426 sdmmc: Peri<'d, T>,
442 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 427 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
443 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 428 clk: Peri<'d, impl CkPin<T>>,
444 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 429 cmd: Peri<'d, impl CmdPin<T>>,
445 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 430 d0: Peri<'d, impl D0Pin<T>>,
446 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 431 d1: Peri<'d, impl D1Pin<T>>,
447 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 432 d2: Peri<'d, impl D2Pin<T>>,
448 d3: impl Peripheral<P = impl D3Pin<T>> + 'd, 433 d3: Peri<'d, impl D3Pin<T>>,
449 config: Config, 434 config: Config,
450 ) -> Self { 435 ) -> Self {
451 into_ref!(clk, cmd, d0, d1, d2, d3);
452
453 critical_section::with(|_| { 436 critical_section::with(|_| {
454 clk.set_as_af(clk.af_num(), CLK_AF); 437 clk.set_as_af(clk.af_num(), CLK_AF);
455 cmd.set_as_af(cmd.af_num(), CMD_AF); 438 cmd.set_as_af(cmd.af_num(), CMD_AF);
@@ -461,12 +444,12 @@ impl<'d, T: Instance> Sdmmc<'d, T> {
461 444
462 Self::new_inner( 445 Self::new_inner(
463 sdmmc, 446 sdmmc,
464 clk.map_into(), 447 clk.into(),
465 cmd.map_into(), 448 cmd.into(),
466 d0.map_into(), 449 d0.into(),
467 Some(d1.map_into()), 450 Some(d1.into()),
468 Some(d2.map_into()), 451 Some(d2.into()),
469 Some(d3.map_into()), 452 Some(d3.into()),
470 config, 453 config,
471 ) 454 )
472 } 455 }
@@ -474,18 +457,16 @@ impl<'d, T: Instance> Sdmmc<'d, T> {
474 457
475impl<'d, T: Instance> Sdmmc<'d, T> { 458impl<'d, T: Instance> Sdmmc<'d, T> {
476 fn new_inner( 459 fn new_inner(
477 sdmmc: impl Peripheral<P = T> + 'd, 460 sdmmc: Peri<'d, T>,
478 #[cfg(sdmmc_v1)] dma: ChannelAndRequest<'d>, 461 #[cfg(sdmmc_v1)] dma: ChannelAndRequest<'d>,
479 clk: PeripheralRef<'d, AnyPin>, 462 clk: Peri<'d, AnyPin>,
480 cmd: PeripheralRef<'d, AnyPin>, 463 cmd: Peri<'d, AnyPin>,
481 d0: PeripheralRef<'d, AnyPin>, 464 d0: Peri<'d, AnyPin>,
482 d1: Option<PeripheralRef<'d, AnyPin>>, 465 d1: Option<Peri<'d, AnyPin>>,
483 d2: Option<PeripheralRef<'d, AnyPin>>, 466 d2: Option<Peri<'d, AnyPin>>,
484 d3: Option<PeripheralRef<'d, AnyPin>>, 467 d3: Option<Peri<'d, AnyPin>>,
485 config: Config, 468 config: Config,
486 ) -> Self { 469 ) -> Self {
487 into_ref!(sdmmc);
488
489 rcc::enable_and_reset::<T>(); 470 rcc::enable_and_reset::<T>();
490 471
491 T::Interrupt::unpend(); 472 T::Interrupt::unpend();
@@ -1478,7 +1459,7 @@ trait SealedInstance {
1478 1459
1479/// SDMMC instance trait. 1460/// SDMMC instance trait.
1480#[allow(private_bounds)] 1461#[allow(private_bounds)]
1481pub trait Instance: SealedInstance + RccPeripheral + 'static { 1462pub trait Instance: SealedInstance + PeripheralType + RccPeripheral + 'static {
1482 /// Interrupt for this instance. 1463 /// Interrupt for this instance.
1483 type Interrupt: interrupt::typelevel::Interrupt; 1464 type Interrupt: interrupt::typelevel::Interrupt;
1484} 1465}