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authorLiu Hancheng <[email protected]>2025-01-04 22:10:47 +0800
committerLiu Hancheng <[email protected]>2025-01-04 22:10:47 +0800
commit50e98a9a58bf7f3356aa8261ba301d4d1c6440aa (patch)
tree6960e9afc8e9c7f9b1c3a3acb36fa809d9dc0679 /embassy-stm32/src/timer
parent03dd50316c6f41a2bfab62289aa22abdaaa3189d (diff)
refactor: update DMA transfer functions to support separate memory and peripheral word types
Diffstat (limited to 'embassy-stm32/src/timer')
-rw-r--r--embassy-stm32/src/timer/simple_pwm.rs4
1 files changed, 3 insertions, 1 deletions
diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs
index 757536c2d..5b3cf8fea 100644
--- a/embassy-stm32/src/timer/simple_pwm.rs
+++ b/embassy-stm32/src/timer/simple_pwm.rs
@@ -416,8 +416,10 @@ macro_rules! impl_waveform_chx {
416 } 416 }
417 #[cfg(not(any(stm32l0)))] 417 #[cfg(not(any(stm32l0)))]
418 TimerBits::Bits32 => { 418 TimerBits::Bits32 => {
419 #[cfg(not(any(bdma, gpdma)))]
420 panic!("unsupported timer bits");
421
419 #[cfg(any(bdma, gpdma))] 422 #[cfg(any(bdma, gpdma))]
420 panic("unsupported timer bits");
421 Transfer::new_write( 423 Transfer::new_write(
422 &mut dma, 424 &mut dma,
423 req, 425 req,