diff options
| author | Daniel Trnka <[email protected]> | 2024-12-22 12:53:05 +0100 |
|---|---|---|
| committer | Daniel Trnka <[email protected]> | 2024-12-22 17:53:33 +0100 |
| commit | 7b7ac1bd3ea2eb4897b8fcab706da968188bb700 (patch) | |
| tree | 4224c45148b48e04fa567cbf72f51200ec100f6c /embassy-stm32/src/usart | |
| parent | 2ec81419fa7ca1d1d4c797c1d416c1f226aefb33 (diff) | |
stm32/usart: disabling receiver before write in half-duplex moved to a new function
Diffstat (limited to 'embassy-stm32/src/usart')
| -rw-r--r-- | embassy-stm32/src/usart/mod.rs | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 98b5c9cfe..48cc4f6d6 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs | |||
| @@ -437,13 +437,7 @@ impl<'d> UartTx<'d, Async> { | |||
| 437 | pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { | 437 | pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { |
| 438 | let r = self.info.regs; | 438 | let r = self.info.regs; |
| 439 | 439 | ||
| 440 | // Enable Transmitter and disable Receiver for Half-Duplex mode | 440 | half_duplex_set_rx_tx_before_write(&r, self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); |
| 441 | let mut cr1 = r.cr1().read(); | ||
| 442 | if r.cr3().read().hdsel() && !cr1.te() { | ||
| 443 | cr1.set_te(true); | ||
| 444 | cr1.set_re(self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); | ||
| 445 | r.cr1().write_value(cr1); | ||
| 446 | } | ||
| 447 | 441 | ||
| 448 | let ch = self.tx_dma.as_mut().unwrap(); | 442 | let ch = self.tx_dma.as_mut().unwrap(); |
| 449 | r.cr3().modify(|reg| { | 443 | r.cr3().modify(|reg| { |
| @@ -544,13 +538,7 @@ impl<'d, M: Mode> UartTx<'d, M> { | |||
| 544 | pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { | 538 | pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { |
| 545 | let r = self.info.regs; | 539 | let r = self.info.regs; |
| 546 | 540 | ||
| 547 | // Enable Transmitter and disable Receiver for Half-Duplex mode | 541 | half_duplex_set_rx_tx_before_write(&r, self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); |
| 548 | let mut cr1 = r.cr1().read(); | ||
| 549 | if r.cr3().read().hdsel() && !cr1.te() { | ||
| 550 | cr1.set_te(true); | ||
| 551 | cr1.set_re(self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); | ||
| 552 | r.cr1().write_value(cr1); | ||
| 553 | } | ||
| 554 | 542 | ||
| 555 | for &b in buffer { | 543 | for &b in buffer { |
| 556 | while !sr(r).read().txe() {} | 544 | while !sr(r).read().txe() {} |
| @@ -629,6 +617,17 @@ pub fn send_break(regs: &Regs) { | |||
| 629 | regs.rqr().write(|w| w.set_sbkrq(true)); | 617 | regs.rqr().write(|w| w.set_sbkrq(true)); |
| 630 | } | 618 | } |
| 631 | 619 | ||
| 620 | /// Enable Transmitter and disable Receiver for Half-Duplex mode | ||
| 621 | /// In case of readback, keep Receiver enabled | ||
| 622 | fn half_duplex_set_rx_tx_before_write(r: &Regs, enable_readback: bool) { | ||
| 623 | let mut cr1 = r.cr1().read(); | ||
| 624 | if r.cr3().read().hdsel() && !cr1.te() { | ||
| 625 | cr1.set_te(true); | ||
| 626 | cr1.set_re(enable_readback); | ||
| 627 | r.cr1().write_value(cr1); | ||
| 628 | } | ||
| 629 | } | ||
| 630 | |||
| 632 | impl<'d> UartRx<'d, Async> { | 631 | impl<'d> UartRx<'d, Async> { |
| 633 | /// Create a new rx-only UART with no hardware flow control. | 632 | /// Create a new rx-only UART with no hardware flow control. |
| 634 | /// | 633 | /// |
