stm32/uart: fix rb uart race

closes #4682

1 files changed, 4 insertions, 9 deletions

diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs
index 20bfefd9e..710272e4e 100644
--- a/embassy-stm32/src/usart/ringbuffered.rs
+++ b/embassy-stm32/src/usart/ringbuffered.rs
@@ -7,7 +7,9 @@ use embassy_embedded_hal::SetConfig;
 use embedded_io_async::ReadReady;
 use futures_util::future::{Either, select};
 
-use super::{Config, ConfigError, Error, Info, State, UartRx, rdr, reconfigure, set_baudrate, sr};
+use super::{
+    Config, ConfigError, Error, Info, State, UartRx, clear_interrupt_flags, rdr, reconfigure, set_baudrate, sr,
+};
 use crate::Peri;
 use crate::dma::ReadableRingBuffer;
 use crate::gpio::{AnyPin, SealedPin as _};
@@ -343,19 +345,12 @@ fn check_idle_and_errors(r: Regs) -> Result<bool, Error> {
         // SAFETY: read only and we only use Rx related flags
         let sr = sr(r).read();
 
-        #[cfg(any(usart_v3, usart_v4))]
-        r.icr().write(|w| {
-            w.set_idle(true);
-            w.set_pe(true);
-            w.set_fe(true);
-            w.set_ne(true);
-            w.set_ore(true);
-        });
         #[cfg(not(any(usart_v3, usart_v4)))]
         unsafe {
             // This read also clears the error and idle interrupt flags on v1 (TODO and v2?)
             rdr(r).read_volatile()
         };
+        clear_interrupt_flags(r, sr);
         sr
     });
     if sr.pe() {