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authorDario Nieuwenhuis <[email protected]>2024-04-16 18:45:09 +0000
committerGitHub <[email protected]>2024-04-16 18:45:09 +0000
commitbab4affe7cd116f44eb378c8f32e58e6993adbf5 (patch)
tree26ba21a3085a9e5bc4f303c8173062dd87e99aff /embassy-stm32/src/usb
parent40ad87730f0d21521bf66812de8a3b37f80815ec (diff)
parent38e71a2438c8ae934bda646b4c7bbe51f1dd6f61 (diff)
Merge pull request #2813 from diondokter/u0-dion
More U0 support
Diffstat (limited to 'embassy-stm32/src/usb')
-rw-r--r--embassy-stm32/src/usb/mod.rs2
-rw-r--r--embassy-stm32/src/usb/usb.rs14
2 files changed, 8 insertions, 8 deletions
diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs
index 1e3c44167..349438ec5 100644
--- a/embassy-stm32/src/usb/mod.rs
+++ b/embassy-stm32/src/usb/mod.rs
@@ -23,7 +23,7 @@ fn common_init<T: Instance>() {
23 ) 23 )
24 } 24 }
25 25
26 #[cfg(any(stm32l4, stm32l5, stm32wb))] 26 #[cfg(any(stm32l4, stm32l5, stm32wb, stm32u0))]
27 critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true))); 27 critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true)));
28 28
29 #[cfg(pwr_h5)] 29 #[cfg(pwr_h5)]
diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs
index f48808cb3..81a2d2623 100644
--- a/embassy-stm32/src/usb/usb.rs
+++ b/embassy-stm32/src/usb/usb.rs
@@ -107,14 +107,14 @@ const EP_COUNT: usize = 8;
107 107
108#[cfg(any(usbram_16x1_512, usbram_16x2_512))] 108#[cfg(any(usbram_16x1_512, usbram_16x2_512))]
109const USBRAM_SIZE: usize = 512; 109const USBRAM_SIZE: usize = 512;
110#[cfg(usbram_16x2_1024)] 110#[cfg(any(usbram_16x2_1024, usbram_32_1024))]
111const USBRAM_SIZE: usize = 1024; 111const USBRAM_SIZE: usize = 1024;
112#[cfg(usbram_32_2048)] 112#[cfg(usbram_32_2048)]
113const USBRAM_SIZE: usize = 2048; 113const USBRAM_SIZE: usize = 2048;
114 114
115#[cfg(not(usbram_32_2048))] 115#[cfg(not(any(usbram_32_2048, usbram_32_1024)))]
116const USBRAM_ALIGN: usize = 2; 116const USBRAM_ALIGN: usize = 2;
117#[cfg(usbram_32_2048)] 117#[cfg(any(usbram_32_2048, usbram_32_1024))]
118const USBRAM_ALIGN: usize = 4; 118const USBRAM_ALIGN: usize = 4;
119 119
120const NEW_AW: AtomicWaker = AtomicWaker::new(); 120const NEW_AW: AtomicWaker = AtomicWaker::new();
@@ -159,7 +159,7 @@ fn calc_out_len(len: u16) -> (u16, u16) {
159 } 159 }
160} 160}
161 161
162#[cfg(not(usbram_32_2048))] 162#[cfg(not(any(usbram_32_2048, usbram_32_1024)))]
163mod btable { 163mod btable {
164 use super::*; 164 use super::*;
165 165
@@ -180,7 +180,7 @@ mod btable {
180 USBRAM.mem(index * 4 + 3).read() 180 USBRAM.mem(index * 4 + 3).read()
181 } 181 }
182} 182}
183#[cfg(usbram_32_2048)] 183#[cfg(any(usbram_32_2048, usbram_32_1024))]
184mod btable { 184mod btable {
185 use super::*; 185 use super::*;
186 186
@@ -224,9 +224,9 @@ impl<T: Instance> EndpointBuffer<T> {
224 let n = USBRAM_ALIGN.min(buf.len() - i * USBRAM_ALIGN); 224 let n = USBRAM_ALIGN.min(buf.len() - i * USBRAM_ALIGN);
225 val[..n].copy_from_slice(&buf[i * USBRAM_ALIGN..][..n]); 225 val[..n].copy_from_slice(&buf[i * USBRAM_ALIGN..][..n]);
226 226
227 #[cfg(not(usbram_32_2048))] 227 #[cfg(not(any(usbram_32_2048, usbram_32_1024)))]
228 let val = u16::from_le_bytes(val); 228 let val = u16::from_le_bytes(val);
229 #[cfg(usbram_32_2048)] 229 #[cfg(any(usbram_32_2048, usbram_32_1024))]
230 let val = u32::from_le_bytes(val); 230 let val = u32::from_le_bytes(val);
231 USBRAM.mem(self.addr as usize / USBRAM_ALIGN + i).write_value(val); 231 USBRAM.mem(self.addr as usize / USBRAM_ALIGN + i).write_value(val);
232 } 232 }