fix formatting

3 files changed, 18 insertions, 29 deletions

diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs
index 3cf2ca72e..36898b8f9 100644
--- a/embassy-stm32/src/adc/mod.rs
+++ b/embassy-stm32/src/adc/mod.rs
@@ -259,4 +259,4 @@ pub const fn resolution_to_max_count(res: Resolution) -> u32 {
         #[allow(unreachable_patterns)]
         _ => core::unreachable!(),
     }
-}
\ No newline at end of file
+}
diff --git a/embassy-stm32/src/adc/u5_adc4.rs b/embassy-stm32/src/adc/u5_adc4.rs
index 468d16640..0635dad9b 100644
--- a/embassy-stm32/src/adc/u5_adc4.rs
+++ b/embassy-stm32/src/adc/u5_adc4.rs
@@ -1,17 +1,12 @@
-pub use crate::pac::adc::vals::Adc4Res as Resolution;
-pub use crate::pac::adc::vals::Adc4SampleTime as SampleTime;
-pub use crate::pac::adc::vals::Adc4Presc as Presc;
-pub use crate::pac::adc::regs::Adc4Chselrmod0;
-
 #[allow(unused)]
-use pac::adc::vals::{Adc4Exten, Adc4OversamplingRatio, Adc4Dmacfg};
+use pac::adc::vals::{Adc4Dmacfg, Adc4Exten, Adc4OversamplingRatio};
 
-use super::{
-    blocking_delay_us, AdcChannel, SealedAdcChannel, AnyAdcChannel, RxDma4
-};
+use super::{blocking_delay_us, AdcChannel, AnyAdcChannel, RxDma4, SealedAdcChannel};
+use crate::dma::Transfer;
+pub use crate::pac::adc::regs::Adc4Chselrmod0;
+pub use crate::pac::adc::vals::{Adc4Presc as Presc, Adc4Res as Resolution, Adc4SampleTime as SampleTime};
 use crate::time::Hertz;
 use crate::{pac, rcc, Peripheral};
-use crate::dma::Transfer;
 
 const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55);
 
@@ -74,7 +69,7 @@ impl<T: Instance> SealedAdcChannel<T> for Vcore {
 
 pub enum DacChannel {
     OUT1,
-    OUT2
+    OUT2,
 }
 
 /// Number of samples used for averaging.
@@ -186,7 +181,7 @@ pub struct Adc4<'d, T: Instance> {
 #[derive(Debug)]
 pub enum Adc4Error {
     InvalidSequence,
-    DMAError
+    DMAError,
 }
 
 impl<'d, T: Instance> Adc4<'d, T> {
@@ -205,9 +200,7 @@ impl<'d, T: Instance> Adc4<'d, T> {
             panic!("Maximal allowed frequency for ADC4 is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 /  1_000_000 );
         }
 
-        let mut s = Self {
-            adc,
-        };
+        let mut s = Self { adc };
 
         s.power_up();
 
@@ -227,7 +220,7 @@ impl<'d, T: Instance> Adc4<'d, T> {
         T::regs().cr().modify(|w| {
             w.set_advregen(true);
         });
-        while !T::regs().isr().read().ldordy() { };
+        while !T::regs().isr().read().ldordy() {}
 
         T::regs().isr().modify(|w| {
             w.set_ldordy(true);
@@ -300,8 +293,8 @@ impl<'d, T: Instance> Adc4<'d, T> {
     pub fn enable_dac_channel(&self, dac: DacChannel) -> Dac {
         let mux;
         match dac {
-            DacChannel::OUT1 => {mux = false},
-            DacChannel::OUT2 => {mux = true}
+            DacChannel::OUT1 => mux = false,
+            DacChannel::OUT2 => mux = true,
         }
         T::regs().or().modify(|w| w.set_chn21sel(mux));
         Dac {}
@@ -346,7 +339,7 @@ impl<'d, T: Instance> Adc4<'d, T> {
     }
 
     /// Read an ADC channel.
-    pub fn blocking_read(&mut self, channel: &mut impl AdcChannel<T>) -> u16{
+    pub fn blocking_read(&mut self, channel: &mut impl AdcChannel<T>) -> u16 {
         channel.setup();
 
         // Select channel
@@ -440,7 +433,7 @@ impl<'d, T: Instance> Adc4<'d, T> {
             T::regs().chselrmod0().modify(|w| {
                 w.set_chsel(channel.channel as usize, true);
             });
-        };
+        }
 
         let request = rx_dma.request();
         let transfer = unsafe {
@@ -483,4 +476,4 @@ impl<'d, T: Instance> Adc4<'d, T> {
             while T::regs().cr().read().adstart() {}
         }
     }
-}
\ No newline at end of file
+}
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs
index 96dae25bd..46f9c7ac7 100644
--- a/embassy-stm32/src/adc/v4.rs
+++ b/embassy-stm32/src/adc/v4.rs
@@ -1,9 +1,7 @@
-#[allow(unused)]
-use pac::adc::vals::{Adstp, Difsel, Exten, Pcsel, Dmngt};
-
 #[cfg(not(stm32u5))]
-use pac::adc::vals::{Adcaldif,  Boost};
-
+use pac::adc::vals::{Adcaldif, Boost};
+#[allow(unused)]
+use pac::adc::vals::{Adstp, Difsel, Dmngt, Exten, Pcsel};
 use pac::adccommon::vals::Presc;
 
 use super::{
@@ -26,7 +24,6 @@ const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(50);
 #[cfg(stm32u5)]
 const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55);
 
-
 #[cfg(stm32g4)]
 const VREF_CHANNEL: u8 = 18;
 #[cfg(stm32g4)]
@@ -41,7 +38,6 @@ const TEMP_CHANNEL: u8 = 18;
 #[cfg(not(stm32u5))]
 const VBAT_CHANNEL: u8 = 17;
 
-
 #[cfg(stm32u5)]
 const VREF_CHANNEL: u8 = 0;
 #[cfg(stm32u5)]